AWT5004 High Efficiency UMTS 1700 (Band 4) WCDMA/CDMA Linear PAM preliminary data sheet - Rev 1.0 FEATURES • CDMA/EVDO and WCDMA/HSPA Compliant • High Efficiency (R99 waveform): • 48% @ POUT = +28.5 dBm • Optimized for SMPS Supply AWT5004 • Low Leakage Current in Shutdown Mode: <5 µA • Internal Voltage Regulator • Optimized for a 50 Ω System • Internal DC blocks on IN/OUT RF ports • 1.8 V Control Logic • RoHS Compliant Package, 260 oC MSL-3 APPLICATIONS • Wireless Handsets and Data Devices for: 10 Pin 3 mm x 3 mm x 0.9 mm Surface Mount Module • Band 4 WCDMA/HSPA • AWS CDMA/EVDO BC15 PRODUCT DESCRIPTION The AWT5004 PA is designed to provide highly linear output for WCDMA and CDMA handsets and data devices with high efficiency at high power mode. This ANADIGICS PA can be used with an external VBATT switch mode power supply (SMPS) to improve its efficiency and reduce current consumption further at high, medium and low output powers. The RFIN device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and ruggedness. There are three selectable bias modes that optimize efficiency for VMODE2 different output power levels, and a shutdown mode with low leakage current, which increases handset talk and standby time. The self-contained 3 mm x 3 mm x VMODE1 0.9 mm surface mount package incorporates matching networks optimized for output power, efficiency, and linearity in a 50 Ω system. VEN GND at Slug (pad) 1 10 2 9 RFOUT 8 N/C 4 7 GND 5 6 N/C 3 Bias Control Voltage Regulation Figure 1: Block Diagram 09/2013 VCC AWT5004 VBATT 1 10 RFIN 2 9 RFOUT VMODE2 3 8 N/C VMODE1 4 7 GND VEN 5 6 N/C Figure 2: Pinout (X-ray Top View) Table 1: Pin Description 2 PIN NAME DESCRIPTION 1 VBATT Battery Voltage 2 RFIN RF Input 3 VMODE2 Mode Control Voltage 2 4 VMODE1 Mode Control Voltage 1 5 VEN PA Enable Voltage 6 N/C No Connection 7 GND Ground 8 N/C No Connection 9 RFOUT RF Output 10 VCC Supply Voltage preliminary data sheet - Rev 1.0 09/2013 VCC AWT5004 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PARAMETER MIN TYP MAX UNIT RF Input (PIN) - - 10 dBm VCC -1.2 3.4 5 V VBATT -1.2 3.4 6 V Control Voltage (VENABLE, VMODE) 0 1.8 3.5 V Storage Temperature (TSTORAGE) -40 25 150 °C Functional operation to the specified performance is not implied under these conditions. Operation of any single parameter in excess of the absolute ratings may cause permanent damage. No damage occurs if one parameter is set at the limit while all other parameters are set within normal operating ranges. Table 3: Operating Ranges PARAMETER MIN TYP MAX UNIT COMMENTS Operating Frequency (f) 1710 - 1755 MHz Supply Voltage (VCC) +0.5 +3.4 +4.4 V POUT < +28.5 dBm Battery Voltage (VBATT) +3.1 +3.4 +4.4 V POUT < +28.5 dBm Enable Voltage (VENABLE) +1.35 0 +1.8 0 +3.1 +0.5 V PA “on” PA “shut down” Mode Control Voltage (VMODE1) +1.35 0 +1.8 0 +3.1 +0.5 V Low Bias Mode High Bias Mode RF Output Power (POUT) (1) R99 WCDMA, HPM HSPA (MPR = 0), HPM R99 WCDMA, MPM HSPA (MPR = 0), MPM R99 WCDMA, LPM HSPA (MPR = 0), LPM 27.7 26.7 - 28.5 27.5 18 17 8 7 - dBm CDMA Output Power (1) HPM MPM LPM 27.2 - 28 17 7 - dBm Case Temperature (TC) -30 - +90 °C UMTS Band 4, CDMA BC15 3GPP TS 34.121-1, Rel 8 Table C.11.1.3, for WCDMA Subtest 1 CDMA2000, RC-1 The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: (1) For operation at Vcc = +3.1 V, Pout is derated by 0.8 dB. 3 preliminary data sheet - Rev 1.0 09/2013 AWT5004 Table 4: Electrical Specifications - WCDMA Operation (R99 waveform) (TC = +25 °C, VBATT = +3.4 V, VEN = +1.8 V, 50 Ω system, unless otherwise specified) PARAMETER MIN TYP MAX UNIT Gain 25.5 18 13 28.5 21 17.5 32 26 21 ACLR1 at 5 MHz offset (1) - -40 -42 -41 ACLR2 at 10 MHz offset (1) - Efficiency (1) COMMENTS POUT VCC VMODE1 VMODE2 dB +28.5 dBm +18 dBm +8 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V -36 -36 -36 dBc +28.5 dBm +18 dBm +8 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V -53 -59 <-60 -48 -48 -48 dBc +28.5 dBm +18 dBm +8 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V - 48 28 15 - % +28.5 dBm +18 dBm +8 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V Quiescent Current (Icq) Low Bias Mode - 24 - mA through VCC pin, VMODE1,2 = +1.8 V Mode Control Current - 0.04 0.1 mA through VMODE pin, VMODE1,2 = 1.8 V Enable Current - 0.04 0.15 mA through VENABLE pin BATT Current - 2.5 5 mA through VBATT pin, VMODE1,2 = +1.8 V Leakage Current - <5 - µA VBATT = +4.4 V, VCC = +4.4 V VENABLE = 0 V, VMODE1,2 = 0 V Noise in Receive Band (2) - -135 - dBm/Hz POUT < +28.5 dBm Harmonics 2fO 3fO, 4fO - -43 -50 - dBc POUT < +28.5 dBm Input Impedance - - 2:1 VSWR Spurious Output Level (all suprious outputs) Load mismatch stress with no permanent degradation or failure - - -70 dBc 8:1 - - VSWR POUT < +28.5 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions Applies over full operating range Notes: (1) ACLR and Efficiency measured at 1732.5 MHz. (2) Noise measured at 2110 MHz to 2155 MHz. 4 preliminary data sheet - Rev 1.0 09/2013 AWT5004 Table 5: Electrical Specifications - CDMA Operation (CDMA2000, RC-1) (TC = +25 °C, VBATT = +3.4 V, VEN = +1.8 V, 50 Ω system, unless otherwise specified) PARAMETER MIN TYP MAX UNIT Gain 25.5 18 13 28.5 21 18 32 26 21 Adjacent Channel Power (1) at +1.25 MHz offset Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz - -50 -55 -55 Adjacent Channel Power (1) at +1.98 MHz offset Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz - Efficiency (1) - COMMENTS POUT VCC VMODE1 VMODE2 dB +28 dBm +17 dBm +7 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V -46 -46 -46 dBc +28 dBm +17 dBm +7 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V -56 <-60 <-60 -53 -53 -53 dBc +28 dBm +17 dBm +7 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V 44 26 13 - % +28 dBm +17 dBm +7 dBm 3.4 V 1.4 V 0.8 V 0V 1.8 V 1.8 V 0V 0V 1.8 V Notes: (1) ACLR and Efficiency measured at 1732.5 MHz. 5 preliminary data sheet - Rev 1.0 09/2013 AWT5004 APPLICATION INFORMATION To ensure proper performance, refer to all related Application Notes on the ANADIGICS web site: http://www.anadigics.com logic level (see Operating Ranges table) to VMODE1,2 voltages. The Bias Control table lists the recommended modes of operation for various applications. Shutdown Mode The power amplifier may be placed in a shutdown mode by applying logic low levels (see Operating Ranges table) to the VENABLE and VMODE1,2 voltages. Three operating modes are available to optimize current consumption. High Bias/High Power operating mode is for POUT levels ≥ 16 dBm. At around < 18 dBm output power, the PA should be “Mode Switched” to Medium power mode. For POUT levels < 8 dBm, the PA could be switched to Low power mode for extremely low current consumption. Bias Modes The power amplifier may be placed in either a Low, Medium or High Bias mode by applying the appropriate Vcontrols Venable/Vmode(s) On Sequence Start T_0N = 0µ Rise/Fall Max 1µS Defined at 10% to 90% of Min/Max Voltage Off Sequence Start T_0FF = 0µ ON Sequence OFF Sequence RFIN notes 1,2 VEN VCC note 1 T_0N+1µS T_0N+5µS Referenced After 90% of Rise Time T_0FF+5µS T_0FF+3µS Referenced Before10% of Fall Time Figure 3: Recommended ON/OFF Timing Sequence Notes: (1) Level might be changed after RF is ON. (2) RF OFF defined as PIN ≤ -30 dBm. (3) Switching simultaneously between VMODE and VEN is not recommended. 6 preliminary data sheet - Rev 1.0 09/2013 AWT5004 Table 6: Bias Control POUT LEVELS BIAS MODE VENABLE VMODE1 VMODE2 VCC VBATT High power (High Bias Mode) > +16 dBm High +1.8 V 0V 0V 0.6 - 4.4 V 3.1 - 4.4 V Med power (Med Bias Mode) ≤ +18 dBm Medium +1.8 V +1.8 V 0V 0.6 - 4.4 V 3.1 - 4.4 V Low power (Low Bias Mode) ≤ +8 dBm Low +1.8 V +1.8 V +1.8 V 0.6 - 4.4 V 3.1 - 4.4 V - Shutdown 0V 0V 0V 0.6 - 4.4 V 3.1 - 4.4 V APPLICATION Shutdown 7 preliminary data sheet - Rev 1.0 09/2013 AWT5004 VBATT VCC C2 2.2µF C1 0.1µF GND at slug 1 2 RFIN VMODE2 VMODE1 VEN 3 VBATT VCC RFIN RFOUT 10 9 VMODE2 N/C 8 4 VMODE1 GND 7 5 VEN N/C 6 Figure 4: Evaluation Board Schematic 8 preliminary data sheet - Rev 1.0 09/2013 C3 33pF C4 0.1µF C5 2.2µF ceramic RFOUT AWT5004 PACKAGE OUTLINE Figure 5: Package Outline - 10 Pin 3 mm x 3 mm x 0.94 mm Surface Mount Module Pin 1 Identifier Date Code YY=Year; WW=Work week 5004 Part Number LLLLNN YYWWCC Lot Number Country Code (CC) Figure 6: Branding Specification 9 preliminary data sheet - Rev 1.0 09/2013 AWT5004 PCB AND STENCIL DESIGN GUIDELINE Figure 7: Recommended PCB Layout Information 10 preliminary data sheet - Rev 1.0 09/2013 AWT5004 COMPONENT PACKAGING Pin 1 Figure 8: Carrier Tape Figure 9: Reel 11 preliminary data sheet - Rev 1.0 09/2013 AWT5004 ORDERING INFORMATION ORDER NUMBER TEMPERATURE RANGE PACKAGE DESCRIPTION COMPONENT PACKAGING AWT5004Q7 -30 oC to +90 oC RoHS Compliant 10 Pin 3 mm x 3 mm x 0.9 mm Surface Mount Module Tape and Reel, 2500 pieces per Reel AWT5004P9 -30 oC to +90 oC RoHS Compliant 10 Pin 3 mm x 3 mm x 0.9 mm Partial Tape and Reel Surface Mount Module ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. warning ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 12 preliminary data sheet - Rev 1.0 09/2013