AWT6634 HELP3DC UMTS1700 (Band 4 & 9) LTE/WCDMA/CDMA Linear PA Module TM DATA SHEET - Rev 2.1 FEATURES • CDMA/EVDO, WCDMA/HSPA and LTE Compliant •3rd Generation HELPTM technology • High Efficiency: (LTE waveform) • 35 % @ POUT = +27.25 dBm • 20 % @ POUT = +16 dBm AWT6634 • Simpler Calibration with only 2 Bias Modes • Optimized for SMPS Supply • Low Quiescent Current: 8mA • Low Leakage Current in Shutdown Mode: 4 µA • Internal Voltage Regulator 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module • Integrated “daisy chainable” directional couplers with CPLIN and CPLOUT Ports • Optimized for a 50 Ω System • Low Profile Miniature Surface Mount Package are two selectable bias modes that optimize efficiency for different output power levels, and a shutdown mode with low leakage current, which increases handset talk and standby time. The self-contained 3 mm x 3 mm x 1 mm surface mount package incorporates matching networks optimized for output power, efficiency, and linearity in a 50 Ω system. • Internal DC blocks on IN/OUT RF ports • 1.8 V Control Logic • RoHS Compliant Package, 260 oC MSL-3 APPLICATIONS • Wireless Handsets and Data Devices for: • WCDMA/HSPA/LTE Bands 3,4,9 or 10 • CDMA/EVDO AWS/KPCS Band GND at Slug (pad) VBATT 1 RFIN 2 VMODE2 (N/C) 3 VMODE1 VEN 10 VCC PRODUCT DESCRIPTION The AWT6634 PA is designed to provide highly linear output for WCDMA , CDMA and LTE handsets and data devices with high efficiency at both high and low power modes. This HELP3DC TM PA can be used with an external switch mode power supply (SMPS) to improve its effciency and reduce current consumption further at medium and low output powers. A “daisy chainable” directional coupler is integrated in the module thus eliminating the need of external couplers. The device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and ruggedness. There 02/2012 9 RFOUT 8 CPLIN 4 7 GND 5 6 CPLOUT CPL Bias Control Voltage Regulation Figure 1: Block Diagram AWT6634 VBATT 1 10 RFIN 2 9 RFOUT VMODE2 (N/C) 3 8 CPLIN VMODE1 4 7 GND VEN 5 6 CPLOUT Figure 2: Pinout (X-ray Top View) Table 1: Pin Description PIN NAME DESCRIPTION 1 VBATT Battery Voltage 2 RFIN RF Input 3 2 VMODE2 (N/C) No Connection Mode Control Voltage 1 4 VMODE1 5 VEN 6 CPLOUT 7 GND Ground 8 CPLIN Coupler Input 9 RFOUT RF Output 10 VCC PA Enable Voltage Coupler Output Supply Voltage DATA SHEET - Rev 2.1 02/2012 VCC AWT6634 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PARAMETER MIN MAX UNIT Supply Voltage (VCC) 0 +5 V Battery Voltage (VBATT) 0 +6 V Control Voltages (VMODE1, VENABLE) 0 +3.5 V RF Input Power (PIN) - +10 dBm -40 +150 °C Storage Temperature (TSTG) Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Table 3: Operating Ranges PARAMETER MIN TYP MAX UNIT Operating Frequency (f) 1710 - 1785 MHz Supply Voltage (VCC) +0.5 +3.4 +4.35 V POUT ≤ +28.25 dBm Battery Voltage (VBATT) +3.1 +3.4 +4.35 V POUT ≤ +28.25 dBm Enable Voltage (VENABLE) +1.35 0 +1.8 0 +3.1 +0.5 V PA "on" PA "shut down" Mode Control Voltage (VMODE1) +1.35 0 +1.8 0 +3.1 +0.5 V Low Bias Mode High Bias Mode RF Output Power (POUT) R99 WCDMA, HPM HSPA (MPR=0), HPM LTE, HPM R99 WCDMA, LPM HSPA (MPR=0), LPM LTE, LPM 27.45(1) 26.45(1) 26.45(1) 16.2(1) 15.2(1) 15.2(1) 28.25 27.25 27.25 17 16 16 28.25 27.25 27.25 17 16 16 dBm CDMA Output Power HPM LPM 26.7(1) 15.2(1) 27.5 16.0 - dBm -30 - +90 °C Case Temperature (TC) COMMENTS 3GPP TS 34.121-1, Rel 8 Table C.11.1.3 for WCDMA SUBTEST 1 TS 36.101 Rel 8 LTE CDMA2000, RC-1 The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: (1) For operation at Vcc = +3.1 V, Pout is derated by 0.8 dB. 3 DATA SHEET - Rev 2.1 02/2012 AWT6634 PARAMETER Table 4: Electrical Specifications - WCDMA Operation (R99 waveform) (TC = +25 °C, VCC = +3.4 V, VBATT = +3.4 V, VENABLE = +1.8 V, 50 Ω system) COMMENTS MIN TYP MAX UNIT POUT VMODE1 24.5 11.5 27 14 29.5 16 dB +28.25 dBm +17 dBm 0V 1.8 V ACLR1 at 5 MHz offset (1) - -41 -41 -38 -38 dBc +28.25 dBm +17 dBm 0V 1.8 V ACLR2 at 10 MHz offset - -55 -60 -48 -53 dBc +28.25 dBm +17 dBm 0V 1.8 V 37 20 40 23 - % +28.25 dBm +17 dBm 0V 1.8 V - 8 16.5 mA VMODE1 = +1.8 V Gain Power-Added Efficiency (1) Quiescent Current (Icq) Low Bias Mode Mode Control Current - 0.3 0.6 mA through VMODE pin, VMODE1 = +1.8 V Enable Current - 0.3 0.6 mA through VENABLE pin BATT Current - 2.5 5 mA through VBATT, VMODE1 = +1.8V Leakage Current - 4 7 µA VBATT = +4.2 V, VCC = +4.2 V, VENABLE = 0 V, VMODE1 = 0 V Noise in Receive Band - -134 -141 -134 - Harmonics 2fO 3fO, 4fO - -37 -55 -34 -50 dBc Input Impedance - 2:1 - VSWR Coupling Factor - 20 - dB Directivity - 28 - dB Coupler IN-OUT Daisy Chain Insertion Loss - 0.25 - dB 698 MHz through 2620 MHz Pin 8 to 6; Shutdown Mode Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure Phase Delta (HPM-LPM) 1805 - 1880 MHz dBm/Hz 2110 - 2155 MHz 1574.4 - 1576.4 MHz - - -70 dBc POUT < +28.25 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions 8:1 - - VSWR Applies over full operating range - 10 - Deg Notes: (1) ACLR and Efficiency measured at 1747.5 MHz. 4 POUT < +28.25 dBm DATA SHEET - Rev 2.1 02/2012 AWT6634 Table 5: Electrical Specifications - LTE Operation (RB = 12, START = 0, QPSK) (TC = +25 °C, VBATT = VCC = +3.4 V, VENABLE = +1.8 V, 50 Ω system) PARAMETER MIN TYP MAX UNIT Gain 24.5 11.5 27 14 29.5 16 ACLR E-UTRA at ± 10 MHz offset - -39 -39 ACLR1 UTRA (1) at ± 7.5 MHz offset - ACLR2 UTRA at ± 12.5 MHz offset Power-Added Efficiency (1) Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure POUT VMODE1 dB +27.25 dBm +16 dBm 0V 1.8 V -36 -36 dBc +27.25 dBm +16 dBm 0V 1.8 V -40 -40 -37 -37 dBc +27.25 dBm +16 dBm 0V 1.8 V - -60 -60 -55 -55 dBc +27.25 dBm +16 dBm 0V 1.8 V 32 16 35 20 - % +27.25 dBm +16 dBm 0V 1.8 V - - <-70 8:1 - - dBc P OUT ≤ +27.25 dBm In-band load VSWR < 5:1 Out-of-band load VSWR < 10:1 Applies over all operating conditions VSWR Applies over full operating range Notes: (1) ACLR and Efficiency measured at 1747.5 MHz. 5 COMMENTS DATA SHEET - Rev 2.1 02/2012 AWT6634 Table 6: Electrical Specifications - CDMA Operation (CDMA 2000 RC1 WAVEFORM) (TC = +25 °C, VCC = VBATT = +3.4 V, VENABLE = +1.8 V, 50 Ω system) PARAMETER MIN TYP MAX UNIT Gain 24.5 11.5 27 14 29.5 16 Adjacent Channel Power at +1.25 MHz offset Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz - -50 -50 Adjacent Channel Power at +1.98 MHz offset Primary Channel BW = 1.23 MHz Adjacent Channel BW = 30 kHz - Power-Added Efficiency Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure POUT VMODE1 dB +27.5 dBm +16 dBm 0V 1.8 V -46 -46 dBc +27.5 dBm +16 dBm 0V 1.8 V -55 -60 -51 -56 dBc +27.5 dBm +16 dBm 0V 1.8 V - 36 20 - % +27.5 dBm +16 dBm 0V 1.8 V - - -70 dBc See Note 1 8:1 - - VSWR Notes: (1) ACPR and Efficiency measured at 1747.5 MHz. 6 COMMENTS DATA SHEET - Rev 2.1 02/2012 Applies over full operating range AWT6634 APPLICATION INFORMATION To ensure proper performance, refer to all related Application Notes on the ANADIGICS web site: http://www.anadigics.com Shutdown Mode The power amplifier may be placed in a shutdown mode by applying logic low levels (see Operating Ranges table) to the VENABLE and VMODE1 voltages. Bias Modes The power amplifier may be placed in either a Low Bias mode or a High Bias mode by applying the appropriate logic level (see Operating Ranges table) to VMODE1. The Bias Control table lists the recommended modes of operation for various applications. VMODE2 is not necessary for this PA. Two operating modes are available to optimize current consumption. High Bias/High Power operating mode is for POUT levels > 16 dBm. At around 16 dBm output power, the PA should be “Mode Switched” to Low power mode for lowest quiescent current consumption. Vcontrols Venable/Vmode(s) On Sequence Start T_0N = 0µ Rise/Fall Max 1µS Defined at 10% to 90% of Min/Max Voltage Off Sequence Start T_0FF = 0µ ON Sequence OFF Sequence RFIN notes 1,2 VEN VCC note 1 T_0N+1µS T_0N+3µS T_0FF+2µS T_0FF+3µS Referenced After 90% of Rise Time Referenced Before10% of Fall Time Figure 3: Recommended ON/OFF Timing Sequence Notes: (1) Level might be changed after RF is ON. (2) RF OFF defined as PIN ≤ -30 dBm. (3) Switching simultaneously between VMODE and VEN is not recommended. Table 7: Bias Control POUT LEVELS BIAS MODE VENABLE VMODE1 VCC VBATT High power (High Bias Mode) >+16 dBm High +1.8 V 0V 1.5 - 4.35 V > 3.1 V Med/low power (Low Bias Mode) +17 dBm Low +1.8 V +1.8 V 0.5 - 4.35 V > 3.1 V - Shutdown 0V 0V 0.5 - 4.35 V > 3.1 V Application Shutdown 7 DATA SHEET - Rev 2.1 02/2012 AWT6634 VBATT VCC C6 2.2 µF C1 33 pF C2 0.1 µF GND at slug 1 2 RFIN VMODE1 VEN 10 VBATT VCC RFIN RFOUT 9 3 VMODE2 (N/C) CPLIN 8 4 VMODE1 GND 7 5 VEN RFOUT CPLIN CPLOUT 6 CPLOUT C4 0.01 µF RFIN VCC GND GND VBATT Figure 4: Evaluation Circuit Schematic C6 C1 RFOUT C3 C2 CPLOUT VMODE1 VEN GND GND VMODE2 C4 CPLIN Figure 5: Evaluation Board Layout 8 DATA SHEET - Rev 2.1 02/2012 C3 2.2 µF ceramic AWT6634 HELP3DCTM The AWT6634 power amplifier module is based on ANADIGICS proprietary HELP3DC™ technology. The PA is designed to operate up to 17 dBm in the low power mode, thus eliminating the need for three gain states, while still maintaining low quiescent current and high efficiency in low and medium power levels. Average weighted efficiency can be increased by using an external switch mode power supply (SMPS) or DC/DC converter to reduce VCC. The directional “daisy chainable” coupler is integrated within the PA module, therefore there is no need for external couplers. The AWT6634 has an integrated voltage regulator, which eliminates the need for an external constant voltage source. The PA is turn on/off is controlled by VEN pin. A single VMODE control logic (VMODE1) is needed to operate this device. AWT6634 requires only two calibration sweeps for system calibration, thus saving calibration time. Figure 5 shows one application example on mobile board. C1 and C2 are RF bypass caps and should be placed nearby pin 1 and pin 10. Bypass caps C4 and C5 may not be needed. Also a “T” matching topology is recommended at PA RFIN and RFOUT ports to provide matching between input TX Filter and Duplexer / Isolator. Figure 6: Typical Application Circuit 9 DATA SHEET - Rev 2.1 02/2012 AWT6634 PERFORMANCE DATA: Figure 4: WCDMA Gain (dB) Temperature Figure 7: WCDMA Gain (dB)over over Temeprature (Vbatt=Vcc=3.4V) = VCC = 3.4 V) (VBATT Figure 8: 5:WCDMA Gain over Voltage Figure WCDMA Gain (dB)(dB) over Voltage (T(Tc=25C C = 25) 8C) 30 30 -30C 3.4Vcc 25C 3.2Vcc 25C 3.4Vcc 25C 3.4Vcc 90C 3.4Vcc 25C 4.2Vcc 25 Gain (dB) Gain (dB) 25 20 15 25C 3.0Vcc 20 15 10 0 5 10 15 20 25 10 30 0 Pout (dBm) 15 20 25 30 FigureWCDMA 7: WCDMA PAE PAE (%) over Voltage Figure 10: (%) over Voltage (TC(Tc=25C) = 25 8C) 50 50 -30 3.4cc 45 25C 3.4Vcc 25C 3.2Vcc 25C 3.4Vcc 40 90C 3.4Vcc 25C 4.2Vcc 35 30 Efficiency Efficiency (%) 10 Pout (dBm) Figure 9: WCDMA PAE Temeprature Figure 6: WCDMA PAE (%)(%) over over Temperature (Vbatt=Vcc=3.4V) (VBATT = VCC = 3.4 V) 40 5 20 25C 3.0Vcc 30 25 20 15 10 10 5 0 0 0 5 10 15 20 25 0 30 5 10 8: WCDMA ACRL1 (dBc) over over Temperature Figure 11:Figure WCDMA ACLR1 (dBc) Temeprature (Vbatt=Vcc=3.4V) (VBATT = VCC = 3.4 V) 30 25C 3.2Vcc 25C 3.4Vcc -30 90C 3.4Vcc -40 -45 -50 25C 3.4Vcc 25C 4.2Vcc -35 25C 3.0Vcc -40 -45 -50 -55 0 5 10 15 20 25 30 -55 0 Pout (dBm) 10 25 -25 -30C 3.4Vcc -35 20 Figure Figure 12: WCDMA ACLR1 over Voltage 9: WCDMA ACLR1 (dBc) (dBc) over Voltage C = 25 8C) (T(Tc=25C) ACLR1 (5MHz dBc) ACLR1 (5MHz dBc) -30 15 Pout (dBm) Pout (dBm) 5 10 15 Pout (dBm) DATA SHEET - Rev 2.1 02/2012 20 25 30 AWT6634 PACKAGE OUTLINE Figure 13: Package Outline - 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module Pin 1 Identifier Date Code YY=Year; WW=Work week 6634 Part Number LLLLNN YYWWCC Lot Number Country Code (CC) Figure 14: Branding Specification Package 11 DATA SHEET - Rev 2.1 02/2012 AWT6634 PCB AND STENCIL DESIGN GUIDELINE Figure 15: Recommended PCB Layout Information 12 DATA SHEET - Rev 2.1 02/2012 AWT6634 COMPONENT PACKAGING Pin 1 Figure 16: Carrier Tape Figure 17: Reel 13 DATA SHEET - Rev 2.1 02/2012 AWT6634 ORDERING INFORMATION ORDER NUMBER TEMPERATURE RANGE AWT6634Q7 -30 oC to +90 oC RoHS Compliant 10 Pin 3 mm x 3 mm x 1 mm Tape and Reel, 2500 pieces per Reel Surface Mount Module AWT6634P9 -30 oC to +90 oC RoHS Compliant 10 Pin 3 mm x 3 mm x 1 mm Partial Tape and Reel Surface Mount Module PACKAGE DESCRIPTION COMPONENT PACKAGING ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. warning ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 14 DATA SHEET - Rev 2.0 02/2012