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General Description
The ADATA’s module is a DDR4-2133(CL15)-15-15 SDRAM memory module.
The PSD is programmed to JEDEC standard latency 2133Mbps timing of 15-15-15 at 1.2V. The module
is composed if eighteen 512Mx8 bits CMOS DDR4 SDRAMs in FBGA package and one 4Kbit
EEPROM in 8 pin TDFN package on a 288 pin glass-epoxy printed circuit board.
Power Savings Features
Advantages
DDR4 voltage is 1.2 V (up to 40% savings)
• Lower voltage than DDR3 (1.5 V)
• On-die VREF
• Pseudo-open drain I/Os
• DDR3
investment is ending at 1866 MT/s,
while DDR4 speeds START at 2133 MT/s
• 50% Performance boost in bandwidth
• ADDR/CMD parity on DRAM
Manages refreshes (up to 20% savings)
• Based on temperature
*New DDR4 low-power auto self-refresh (LPASR) capability
• Only refreshes parts of array that is in use
*Controller must allow fine-granularity refresh based on memory utilization
Supports data bus inversion
• Limits number of signals transitioning, reducing
simultaneous switching output (SSO) and saving
power
Specifications
Module density
Interface
Core architecture
4,8,16,32,64 and 128GB
Voltage (VDD,VDDQ,VPP)
1.2V,1.2V,2.5V
Number of banks
16banks(4-bank group)
Page size (X4,X8,X16)
512B,1KB,2KB
Number of prefetch
8bits
Package type, ball (X4,X8,X16)
78,96 BGA
DIMM type
RDIMM,VLP R-DIMM,
LR-DIMM
NV-DIMM
ECC SO-DIMM
DIMM pins
288pins (R,VLP-R,LR,NV DIMM)
256pins (ECC SO-DIMM)
Physical
Part Number
Capacity
Description
AD4R2133W4G15
4GB
DDR4 RDIMM 1.2V/2133
AD4R2133Y8G15
8GB
DDR4 RDIMM 1.2V/2133
AD4R2133Y16G15
16GB
DDR4 RDIMM 1.2V/2133