ROHM BD8314NUV

Single-chip Type with Built-in FET Switching Regulators
High-efficiency Step-up
Switching Regulator
with Built-in Power MOSFET
No.11027EDT09
BD8314NUV
●Description
ROHM’s High-efficiency Step-up Switching Regulator Built-in Power MOSFET BD8314NUV generates step-up output
including 8 V or 10 V from 4 batteries, batteries such as Li1cell or Li2cell etc. or a 5 V fixed power supply line.
This IC allows easy production of small and a wide range of output current, and is equipped with an external coil/capacitor
downsized by high frequency operation of 1.2 MHz, built-in 2.5 A rated 80 mΩ Nch FET SW, and flexible phase
compensation system on board.
●Features
1) Incorporates Nch FET capable of withstanding 2.5 A/14 V.
2) Incorporates phase compensation device between input and output of ERROR AMP.
3) Small coils and capacitors to be used by high frequency operation of 1.2 MHz
4) Input voltage 3.0 V ~ 12 V
5) Output current
600 mA (3.5 V ~ 10 V) at 10 V
600 mA (3.0 V ~ 8 V) at 8 V
6) Incorporates soft-start function.
7) Incorporates timer latch system short protecting function.
8) As small as 3 mm×3 mm, SON 10-pin package VSON010V3030
●Application
General portable equipment like DSC/DVC powered by 4 dry batteries or Li2cell
●Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
VCC, LX
14
V
Maximum input voltage
SWOUT, INV
14
V
Maximum input current
Iinmax
2.5
A
Pd
700*
mW
Operating temperature range
Topr
-25 to +85
°C
Storage temperature range
Tstg
-55 to +150
°C
Tjmax
+150
°C
Maximum applied power voltage
Power dissipation
Junction temperature
* When used at Ta = 25°C or more installed on a 74.2 × 74.2 × 1.6t mm board, the rating is reduced by 5.6 mW/°C.
●Operating Conditions (Ta = 25°C)
Parameter
Power supply voltage
Output voltage
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Symbol
Ratings
Unit
VCC
3.0 to 12
V
VOUT
4.0 to 12
V
1/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Electrical Characteristics
(Unless otherwise specified, Ta = 25 °C, VCC = 7.4 V)
Parameter
Symbol
Limits
Unit
Min.
Typ.
Max.
VUV
-
2.4
2.6
V
ΔVUVhy
50
100
200
mV
fosc
1.1
1.2
1.3
MHz
VREG
4.65
5.0
5.35
V
INV threshold voltage
VINV
0.99
1.00
1.01
V
Input bias current
IINV
-50
0
50
nA
Soft-start time
Tss
5.3
8.8
12.2
msec
Dmax1
77
85
93
%
RONSWOUT
-
50
100
Ω
LX NMOS ON resistance
RON
-
80
150
mΩ
LX leak current
Ileak
-1
0
1
µA
Operation
VSTBH
2.5
-
VCC
V
No-operation
VSTBL
-0.3
-
0.3
V
RSTB
250
400
700
kΩ
Standby current VCC
ISTB
-
-
1
µA
Circuit current at operation VCC
Icc
-
600
900
µA
Conditions
[Low voltage input malfunction preventing circuit]
Detection threshold voltage
Hysteresis range
VREG monitor
[Oscillator]
Oscillation frequency
[Regulator]
Output voltage
[ERROR AMP]
Vcc=11.0V , VINV=5.5V
[PWM comparator]
LX Max Duty
[SWOUT]
ON resistance
[Output]
[STB]
STB pin
control voltage
STB pin pull-down resistance
[Circuit current]
VINV=1.2V
 Not designed to be resistant to radiation
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2/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Description of Pins
GND
SWOUT
VCC
INV
VREG
STB
LX
PGND
LX
PGND
Pin No.
Pin Name
1
GND
Ground terminal
2
VCC
Control part power input terminal
3
VREG
4～5
Lx
6～7
PGND
8
STB
ON/OFF terminal
9
INV
ERROR AMP input terminal
10
SWOUT
STBSW for split resistance
Fig.1 Pin layout
Function
5 V output terminal of regulator
for internal circuit
Coil connecting terminal
Power transistor ground terminal
●Block Diagram
VREG
STB
VCC
5V REG
STBY_IO
VREG
GND
VREF
FB H
OSC
1.2MHz
UVLO
Reference
Lx
SCP
OSC×16000 count
STOP
PWM
CONTROL
VREG
PRE
DRIVER
80mΩ
PGND
+
+
-
ERROR_AMP
VREF
Soft
Start
STB
SWOUT
50Ω
INV
Fig.2 Block diagram
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3/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Description of Blocks
1.
VREF
This block generates ERROR AMP reference voltage.
The reference voltage is 1.0 V.
2.
UVLO
Circuit for preventing low voltage malfunction
Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage.
Monitors VREG pin voltage to turn off all output FET and DC/DC converter output when VREG voltage is lower than
2.4 V, and reset the timer latch of the internal SCP circuit and soft-start circuit. This threshold contains 100 mV
hysteresis.
3.
SCP
Timer latch system short-circuit protection circuit
When the INV pin is the set 1.0 V or lower voltage, the internal SCP circuit starts counting. The internal counter is in
synch with OSC; the latch circuit activates after a lapse of 13.3 msec after the counter counts about 16000 oscillations
and then, turn off DC/DC converter output. To reset the latch circuit, turn off the STB pin once. Then, turn it on again or
turn on the power supply voltage again.
4.
OSC
Circuit for oscillating saw tooth waves with an operation frequency fixed at 1.2 MHz
5.
ERROR AMP
Error amplifier for detecting output signals and outputting PWM control signals
The internal reference voltage is set at 1.0 V.
A primary phase compensation device of 200 pF, 62 kΩ is built in between the inverting input terminal and the output
terminal of this ERROR AMP.
6.
PWM COMP
Voltage-pulse width converter for controlling output voltage corresponding to input voltage
Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP controls the pulse width
to the output to the driver.
Max Duty is set at 85%.
7.
SOFT START
Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start
Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage
after about 10000 oscillations.
8.
PRE DRIVER
CMOS inverter circuit for driving the built-in Nch FET.
9.
STBY_IO
Voltage applied on STB pin (8 pin) to control ON/OFF of IC
Turned ON when a voltage of 2.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied.
Incorporates approximately 400 kΩ pull-down resistance.
10. Nch FET SW
Built-in SW for switching the coil current of the DC/DC converter. Incorporates an 80 mΩ NchFET SW capable of
withstanding 14 V. Since the current rating of this FET is 2.5 A, it should be used within 2.5 A including the DC current
and ripple current of the coil.
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4/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Reference Data (Unless otherwise specified, Ta = 25°C, VCC = 7.4 V)
1.02
1.02
1.01
1.01
5.3
1.00
0.99
VREG VOLTAGE [V]
INV THRESHOLD [V]
INV THRESHOLD [V]
5.2
1.00
0.99
5.1
5.0
4.9
4.8
0.98
0.98
-40 -20
0
20
40
60
80
0
100 120
5
TEMPERATURE [℃]
VCC [V]
4.7
10
-40
8
40
80
120
TEMPERAT URE [℃]
Fig.4. INV threshold
power supply property
Fig.3. INV threshold
temperature property
0
Fig.5. VREG output
temperature property
1.4
1.4
1.3
1.3
FREQUENCY [MHz]
VREG[V]
6
5
4
3
2
FREQUENCY [ MHz ]
7
1.2
1.1
1.2
1.1
1
0
1.0
1.0
0
2
4
6
8
VCC [V]
10
12
14
-40
3.2
0.15
Hysteresis width
3.0
0.10
UVLO detection
2.8
2.7
0.05
100
80
60
40
80
60
40
20
0
0.00
-40 -20
0
25
50
85
0
-40
100 120
TEMPARATURE [℃]
0
40
80
TEMPARATURE [℃]
120
3
Fig.10. Nch FET ON
resistance temperature property
Fig.9. UVLO threshold
temperature property
1.5
OFF
60
40
20
-50
0
50
VCC [V]
100
150
Fig.12. STB threshold
temperature property
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15
80
60
40
20
0
0
1.0
12
ID=1mA
80
SWOUT ON Resistance [Ω ]
SWOUT ON Resistance [Ω ]
STB Voltage [V]
ON
9
VCC [V]
Fig.11. Nch FET ON
resistance power supply property
ID=1mA
2.0
6
100
100
2.5
15
ID=500mA
20
2.5
12
100
120
2.6
9
VCC [V]
120
ID=500mA
ON RESISTANCE [ mO]
0.20
ON RESISTANCE [ mO ]
140
3.3
2.9
6
Fig.8. fosc
voltage property
160
0.25
UVLO release
ヒステリシス電圧 Vhys [V]
UVLO THRESHOLD VOLTAGE [ V ]
3.5
3.1
3
120
Fig.7. fosc
temperature property
Fig.6. VREG output
power supply property
3.4
0
40
80
TEMPERATURE [℃]
TEMPARATURE [℃]
9
VCC [V]
Fig.13. SWOUT ON resistance
temperature property
Fig.14. SWOUT ON resistance
power supply property
-40
0
40
5/15
80
120
3
6
12
15
2011.08 - Rev.D
Technical Note
95
90
90
85
80
2.5
STB Voltage [V]
95
Lx Max Duty [ % ]
Lx Max Duty [%]
BD8314NUV
85
-40
0
40
80
TEMPARATURE [℃]
120
1.0
3
6
9
VCC [V]
12
Fig.16. Lx Max duty
power supply property
Fig.15. Lx Max duty
temperature property
1.5
80
75
75
2.0
15
-50
0
50
VCC [V]
100
150
Fig.17. Circuit current
temperature property
1000
ICC [uA]
800
600
400
200
0
0
2
4
6
8
VCC [V]
10
12
14
Fig.18. Circuit current
power supply property
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6/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Example of Application Input: 3.0 to 10 V, output: 10 V / 500 mA
RSX201L-30 (ROHM)
10V/500mA
22μF
GRM32EB31C226KE16 (Murata)
4.7μH
DE3518E(TOKO)
10p
ON/OFF
200k
10k
100k
6
PGND
7
PGND
8
STB
9
INV
5
Lx
VBAT=2.5～4.5V
Lx
4
VREG
3
VCC
2
10μF
GRM31CB31E106KA75L(Murata)
1μF
GRM188B11A105KA61(Murata)
1μF
GRM21BB11C105KA01(Murata)
22k
SWOUT
10
3.3～5.0V
1
GND
Fig.19 Reference application diagram
●Reference Application Data 1
100
100
100
VCC=10V
VCC=7.4V
VCC=8.4V
40
20
60
VCC=4.8V
40
100
1000
10000
1
10
Fig.20 Power conversion efficiency 1
10.4
13
10.3
OUTPUT VOLTAGE [V]
10.5
14
Io=100mA
11
10
9
Io=500mA
9.5
4
6
8
10
12
INPUT VOLTAGE [V]
Fig.23 Line regulation
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VCC=7.4V
9.8
9.6
10000
10.3
VCC=8.4V
9.9
5
1000
10.4
10.0
6
100
Fig.22 Power conversion efficiency 3
VCC=10V
10.1
9.7
2
10
OUTPUT CURRENT [mA]
10.5
10.2
7
0
1
10000
Fig.21 Power conversion efficiency 2
15
8
1000
OUTPUT CURRENT [mA]
OUTPUT CURRENT [mA]
12
100
VCC=6.0V
OUTPUT VOLTAGE [V]
10
VCC=3.5V
40
0
0
1
60
20
20
0
OUTPUT VOLTAGE [V]
EFFICIENCY [%]
60
VCC=4.0V
80
VCC=6.0V
80
EFFICIENCY [%]
EFFICIENCY [%]
80
10.2
VCC=4.8V
10.1
10.0
9.9
VCC=4.0V
9.8
VCC=3.5V
9.7
9.6
9.5
1
10
100
1000
OUTPUT CURRENT [mA]
Fig.24 Load regulation 1
7/15
10000
1
10
100
1000
10000
OUTPUT CURRENT [mA]
Fig.25 Load regulation 2
2011.08 - Rev.D
Technical Note
BD8314NUV
●Reference Application Data 2 (VCC = 3.0 V, 6.0 V, 8.4 V, VOUT = 10 V)
60
180
60
180
60
180
Phase
20
60
20
60
20
0
0
Gain
-20
-40
-60
100
100　1k
1000
10k
10000
100k
100000
0
0
Gain
Phase
60
0
0
Gain
-60
-20
-60
-20
-60
-120
-40
-120
-40
-120
-180
1M
1000000
-60
-180
100000 1M
1000000
100k
-60
100
100　1000
1k
Frequency [Hz]
10000
10k
100　1000
1k
100
Fig.26 Frequency response property 1
(VCC = 3.0 V, Io = 200 mA)
Fig.27 Frequency response property 2
(VCC = 6.0 V, Io = 200 mA)
180
60
120
40
20
60
20
0
0
40
10k
10000
100k
100000
-180
1M
1000000
Frequency [Hz]
Frequency [Hz]
60
120
Phase [deg]
40
Gain [dB]
120
Phase [deg]
40
Gain [dB]
120
Phase
Phase [deg]
Gain [dB]
40
Phase
Fig.28 Frequency response property 3
(VCC = 8.4 V, Io = 200 mA)
180
60
120
40
60
20
180
Phase
120
-40
-60
100
100　1000
1k
10000
10k
100000
100k
60
0
0
Gain
-60
-20
-60
-20
-60
-120
-40
-120
-40
-120
-180
1000000
1M
-60
-180
100000 1M
1000000
100k
-60
100
100　1000
1k
10000
10k
Frequency [Hz]
Frequency [Hz]
Fig.29 Frequency response property 4
(VCC = 3.0 V, Io = 500 mA)
Fig.30 Frequency response property 5
(VCC = 6.0 V, Io = 500 mA)
100
100　1000
1k
10000
10k
Phase [deg]
0
Gain
Gain [dB]
Gain [dB]
0
Phase [deg]
Gain
-20
Phase [deg]
Gain [dB]
Phase
-180
100000 1M
1000000
100k
Frequency [Hz]
Fig.31 Frequency response property 6
(VCC = 8.4 V, Io = 500 mA)
●Reference Board Pattern
VOUT
GND
Lx
VBAT
・The radiation plate on the rear should be a GND flat surface of low impedance in common with the PGND flat surface.
・It is recommended to install a GND pin in another system as shown in the drawing without connecting it directly to
this PGND
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8/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Limits of the lowest power supply voltage to start up
When using configuration of inputting VCC voltage from output voltage of DC/DC converter, the input voltage as power
supply for the IC drops by Vf voltage of external Diode.
The worst condition is shown as below.
VCC terminal voltage - Vf voltage of external diode ≧ the worst voltage of UVLO reset voltage(=2.8V)
Please judge this IC is useable or not considering needed start up voltage and load current.
3.2
VOUT=10V, typ
VBAT [ V ]
3.0
-35℃
2.8
2.6
25℃
2.4
85℃
2.2
0.1
1.0
10.0
100.0
Io [mA]
Fig.32 start up voltage Vs load current
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9/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Selection of Part for Applications
(1) Inductor
A shielded inductor that satisfies the current rating
(current value, Ipecac as shown in the drawing below)
and has a low DCR (direct resistance component) is
recommended.
Inductor values affect inductor ripple current, which will
cause output ripple.
Ripple current can be reduced as the coil L value
becomes larger and the
switching frequency becomes higher.
Ipeak  IOUT  VOUT / VIN /η ΔIL / 2 [ A ]
ΔIL 
VIN VOUT  VIN 1

 [A]
L
VOUT
f
Δ IL
Fig.33 Inductor current
・・・(1)
・・・(2)
(η: Efficiency, ∆IL: Output ripple current, f: Switching frequency)
As a guide, inductor ripple current should be set at about 20 to 50% of the maximum input current.
* Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower
efficiency or output oscillation. Select an inductor with an adequate margin so that the peak current does not
exceed the rated current of the coil.
(2) Output capacitor
A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple.
There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC
bias property into consideration.
Output ripple voltage is obtained by the following equation.
VPP  IOUT 
VOUT  VIN
 IOUT  RESR [ V ]
f  CO  VOUT
・・・(3)
Setting must be performed so that output ripple is within the allowable ripple voltage.
(3) Output voltage setting
The internal reference voltage of the ERROR AMP is 1.0 V. Output voltage is obtained by Equation (4) of Fig. 33,
but it should be designed taking about 50 Ω, an error of NMOS ON resistance of SWOUT into consideration.
VOUT
ERROR AMP
R1
VO 
INV
R1  R2  1.0 [ V ]
R2
・・・(4)
R2
VREF
1.0V
SWOUT
STB
Fig.34
Setting of voltage feedback resistance
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10/15
2011.08 - Rev.D
Technical Note
BD8314NUV
(4) DC/DC converter frequency response adjustment system
Condition for stable application
The condition for feedback system stability under negative feedback is that the phase delay is 135 °or less when
gain is 1 (0 dB).
Since DC/DC converter application is sampled according to the switching frequency, the bandwidth GBW of the
whole system (frequency at which gain is 0 dB) must be controlled to be equal to or lower than 1/10 of the switching
frequency.
In summary, the conditions necessary for the DC/DC converter are:
- Phase delay must be 135°or lower when gain is 1 (0 dB).
- Bandwidth GBW (frequency when gain is 0 dB) must be equal to or lower than 1/10 of the switching frequency.
To satisfy above two items, R1, R2, R3, DS and RS in Fig. 34 should be set as follows.
[1] R1, R2, R3
BD8314NUV incorporates phase compensation devices of
R4=62 kΩ and C2=200pF. These C2 and R1, R2, and R3
values decide the prim ary pole that determines the
bandwidth of DC/DC converter.
Primary pole point frequency
VOUT
Cs
R1
Inside of IC
R4 C2
Rs
FB
R3
R2
1
fp=
2π A×(
R1・R2
R1+R2
・・・・(1)
+R3)×C2
Fig.35 Example of phase compensation setting
DC/DC converter DC Gain
1
VOUT
DC Gain  A  
・・・・(2)
B VOUT  VIN
A
B
VIN
VOUT
: ERROR AMP Gain
About 100dB = 105
: Oscillator amplification = 0.5
: Input voltage
: Output voltage
By Equations (1) and (2), the frequency fsw of point 0 dB under limitation of the bandwidth of the DC gain at the
primary pole point is as shown below.
fSW  fp  DC Gain 
1
1
VOUT


・・・・(3)
 R1  R2
 B VOUT  VIN
2πC2  
 R3 
 R1  R2

It is recommended that fsw should be approx.10 kHz. When load response is difficult, it may be set at approx. 20
kHz. By this setting, R1 and R2, which determine the voltage value, will be in the order of several hundred kΩ.
Therefore, if an appropriate resistance value is not available and routing may cause noise, the use of R3 enables
easy setting.
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11/15
2011.08 - Rev.D
Technical Note
BD8314NUV
[2]Cs and Rs setting
In the step-up DC/DC converter, the secondary pole point is caused by the coil and capacitor as expressed by the
following equation.
1 D
fLC 
・・・・(4)
2π LC
D: ON Duty = ( VOUT - VIN ) / VOUT
This secondary pole causes a phase rotation of 180°. To secure the stability of the system, put zero points in 2
places to perform compensation.
Zero point by built-in CR
fz1 
1
 13 kHz
2πR 4C2
・・・・(5)
Zero point by Cs
fz1 
1
2πR1  R3 CS
・・・・(6)
Setting CS2 to be half to 2 times a frequency as large as fLC provides an appropriate phase margin.
It is desirable to set Rs at about 1/20 of (R1+R3) to cancel any phase boosting at high frequencies.
Those pole points are summarized in the figure below. The actual frequency property is different from the ideal
calculation because of part constants. If possible, check the phase margin with a frequency analyzer or network
analyzer, etc.. Otherwise, check for the presence or absence of ringing by load response waveform and also
check for the presence or absence of oscillation under a load of an adequate margin.
(5) (6)
(3)
(4)
Fig. 36 Example of DC/DC converter frequency property
(Measured with FRA5097 by NF Corporation)
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12/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●I/O Equivalence Circuit
FB
INV
VREG
VCC
VREG
FB
VREG
INV
VREG
SWOUT
VCC
VCC
VCC
SWOUT
VREG
STB
Lx, PGND
VCC
VCC
Lx
STB
PGND
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13/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Notes for Use
1) Absolute Maximum Rating
We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction
exists if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is
impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode
exceeding the absolute maximum rating is expected, please review matters and provide physical safety means such as
fuses, etc.
2) GND Potential
Keep the potential of the GND pin below the minimum potential at all times.
3) Thermal Design
Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into
account.
4) Short Circuit between Pins and Incorrect Mounting
Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong
way, it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the
output and GND of the power supply.
5) Operation under Strong Electromagnetic Field
Be careful of possible malfunctions under strong electromagnetic fields.
6) Common Impedance
When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and
reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can.
7) Thermal Protection Circuit (TSD Circuit)
This IC contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal
runaway and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for
continuous use or operation after the circuit has tripped.
8) Rush Current at the Time of Power Activation
Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing
since rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple
power supplies.
9) IC Terminal Input
This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions
are formed and various parasitic elements are configured using these P layers and N layers of the individual elements.
For example, if a resistor and transistor are connected to a terminal as shown on Fig.37:
○The P-N junction operates as a parasitic diode
when GND > (Terminal A) in the case of a resistor or when GND > (Pin B) in the case of a transistor (NPN)
○Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in the
case of a transistor (NPN) when GND > (Pin B).
The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic
element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid
the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc.
Transistor (NPN)
B
C
N
P+
N
P
N
P+
P Substrate
Parasitic
Element
GND
+
P
N
GND
P
N
N
E
N
P Substrate
Parasitic Element
(Pin A)
P+
～
～
(Pin B)
(Pin A)
～
～
Resistor
Parasitic Element
GND
GND
Fig.37 Example of simple structure of Bipolar IC
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© 2011 ROHM Co., Ltd. All rights reserved.
14/15
2011.08 - Rev.D
Technical Note
BD8314NUV
●Ordering part number
B
D
8
Part No.
3
1
4
N
Part No.
U
V
Package
NUV: VSON010V3030
-
E
2
Packaging and forming specification
E2: Embossed tape and reel
VSON010V3030
<Tape and Reel information>
3.0±0.1
3.0±0.1
0.08 S
S
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
(0.22)
+0.03
0.02 -0.02
1.0MAX
1PIN MARK
Tape
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
2.0±0.1
0.5
1
5
10
6
1.2±0.1
0.4±0.1
0.5
C0.25
+0.05
0.25 -0.04
1pin
(Unit : mm)
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© 2011 ROHM Co., Ltd. All rights reserved.
Reel
15/15
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2011.08 - Rev.D
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
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More detail product informations and catalogs are available, please contact us.
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R1120A