Power Management ICs for Automotive Body Control LDO Regulator BD3650FP-M No.10039EAT08 ●Description The BD3650FP-M is low-saturation regulator. This IC has a built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits and a thermal shutdown circuit that protects the IC from thermal damage due to overloading. ●Features 1) Output Current: 0.3A 2) High Output Voltage Precision : ±2% 3) Low saturation with PDMOS output 4) Built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits 5) Built-in thermal shutdown circuit for protecting the IC from thermal damage due to overloading 6) Low ESR Capacitor 7) TO252-3 packaging ●Applications Onboard devices (vehicle equipment, car stereos, satellite navigation systems, etc.) ●Absolute maximum ratings(Ta=25℃) Parameter Symbol Ratings Unit Supply voltage *1 Vcc -0.3～+36.0 V Power dissipation *2 Pd 1.2 W Operating temperature range Topr -40～+125 ℃ Storage temperature range Tstg -55～+150 ℃ Tjmax 150 ℃ Maximum Junction Temperature *1 *2 Not to exceed Pd. TO252-3:Reduced by 9.6mW /℃ over Ta = 25℃, when mounted on glass epoxy board: 70mm×70mm×1.6mm. ●Operating conditions(Ta=-40～+125℃) Parameter Supply Voltage *3 Output current *3 Symbol Min. Max. Unit Vcc 5.6 30.0 V Io 0 0.3 A Consider the voltage drop (dropout voltage) due to the output current. NOTE: This product is not designed for protection against radioactive rays. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/10 2010.11 - Rev.A Technical Note BD3650FP-M ●Electrical characteristics Unless otherwise specified, Ta=-40～+125℃,Vcc=10V, Io=0mA setting Parameter Symbol Min Typ Max Unit Bias Current Ib － 0.5 1.0 mA Output voltage Vo 4.90 5.00 5.10 V Io=200mA Dropout Voltage ΔVd － 0.2 0.4 V Vcc=Vo×0.95, Io=200mA Ripple Rejection R.R. 45 60 － dB f=120Hz, ein=1Vrms, Io=100mA Line Regulation Reg.I － 5 35 mV Vcc=5.6→30V Load Regulation Reg.L － 10 50 mV Io=10mA→300mA www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/10 Conditions 2010.11 - Rev.A Technical Note BD3650FP-M ●Reference data Unless otherwise specified, Ta=-40℃～+125℃, Vcc=10V, Io=0mA 125℃ 0.6 25℃ 0.4 -40℃ 0.2 6.0 5.0 5.0 4.0 3.0 -40℃ 2.0 125℃ 1.0 25℃ 0.0 0.0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Fig.1 Circuit Current Fig.2 Line Regulation (Io=0mA) 3.0 2.0 -40℃ 1.0 25℃ 125℃ 0.0 250 500 750 1000 1250 OUTPUT CURRENT: Io[mA] 125℃ 200 150 25℃ 100 -40℃ 50 0 200 1.0 0.0 -40 -20 0 20 40 60 80 100 120 AMBIENT TEMPERATURE: Ta [℃] Fig.7 Output Voltage Temperature Characteristics www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 40 -40℃ 30 25℃ 20 10 125℃ 1000 10000 100000 FREQUENCY: f [Hz] 1000000 Fig.6 Ripple Rejection (Io=100mA) 6.0 0.8 25℃ 125℃ 0.6 OUTPUT VOLTAGE: Vo[V] CIRCUIT CURRENT: Ib[mA] 2.0 50 0 100 300 1.0 3.0 60 Fig.5 Dropout Voltage (Vcc=4.75V) (Io=0mA→300mA) 6.0 OUTPUT VOLTAGE: Vo[V] 100 70 OUTPUT CURRENT: Io[mA] Fig.4 Load Stability 4.0 25℃ 80 250 1500 5.0 125℃ 1.0 Fig.3 Line Regulation (Io=200mA) 0 0 -40℃ 2.0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 SUPPLY VOLTAGE: Vcc[V] RIPPLE REJECTION: R.R.[dB] DROPOUT VOLTAGE: ΔVd[mV] 4.0 3.0 SUPPLY VOLT AGE: Vcc[V] 300 5.0 4.0 0.0 0 2 4 6 8 10 12 14 16 18 20 2224 26 28 30 SUPPLY VOLTAGE: Vcc[V] 6.0 OUTPUT VOLTAGE: Vo[V] 6.0 OUTPUT VOLTAGE: Vo[V] 0.8 OUTPUT VOLTAGE: Vo[V] CIRCUIT CURRENT: Ib+I FEEDBACK_R [mA] 1.0 0.4 -40℃ 0.2 0.0 0 50 100 150 200 250 OUTPUT CURRENT: io[mA] Fig.8 Circuit Current (lo=0mA→300 mA) 3/10 300 5.0 4.0 3.0 2.0 1.0 0.0 130 140 150 160 170 180 190 AMBIENT TEMPERATURE: Ta[℃] Fig.9 Thermal Shutdown Circuit Characteristics 2010.11 - Rev.A Technical Note BD3650FP-M ●Measurement circuit for electrical data Vo Vcc 2.2 µF GND Vo Vcc 2.2µF 4.7 µF 4.7 µF 2.2 µF 4.7µF GND Vo Vcc GND 200mA Measurement Circuit of Fig.1 Measurement Circuit of Fig.2 Vo Vcc Vo Vcc Measurement Circuit of Fig.3 Vcc Vo 1Vrms 2.2 µF 4.7 µF 2.2 µF 4.7 µF 2.2 µF 4.7 µF GND GND GND 4.75V 10V 10V Measurement Circuit of Fig.4 Measurement Circuit of Fig.5 4.7µF 2.2 µF 2.2µF GND 10V Measurement Circuit of Fig.7 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Measurement Circuit of Fig.6 Vo Vcc Vo Vcc 100mA 4.7µF 10V 10V Measurement Circuit of Fig.8 4.7µF 2.2 µF GND 4/10 Vo Vcc GND Measurement Circuit of Fig.9 2010.11 - Rev.A Technical Note BD3650FP-M ●Block Diagram GND FIN VREF：Bandgap Reference OCP：Over Current Protection Circuit TSD：Thermal Shut Down Circuit Driver：Power Transistor Driver VREF DRIVER OCP TSD 1 2 3 Vcc N.C. Vo Fig.10 Pin No. Pin Name Function 1 Vcc Power supply pin 2 N.C. N.C. pin 3 Vo Output pin FIN GND GND ●Package dimension (TOP VIEW) ●I/O Equivalent Circuits (Resistance value is typical value.) Vcc pin Vo pin Vcc 100 kΩ Vcc Vo IC 83.5 kΩ 15kΩ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/10 2010.11 - Rev.A Technical Note BD3650FP-M ●Thermal Dissipation Curve 5 5 ROHM standard board ローム標準基板実装 Board size：:70mm 70mm× 基板サイズ ×70mm 70mm× ×1.6mm 1.6mm ×7mm foil銅箔面積 area:7mm :7mm ×7mm TO252-3: θja=104.2( ℃/W)℃/W) θja=104.2( TO252S-3 4 ROHM standard board Board size:70mm×70mm×1.6mm foil area:7mm×7mm ③ 4.80 ①2-layer board(back surface copper foil area:15mm×15mm) ②2-layer board(back surface copper foil area:70mm×70mm) ③4-layer board(back surface copper foil area:70mm×70mm) 4 Power Dissipation: Pd (W) Power Dissipation: Pd (W) ② 3.50 3 2 1.20 1 ①θja=67.6(℃/W) ②θja=35.7(℃/W) ③θja=26.0(℃/W 3 ① 1.85 2 1 0 0 0 25 50 75 100 125 150 0 25 Ambient Temperature: Ta(℃) 50 75 100 125 150 Ambient Temperature: Ta(℃) Fig.11 Fig.12 (Reference Data) When using at temperatures over Ta=25℃, please refer to the heat reducing characteristics shown in Fig.11 and Fig.12. The IC characteristics are closely related to the temperature at which the IC is used, so it is necessary to operate the IC at temperatures less than the maximum junction temperature Tjmax. Fig.11 and Fig.12 shows the acceptable loss and heat reducing characteristics of the TO252-3 package. Even when the ambient temperature Ta is a normal temperature (25℃), the chip (junction) temperature Tj may be quite high so please operate the IC at temperatures less than the acceptable loss Pd. The calculation method for power consumption Pc(W) is as follows :(Fig.12③) Pc=(Vcc－Vo)×Io+Vcc×Ib Acceptable loss Pd≧Pc Solving this for load current Io in order to operate within the acceptable loss, IO ≦ Pd VCC Ib VCC VO (Please refer to Figs.8 for Ib.) It is then possible to find the maximum load current IOMAX with respect to the applied voltage Vcc at the time of thermal design. VCC: Vo: Io: Ib: Ishort: Input voltage Output voltage Load current Circuit current Short current Calculation Example) When Ta=85℃, Vcc=10V, Vo=5V 2.469 10 Ib 5 IO≦300mA (Ib:0.5mA) IO ≦ Fig.12③:θja=26.0℃/W → -38.4mW/℃ 25℃=4.80W → 85℃=2.496W Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating temperature ranges. The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is : Pc=VCC×(Ib+Ishort) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. (Please refer to Fig.4 for Ishort.) 6/10 2010.11 - Rev.A Technical Note BD3650FP-M ●Notes for use 1. Absolute maximum ratings Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode) when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC. 2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external circuits and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics. 3. GND potential The potential of the GND pin must be the minimum potential in the system in all operating conditions. Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics. 4. Ground wiring pattern When using both small-signal and large-current GND traces, the two ground traces should be routed separately but connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused by large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance. 5. Inter-pin shorts and mounting errors Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor soldering or foreign objects) may result in damage to the IC. 6. Operation in strong electromagnetic fields Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications where strong electromagnetic fields may be present. 7. Testing on application boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 8. Thermal consideration Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions. Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc) Tjmax : Maximum junction temperature=150[℃] , Ta : Peripheral temperature[℃] , θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W], Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current Package Power dissipation Power dissipation : Pd (W)=(Tjmax－Ta)/θja : Pc (W)=(Vcc－Vo)×Io+Vcc×Ib 9. Vcc pin Insert a capacitor(capacitor≧2.2µF～) between the Vcc and GND pins. The appropriate capacitance value varies by application. Be sure to allow a sufficient margin for input voltage levels. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/10 2010.11 - Rev.A Technical Note BD3650FP-M 10. Output pins It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable capacitance values range from 4.7µF to 1000µF. Ceramic capacitors can be used as long as their ESR value is low enough to prevent oscillation (0.001Ω to 2Ω). Abrupt fluctuations in input voltage and load conditions may affect the output voltage. Output capacitance values should be determined only through sufficient testing of the actual application. Vcc=5.6V～30V Ta=-40℃～+125℃ Io=0A～0.3A Cin=2.2µF～100µF Cout=4.7µF～100µF 10 Unstable operating region Cout_ESR(O） 1 0.1 Stable operating region 0.01 0.001 0 50 100 150 200 250 300 Io(mA) Cout_ESR vs Io(reference data) Vcc Vcc (5.6～30V) Vo Cout (4.7µF～) Cin (2.2µF～) GND ESR (0.001Ω～) Io (ROUT) ※Operation Notes10 Measurement circuit 11. Over current protection circuit (OCP) The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity. This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current (without latching) in the event of a large and instantaneous current flow from a large capacitor or other component. These protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous or transitive operation of the protection circuits. 12. Thermal shutdown circuit (TSD) The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after this function has activated, or in applications where the operation of this circuit is assumed. 13. Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal state may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in case Vcc is shorted with the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent reverse current flow, or insert bypass diodes between Vcc and each pin. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/10 2010.11 - Rev.A Technical Note BD3650FP-M 14. Positive voltage surges on VCC pin A power zener diode should be inserted between VCC and GND for protection against voltage surges of more than 36V on the VCC pin. Vcc GND 15. Negative voltage surges on VCC pin A schottky barrier diode should be inserted between VCC and GND for protection against voltages lower than GND on the VCC pin. Vcc GND 16. Output protection diode Loads with large inductance components may cause reverse current flow during startup or shutdown. protection diode should be inserted on the output to protect the IC. In such cases, a 17. Regarding input pins of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes and/or transistors. For example (refer to the figure below): ○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode ○When GND > Pin B, the PN junction operates as a parasitic transistor Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided. Transistor (NPN) Resistor (Pin B) (Pin A) (Pin B) B E C B P+ N P N P+ P N P+ N GND E P P+ N P substrate Parasitic elements or transistors GND Parasitic elements or transistors N N Parasitic elements C GND (Pin A) Parasitic elements Example of Simple Monolithic IC Architecture www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/10 2010.11 - Rev.A Technical Note BD3650FP-M ●Ordering part number B D ROHM model Name 3 6 Part No. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5 0 F P Package FP : TO252-3 10/10 - M E 2 Packaging and forming specification E2: Embossed tape and reel 2010.11 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. 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