5 4 3 2 1 J1 J2 1 3 5 7 9 2 4 6 8 10 CON2 CON2 1 2 DSIO DST2 VDD 102 101 100 99 98 96 73 74 75 NC VCC IN A GND OUT Y TC7SH14FU OSC4 OSC3 OSC2 4 TVEP TEST 35 AVDD 42 RTCVDD 59 IO1_VDD 32.768kHz C11 4 X2 FA-238 1 3 1 MC-146 C12 C15 2 4 C16 VDD C17 20MHz 10pF 15pF 15pF R5 R6 0 OPEN RTCVDD TH2.54-P1.0 TP3 C5 RTCVDD 0.1uF 87 IO2_VDD 49 68 C1 C3 C8 C13 CN3 VDD 10k 10pF LVDD VDD R11 1M X1 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 VDD 107 103 105 106 104 36 37 38 39 13 22 47 58 95 117 69 70 41 40 46 48 R10 10M 5 0.1uF 34 32 P33 30 P35 28 P21 26 24 P23 22 P25 20 P16 18 P13 16 14 12 10 8 #STBY 6 REGU_CE 4 2 AIN0 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 B P34 P20 P22 P24 P17 P14 P15 WAKEUP AIN1 TH2.54-P1.0 P71 P73 P75 P77 AIN2 PA7 PB6 PA0 P60 P61 P62 PA3 P64 P65 P67 BUSIO_VDD VDD REGU_VDD TC7SH14FU C10 0.1uF 10uF 1 2 3 REGU_CE 5 4 1 C U3 R13 C7 NC VCC IN A GND OUT Y PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 OPEN R14 2 U2 1 2 3 86 85 84 83 82 81 80 79 0.1uF 0.1uF 0.1uF 0.1uF R12 100k 3 4 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 IO1_VDD #NMI #RESET WAKEUP #STBY 1 560 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 RTCVDD VDD 43 SW1 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 AVDD IO2_VDD 44 B PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 TP1 BUSIO_VDD DCLK DSIO/P36 DST2/P37 VDD R8 CN2 P90 P91 P92 P93 P94 P95 P96 P97 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 S1C17803 P40/US_SDI0/I2S_SDO/I2CM_SDA P41/US_SDO0/I2S_WS/I2CM_SCL P42/US_SCK0/I2S_SCK/ATMA P43/#US_SSI0/I2S_MCLK/TML P44/EXCL1/TMH/I2CS_SDA P45/ATMA/TML/#I2CS_BRST OSC1 EVQQ2K03W PC0/I2S_SDO/FPDAT0 PC1/I2S_WS/FPDAT1 PC2/I2S_SCK/FPDAT2 PC3/I2S_MCLK/FPDAT3 PC4/TMH/FPDAT4 PC5/TML/FPDAT5 PC6/EXCL0/FPDAT6 PC7/ATMB/FPDAT7 P30/WDT_CLK/US_SDI1/EXCL1 P31/SIN/US_SDO1 P32/SOUT/US_SCK1 P33/#SCLK/#US_SSI1 P34/TMH P35/TML S1G D1 P90/D0 P91/D1 P92/D2 P93/D3 P94/D4 P95/D5 P96/D6 P97/D7 PB0/D8 PB1/D9 PB2/D10 PB3/D11 PB4/D12 PB5/D13 PB6/D14 PB7/D15 U1 6 7 21 14 3 5 11 2 P31 67 66 65 64 63 62 P20/I2CM_SDA/US_SDI0/EXCL0 P21/I2CM_SCL/US_SDO0/TMH P22/I2CS_SDA/US_SCK0/#SMRD P23/I2CS_SCL/#US_SSI0/#SMWR P24/ATMA/#ADTRG P25/ATMB/#I2CS_BRST P26/#SMRD P27/#SMWR P50 P51 P52 P53 P54 P55 P56 P57 P11 #RESET P30 P31 P32 P33 P34 P35 PA0/#CE0 PA1/#CE1 PA2/#CE2 PA3/#CE3 PA4/#RD PA5/#WRL PA6/#WRH/#BSH PA7/#WAIT 97 93 94 92 91 90 89 88 P45 P52 P53 P55 P57 PC0 PC2 PC4 PC6 P27 P12 61 60 57 56 55 54 77 78 P40 P41 P42 P43 P44 P45 VDD J3 CON10A P20 P21 P22 P23 P24 P25 P26 P27 P10/I2S_SDO P11/I2S_WS P12/I2S_SCK P13/I2S_MCLK P14/CMU_CLK P15/#ADTRG P16/REMC_IN P17/REMC_OUT VSS NC NC VSS NC 33 1 2 2 R4 71 72 76 50 51 45 52 53 P50/US_SDI1/CMU_CLK/REMC_IN P51/US_SDO1/#WDT_NMI/REMC_OUT P52/US_SCK1/WDT_CLK/I2CS_SCL P53/#US_SSI1/#ADTRG/EXCL0 P54/#SMRD/FPFRAME P55/#SMWR/FPLINE P56/REMC_IN/FPSHIFT P57/REMC_OUT/FPDRDY REGU_CE LVDD REGU_VDD REGU_VSS CON2 P10 P11 P12 P13 P14 P15 P16 P17 AIN0/P00 AIN1/P01 AIN2/P02 AIN3/P03 VSS VSS VSS VSS VSS VSS R1 10k JP1 34 33 32 31 #NMI #RESET WAKEUP #STBY 1 .. . C VDD AIN0 AIN1 AIN2 AIN3 118 119 120 121 124 125 127 128 122 123 126 113 17 114 4 9 D P86 P84 P82 PB5 P80 P90 P92 PB0 P94 PB2 P97 TH2.54-P1.0 VDD PC1 PC3 PC5 PC7 P26 P51 P54 P56 P44 P42 P40 P60 P61 P62 P63 P64 P65 P66 P67 P70 P71 P72 P73 P74 P75 P76 P77 P80 P81 P82 P83 P84 P85 P86 P91 P93 PB1 P95 P96 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 8 10 12 15 16 18 19 20 23 24 25 26 27 28 29 30 116 115 112 111 110 109 108 P85 P83 PB3 P81 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 P60/A0/#BSL P61/A1 P62/A2 P63/A3 P64/A4 P65/A5 P66/A6 P67/A7 P70/A8 P71/A9 P72/A10 P73/A11 P74/A12 P75/A13 P76/A14 P77/A15 P80/A16 P81/A17 P82/A18 P83/A19 P84/A20/#CE1 P85/A21 P86/A22 D 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 P10 #NMI P30 P32 CN1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 P50 P43 P41 VDD R15 VDD LVDD C18 C19 A 4.7uF 0.1uF R16 OPEN BUSIO_VDD1 3 PA4 5 PA5 7 PA1 9 PB7 11 PA6 13 15 P63 17 PB4 19 P66 21 PA2 23 P70 25 P72 27 P74 29 P76 31 AIN3 33 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 A LVDD TP6 TH2.54-P1.0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 CN4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 0 TP7 REGU_VDD R17 OPEN C24 1uF Title C25 SVTmini17803 0.1uF Size A3 Date: 5 4 3 2 Document Number SC15_SVTmini17803_Schematic Friday, July 31, 2015 Sheet 1 Rev 1.5 1 of 1