4 3 CB20 CB21 + E16 CB22 + E17 CB23 + E18 C20 OPEN 0.1uF 47uF/16V 0.1uF 47uF/16V 0.1uF 47uF/16V R1 TCK TDO TDI TMS 0 0 R174 OPEN 2 2N3904 C 3 R34 10K 2 2 2 1 HA1 HEADER 26 SMD0.5 BOTTOM 3 2SK3018 L20 C31 R36 V1P4 OPEN + E20 C32 C30 R37 OPEN R38 OPEN OPEN TRO FOO OPEN ADIN 220uF/16V Change R37 from 0 to R FB,0603 Change R38 from 0 to R L19 Change C32 from 15nF to C 89V33 Change PIN 47 from LIMIT to ADIN TP36 TDI TMS TCK TDO USBVDD ADIN Add AVCC at PIN16 A2 A3 A4 A5 A6 A7 A8 A18 A19 V18 2 USBVDD C CB26 L21 C B 3 E 0.1uF 2SB1132 1 10uH 1 2 8550 Q30 C34 L22 R39 6.8 R41 6.8 XI XO 10uF/16V C11 33pF Y1 Y2 Y3 Y4 Y6 Y5 VSYNC# FS0 FS1 RGB_SWITCH HSYNC# ACLK ABCK ALRCK RESET# MUTE_DAC ASDAT2 ASDAT1 ASDAT0 47nF PLLVDD3 0.47uF AGND DVDA DVDB DVDC DVDD DVDRFIP DVDRFIN MA MB MC MD SA SB SC SD CDFON CDFOP TNI TPI MDI1 MDI2 LDO2 LDO1 SVDD3 CSO/RFOP RFLVL/RFON SGND V2REFO V20 VREFO FEO TEO TEZISLV OP_OUT OP_INN OP_INP DMO FMO TROPENPWM PWMOUT1/V_ADIN9 TRO FOO USB_VSS USBP USBM USB_VDD3 FG/V_ADIN8 TDI/V_ADIN4 TMS/V_ADIN5 TCK/V_ADIN6 TDO/V_ADIN7 DVDD18 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 HIGHA0 IOA18 IOA19 DVSS APLLCAP APLLVSS 1500pF E21 3 0.1uF C35 LDO2 + D Add LC circuit R40 47uF/16V 0 LDO_AV33 SONY KHM280 10uH FB,0603 + 1 C36 0.1uF 2 8550 Q31 DV33A E22 47uF/16V 89V33 YUV0/CIN FS VREF DACVDDC RD16 RD17 RD18 RD19 RD20 RD21 DVDD3 RD22 RD23 DQM2 DQM3 RD24 RD25 DVSS RD26 DVDD18 RD27 RD28 RD29 RD30 RD31/ASDATA5 DVDD3 RA4 RA5 RA6 DVSS RA7 DVSS RA8 RA9 RA11 CKE RCLK DVDD3 RCLKB RVREF/V_ADIN3 DVDD18 RA3 RA2 RA1 DVSS RA0 RA10 BA1 DVSS BA0 RCS DVDD3 RAS CAS RWE DQM1 DQS1 RD8 DVSS RD9 RD10 RD11 DR12 RD13 U4 MT1389 Pin assignment version 1.5 IR V18 Y0 FS 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 R24 VSTB C22 VSCK 100pF VSDA 10 5P/2.5 R25 C29 0.1uF 560 DQ22 DQ23 DQM2 DQM3 DQ24 DQ25 MIC_OK DQ27 DQ28 DQ29 DQ30 DQ31 DV33 MA4 MA5 MA6 GND URST# 1 VCC 1,3,4,5 AVDD3 MA8 MA9 MA11 DCKE DCLK L38 DV33A FB,0603 POWER Y[1..6] HSYNC# VSYNC# FS0 FS1 RGB_SWITCH TP33 TP32 DCLKB MA3 MA2 MA1 Y[1..6] 4 HSYNC# 4 VSYNC# 4 FS0 4 FS1 4 RGB_SWITCH 4 VIDEO INTERFACE MA0 MA10 BA1 A[0..21] AD[0..7] PRD# PWR# PCE# BA0 CS# RAS# CAS# WE# DQM1 LIMIT DQ8 MA[0..11] DQ[0..31] BA[0..1] TP38 Change the LIMIT singal from PIN 46 to PIN136 DQ9 DQ10 DQ11 DQ12 DQ13 DQM[0..3] DCLK DCKE CAS# RAS# WE# CS# A[0..21] 3 AD[0..7] 3 PRD# 3 PWR# 3 PCE# 3 FLASH MA[0..11] 3 DQ[0..31] 3 BA[0..1] 3 DQM[0..3] 3 DCLK 3 DCKE CAS# RAS# WE# CS# CB1 CB27 CB28 CB29 CB30 SCL 3 SDA 3 CB31 IIC TMO_VCC 30 A TRSO V1P4 STBY PREGND VINLD CTK2 CTK1 VINTK BIAS STBY G1 VNFFC VOSL VINSLVINSL+ CF2 CF1 VINFC SPSP+ TP44 TP46 C37 MO_VCC C38 C39 51K 27k 10k 10k FOO TRO FMO DMO C40 R53 20k R56 20K FOSO C42 150pF DV33 R54 R55 Chang the TRIN&TROUT pull high power from 5V to 3V3 10k 10k E36 + 2 R60 E24 Q32 Q33 8550 8550 0.1uF DQ14 DQ2 DQ1 DQ0 DQ15 DQ4 DQ3 DQ6 DQ5 URST# IR DQM0 DQS0 DQ7 VSCK VSDA VSTB SCL SDA MIC_OK MIC_MUTE RXD TXD M- MO_VCC FB 4 Q28 2 MGND 8050 3 CB33 ALRCK ACLK ABCK CB35 CB36 CB37 CB10 0.1uF OPEN 0.1uF 0.1uF ASPDIF RESET# CB34 OPEN 0.1uF ASDAT2 CB40 CB41 CB42 CB43 ASDAT1 8050 R4 DRAWED: 750R DESIGNED: 0.1uF OPEN 0.1uF 0.1uF ASDAT0 Title R5 TRCLOSE CHECKED: 1K 750R MUTE_DAC 5 A ASDAT2 5 ASDAT1 5 ASDAT0 5 MIC_DATA Q29 R178 2 ASPDIF 5 RESET# 4 AUDIO INTERFACE 5P/2.0 470R R57 ALRCK 5 ACLK 5 ABCK 5 OPEN 5 4 3 2 1 TROUT + TRIN 2 C28 0.1uF R177 L24 1K 5 0.1uF 89V33 J4 470R E23 220uF/16V VCC DV33A CB32 C90 3 + C46 0.1uF 0.1uF MUTE_DAC 碳膜2.2ohm 0.1uF DMSO V1P4 R48 1k MO_VCC R59 V1P4 R52 10K V18 1 2 3 4 RxD TxD BA5954 R58 10K 0.1uF 4P/2.0 J3 DV33 560pF 560pF 0.1uF 15nF 29 7 6 5 4 3 2 1 AD7 A17 A0 AD4 AD5 AD6 A21 AD0 AD1 AD2 AD3 A10 A9 A20 PCE# A1 PRD# PWR# A16 A15 A14 A13 A12 A11 14 13 12 11 10 9 8 R46 R47 R49 R50 1 C43 0.1uF G2 VOFC+ VOFCVOSL+ VOSLPGND PVCC1 VCC 0.1uF 0.1uF 89V33 FOSO TRSO FMSO DMSO 3 C41 150pF 22 23 24 25 26 27 28 FMSO VOTK+ VOTKVOLD+ VOLDPGND VNFTK PVCC2 R45 1 3 20k R44 1 1 R51 TP 1 15 16 17 18 19 20 21 B 3 3 3 3 3 MEMORY DV33A 3 T+ 1,3,4,5 AVCC 1 V18 1 DV33 1,3,5 DV33 URST# VCC 89V33 MA7 LDO1 U5 SL+ SL- TP43 TP45 MIC_MUTE 5 C GND AVCC V18 SCL SDA TP40 TP MIC_OK 5 MIC_MUTE DQ26 V18 1 R43 1 1 2 3 4 5 Change R15 from 1.5k to 1.8k 3 R42 1 L45 L44 L43 L41 L40 L23 FF+ TP39 0 0 0 0 0 TP8 DACVDD3 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 BOTTOM 1 JP2 TP31 AVCC FB,0603 C33 0.1uF 100 FEO TEO 2 TEZISLV OPO OPOP+ DMO FMO TROPEN 0.1uF R173 T26 T+ 25 F24 F+ 23 22 21 20 19 18 MDI1 17 0 16 R176 15 14 13 B 12 E 11 D 10 C 9 8 H 7 G 6 A 5 4 V20 3 F 2 RFO 1 V2P8 V20 V1P4 TP28 TP29 TP30 Very Important to reduce Noise 100K Q3 3 2SK3018 R35 1 RFOP 2 RFON 1 JP1 0.1uF IOA Q1 2N3904 SMT 3 Q2 MDI1 MDI2 LDO2 LDO1 RFSVDD3 CB25 1 2S 0 0 0 0 F H G E 10K 100K D 2SK3018 R26 TP15 R27 R28 R29 AVCC R33 R32 1uF TP16 TP17 TP18 TP19 TP20 TP21 TP22 TP23 C E OPEN A B C D 3 B 1uF C27 MDI2 IOA 1 1uF C24 1uF C26 1uF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 C23 C25 C45 STBY TRCLOSE TROUT TRIN R30 R31 B A D C C28->R174:1K C27:C->1uF RFO LIMIT 10k Add a Pull-Up( 10K ) resistor on LIMIT signal. B 27MHz C5 1000pF APLLVDD3 IOWR A16 HIGHA7 HIGHA6 HIGHA5 HIGHA4 HIGHA3 DVDD3 HIGHA2 HIGHA1 IOA20 IOCS IOA1 IOOE DVDD3 AD0 AD1 AD2 AD3 DVSS AD4 AD5 AD6 IOA21/V_ADIN0 ALE AD7 A17 IOA0 DVSS UWR URD DVDD18 UP1_2 UP1_3 UP1_4 UP1_5 UP1_6 UP1_7 UP3_0 UP3_1 UP3_4 UP3_5 DVDD3 ICE PRST IR INT0 DQM0 DQS0 RD7 DVSS RD6 RD5 DVSS RD4 RD3 DVDD18 RD2 RD1 RD0 RD15 DVDD3 RD14 0.1uF 1 C10 33pF 2.7uH AVDD3 IREF RFGC OSN OSP CEQN CEQP RFGND CRTPLP HRFZC RFRPAC RFRPDC RFVDD3 S_VREFN S_VREFP ADCVSS S_VCM ADCVDD3 LPFOP LPFIN LPFIP LPFON PLLVDD3 IDACEXLP PLLVSS JITFN JITFO XTALI XTALO RFVDD18 RFGND18 SPDIF MC_DATA DVSS ASDATA4 DVDD18 ASDATA3 ASDATA2 ASDATA1 ASDATA0 DVSS ACLK ABCK ALRCK DVDD3 SPBCK/ASDATA5 SPLRCK SPDATA SPMCLK HSYNC/V_ADIN2 YUV7/ASDATA5 VSYNC/V_ADIN1 DVDD3 YUV6/R YUV5/B DACVSSA YUV4/G DACVDDA YUV3/CVBS DACVSSB YUV2/C DACVDDB YUV1/Y DACVSSC RFV18 CB24 G 89V33 J2 FB,0603 L17 MDI1 DQS0 L42 V18 256 255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 6P/2.0 CON2.0-6 V18 DV33 33nF 0.1uF Change the conector arrange E1 10uF/16V DACVDD3 V1P4 + E15 1k DACVDD3 V20 CB17 XO 0.1uF ASPDIF MIC_DATA V2P8 0.1uF Y1 JITFN JITFO XTALI LIMIT C9 DACVDD3 100k XI R13 0.1uF 6 5 4 3 2 1 RFSVDD3 C to 2200pF 0.1uF to C from 750k to 680k from 390k to 150k 0.1uF 1 Change C3 from Change C2 from Change R10,r15 Change R17,R19 Add C74 2200pF V1P4 DV33 L11 Remove 74H04 Add CE1 10uF C14 C21 R22 SP+ SPSLSL+ C74 2200pF J1 R14 15k CB19 0.1uF 0.1uF D R19 150k C13 R15 680k OPEN AVDD3 R18 RFVDD3 TP5 TP6 VREFP OPOP+ R17 150k 0.1uF TP4 1 Change R4,R5,R6,R8,R12 from 1k to R FB,0603 C19 ADIN VREFN 0 JITFN 750k R16 C18 ADCVDD3 R11 OPO C12 2200pF C3 CB16 390pF R3 + PLLVDD3 2 C1 TP3 TP2 C2 OPEN R10 680k R7 100k V1P4 1000pF C6 20pF C4 RFVDD3 C7 0.1uF CB15 VREFN C15 1uF 0.1uF C8 0.1uF VREFP C16 1uF CB18 ADCVDD3 OPEN C17 47nF JITFO RFV33 RFV18 5 MIC_DATA 5 NINTAUS MPEG-1389-A Size C Document Number INDEX Rev A APPROVED: TROPEN Date: 2 Sheet 20030912 1 1 of 4 5 4 3 2 1 SD33 U7 U8 D 21 22 23 24 27 28 29 30 31 32 20 19 SDCLK 35 SDCKE 34 DCS# DRAS# DCAS# DWE# 18 17 16 15 DQM0 DQM1 14 36 33 37 26 50 C A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 21 22 23 24 27 28 29 30 31 32 20 19 SDCLK 35 SDCKE 34 1 25 SD33 7 13 38 44 DCS# DRAS# DCAS# DWE# 18 17 16 15 DQM2 DQM3 14 36 33 37 4 10 41 47 26 50 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CLK CKE CS RAS CAS WE NC NC CB48 CB49 OPEN 0.1uF D CB52 CB53 CB54 CB55 CB56 CB57 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 100uF/16V SD33 DV33 L25 0 SD33 + E27 OPEN VCC 4 10 41 47 L26 OPEN L27 FB,0603 2 MA[0..11] 2 BA[0..1] 2 DQM[0..3] 2 DCLK 2 DCKE 2 CAS# 2 RAS# 2 WE# 2 CS# OPEN FLASH_VCC DV33 ESMT M12L16161A-? 0.1uF DQ[0..31] 2 DQ[0..31] CB58 CB59 ESMT M12L16161A-? 0.1uF + E26 7 13 38 44 VSSQ VSSQ VSSQ VSSQ VSS VSS CB46 0.1uF SD33 SD33 VCCQ VCCQ VCCQ VCCQ CB45 0.1uF 100uF/16V OPEN 1 25 VCC VCC DQML DQMH DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 SD33 CB44 + E25 + E3 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 MA[0..11] BA[0..1] DQM[0..3] DCLK DCKE CAS# RAS# WE# CS# C + E28 DRAM 47uF/16V RN1 U9 A20 R61 0 AA20 A21 R62 0 AA21 DCS# DRAS# DCAS# DWE# 1 3 5 7 2 4 6 8 CS# RAS# CAS# WE# 2 PCE# 2 PRD# 2 PWR# PCE# PRD# PWR# 22x4 B MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 DBA0 DBA1 23 24 25 26 29 30 31 32 33 34 22 35 20 21 SDCLK 38 SDCKE 37 DCS# DRAS# DCAS# DWE# 19 18 17 16 DQM0 DQM1 15 39 36 40 54 41 28 A A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 BA0/A13 BA1/A12 CLK CKE DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 U11 SD33 CS RAS CAS WE VCC VCC VCC DQML DQMH NC NC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ VSS VSS VSS 1 14 27 FLASH_VCC SD33 3 9 43 49 6 12 46 52 R70 10k A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 AA20 AA21 PCE# PRD# PWR# 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 26 28 11 12 FLASH_VCC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 WP/ACC BYTE VCC CE OE WE GND1 GND2 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 DBA0 R63 22 BA0 DBA1 R64 22 BA1 SDCKE R65 22 DCKE SDCLK R66 22 DCLK A[0..21] AD[0..7] AD[0..7] FLASH 2 2 SCL SDA SCL SDA B IIC GND GND DV33 Change R67 from R to 10k 14 R67 VCC 1,2,4,5 1,2,5 1,2,4,5 DV33 A0 10k DV33 47 R68 R69 680 680 U12 37 CB61 27 46 DV33 VCC FLASH_VCC 0.1uF CB60 CB62 CB9 0.1uF OPEN OPEN 1 2 3 4 NC NC NC GND VCC WP SCL SDA 8 7 6 5 SCL SDA RESET EEPROM 24C16 SO8NB OPEN TSOP 48 pin OPEN TSOP54 2 A[0..21] 2 A 8M 16M 32M FLASH DRAWED: Title DESIGNED: NINTAUS MPEG-1389-A CHECKED: Size C Document Number INDEX Rev A APPROVED: Date: 5 4 3 2 20030912 Sheet 1 2 of 4 5 4 2 1 Y[1..6] VSYNC# HSYNC# +5VV R172 75,1% D4 +5VV L28 FB,0603 C47 220pF R73 150 C48 100pF R169 75,1% RESET# 1N4148 G/Y 1N4148 L29 FB,0603 1 Q7 8550 C49 220pF R75 150 1 5 5 5 D5 D6 Y4 2 2 5 5 G/Y B/U R/V RESET# 2 GND GND 21 Q6 8550 21 Y1 FL FR 2 SY 2 VSYNC# HSYNC# G/Y B/U R/V +5VV 1N4148 D Y[1..6] FL FR 2 +5VV 3 C50 100pF D 1,2,3,5 D7 VCC 1N4148 +12V C -12V 1 2 VCC 1,2,3,5 +12V 1,5 -12V 1,5 E3 B +5VV +5VV 2N3904 2 VCC R171 75,1% L30 OPEN D8 +5VV Q9 FB 2 8550 3 L31 1N4148 SC R81 150 L32 FB,0603 C52 100pF +5VV +5VV TO-92 1 C51 220pF D10 2 Q8 8550 21 Y2 R112 75,1% 1N4148 R133 R83 碳膜 100ohm D9 10k 1 1N4148 + E33 B/U C53 220pF R84 150 C54 100pF 3 R88 D11 1N4148 4.7k 1 RESET# 47uF/16V CB67 0.1uF C 9014 1 C Q11 2 L33 FB,0603 Q10 8550 21 Y5 +5VV 2 +5VV D12 R170 75,1% 1N4148 +5VV Q12 8550 R91 150 C55 220pF C56 100pF R92 0 +5VV SC CVBS_ST 2 Y3 21 CVBS L34 1.8uH D14 CB68 1N4148 OPEN R9 75,1% SY D13 CVBS 1N4148 1 R/V L35 FB,0603 Q13 8550 C57 220pF R94 150 5 SY 5 CVBS 5 21 Y6 SC C58 100pF D15 1 1N4148 B B SCART CONTROL 11P/2.0 R/V 5 5 G/Y R/V 6 G/Y +12V R98 OPEN R99 OPEN OPEN 2 Q14 1 FS0 OPEN B E 3904 / 3906 R102 R103 2 OPEN OPEN VSYNC# 2 1 6P/2.0 J405 GND OPEN SCART_P11 Q16 1 OPEN 3 R105 HSYNC# OPEN OPEN R104 FS1 SD33 A R100 Q15 2 2 OPEN 4 3 C 1 J401 5 B/U ASPECT 3 B/U 1 2 3 4 5 6 7 8 9 10 11 3 5 FR GND FL GND B/U ASPECT G/Y R/V RGB/CVBS# CVBS_ST SCART_P11 A RGB/CVBS# OPEN 2 R106 OPEN R107 OPEN CB71 OPEN DRAWED: Title DESIGNED: 2 RGB_SWITCH CHECKED: NINTAUS MPEG-1389-A Size C Document Number INDEX Rev A APPROVED: Date: 5 4 3 2 20030912 Sheet 1 3 of 4 5 4 -12V +12V DV33 VCC VCC VCC E90 R109 1 100uF/16V 2 2 10uF/16V R307 Q17 9015 U13A 1 3 C60 NJM4558 OPA 30K R117 100 E41 FL + 5.1k 10K 10uF/16V Q19 9014 DQ213 1 2200pF R6 +12V 10K 470 D A_MUTE 100uF/16V C120 R114 0 AGND 0.1uF R316 R123 R30810K 100pF -12V R125 100k -12V 3 2 MIC_MUTE Q37 9014 R128 R315 6 U13B 5 C62 NJM4558 OPA 33K R129 100 E45 7 5.1k 10k FR 10uF/16V Q21 9014 DQ213 1 2200pF +12V R8 10K 2 -12V R127 10uF/16V + DAC_FR R318 470 3 R124 OPEN R126 E44 R309 10K Q20 OPEN 1 4 OPEN 10uF/16V + E89 10uF/16V 8 OPEN MUTE_DAC +5V + R122 2 0.1uF R121 + CB8 A_AVDD A_AVDD CB73 0.1uF + E43 C61 20k + A_DVDD CB72 + E42 0.1uF 100uF/16V 10 E91 470 VCC R120 10 R116 10k 1 MIC_IN A_DVDD VCC R115 3 R310 3 9015 FL FR 4 FL 4 FR R113 + E39 E40 DAC_FL 2 + E38 10uF/16V MIC_OK 2 3 Q18 MUTE_DAC 1 2 4.7k 1 2 ALRCK 2 ALRCK 2 MUTE_DAC 1N4148 100pF -12V - D 22k 1N4148 C59 20k Q38 9014 D18 OPEN R212 10K + E37 R111 ACLK ABCK 150K R31910K 8 D17 R312 4 光线 7.5mm 2 2 1 ASPDIF R311 + 0 D16 1 2 ACLK 2 ABCK 1 + OPEN 2 ASPDIF 2 +5V R110 R108 GND 1,2,3,4 GND 3 +12V + -12V +12V DV33 VCC - 1 1,4 1,2,3 1,2,3,4 CB3 100uF/16V 0.1uF CN2 GND MIC_IN -P12V +P12V L46 0 L39 0 L6 OPEN L1 0 1 2 3 4 MIC_IN G/Y B/U R/V MIC_IN G/Y B/U R/V 4P/2.0 C J402 R132 A_DVDD U17 DA1196 ASDAT0 R143 ASDAT1 R144 ASDAT2 R145 R304 2 MIC_DATA 33 33 33 OPEN SDAT0 SDAT1 SDAT2 AMDAT 4 R/V 4 CVBS G/Y DAC_FR E46 DAC_FL DAC_SL R136 5.1k R135 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 + AVDD1 OUT0R GR0 OUT0L AGND2 OUT1R GR1 OUT1L AGND1 OUT2R GR2 OUT2L CAP AVDD2 2 2 U15A 10uF/16V 10k 3 C64 DAC_SL NJM4558 OPA 2200pF DAC_LFE R137 100 E47 1 DAC_SR R/V 3 CVBS 4 SL 5 10uF/16V Q22 9014 DQ213 1 R12 +12V 10K 4 B/U B/U 6 C89 E60 0.1uF 100uF/16V 20k I2S FORMAT 100pF FL 1 6 2 U15B E50 5 C66 NJM4558 OPA 5P/2.0 10uF/16V R20 +12V R152 J406 20k ASPDIF VCC 10K 6 SL 7 8 SR C67 11 10uF/16V 10k 1 NJM4558 OPA MIC_IN 1 EC305 3 C68 5 6 2200pF OPEN 八孔AV座 12 1 2 3 4 5 B 6 7 8 9 10 11 12 +12V CENT 3 R317 4 + OPEN OPEN 4 R155 100 E52 + SRST R320 U16A 10uF/16V R23 10K 2 +12V GND Q24 9014 DQ213 1 8 OPEN EC307 EC308 GND GND C301 OPEN R313 OPEN R314 OPEN 20k C69 0.1uF 100pF DAC_LFE 4 -12V E53 GND CB79 0.1uF -12V GND R163 R164 + GND CB78 R158 A 10uF/16V 5.1k 10k C72 6 5 U16B 7 SUB 10uF/16V R21 CB81 CB82 0.1uF 0.1uF 0.1uF A 10K 2 +12V CB80 Q25 9014 DQ213 1 8 NJM4558 OPA 2200pF R165 100 E54 3 CS5333 OPEN + 16 15 14 13 12 11 10 9 + VL RST MCLK VQ SCLK LIN SDATA RIN VA R_GND GND FIL+ LRCK TST DIV DIF 2 - SLRCK 1 2 3 4 5 6 7 8 R153 SUB + SACLK SBCLK AMDAT E51 DAC_CENT U302 R154 5.1k 10 100pF - DV33 +3.3V GND 9 CENT -12V GND FR 2 5 4 3 2 1 4 5 Q23 9014 DQ213 1 8 2200pF 3 FL 3 10k FR SR + 10uF/16V B R149 100 + + 4 R148 5.1k R147 7 2 ASPDIF VCC 3 J404 C65 - DAC_SR SC SY 2 GND R146 -12V SC SY 四孔AV座 1 DAC_CENT E49 4 4 1 3 SACLK SLRCK SBCLK G/Y C 2 33 33 33 4 -12V DVDD MCLK BCLK LRCK DIN0 DIN1 DIN2 MODE MUTE LRCIN2 DGND ML/I2S MC/IWL MD/DM 8 ACLK R138 ALRCK R139 ABCK R142 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SACLK SBCLK SLRCK SDAT0 SDAT1 SDAT2 ASDAT0 2 ASDAT0 + ASDAT1 2 ASDAT1 100pF - 2 ASDAT2 C63 20k A_AVDD + ASDAT2 1 4 4 4 DRAWED: Title DESIGNED: CHECKED: NINTAUS MPEG-1389-A Size C Document Number INDEX Rev A APPROVED: Date: 5 4 3 2 Sheet 20030912 1 4 of 4