EM MICROELECTRONIC - MARIN SA EM4133 512 bit Read/Write, ISO15693 Standard Compliant Contactless RW Identification Device General Description Features ISO15693 Standard: Fully compliant, support all Mandatory and most part of the Optional commands Operating Frequency: 13.56MHz ± 7kHz (ISM, world-wide licence free available) 64-bit Unique Identifier (UID) 448 bit EEPROM organized in 14 words of 32 bits 302 bit of user’s free memory 32 bit password to protect the data memory integrity Lock feature convert EEPROM words in Read Only Secure data transfers using the Login command Smart Electronic Article Surveillance (EAS) Two different on-chip resonant capacitor: 23.5pF and 97pF (selectable by mask option) ISO/IEC 15693 anti-collision algorithm allowing more tags in reader field at the same time No external supply buffer capacitor needed (passive mode) -40 to +85˚C temperature range Bonding pads optimised for flip-chip assembly The EM4133 is a CMOS integrated circuit intended for use in passive contactless Read/Write transponders full compliant with the ISO 15693 standard. The user’s configurable 448 bit EEPROM memory is organized in 14 words of 32 bits, each word can be irreversibly locked. The memory contains a 64 bit unique serial number. The ISO 15693 anticollision algorithm allows operating more tags in the field simultaneously. IC is completely ISO 15693 compliant since it includes all ISO15693 mandatory features. Applications Laundry Access Control Ticketing Asset management Typical Operating Configuration C1 EM4133 C2 Fig. 1 IC Block Diagram L2 Lr VPOS Cr CBU F RECTIFIER R E G U L A T O R Vdd POWER MONITOR POR PCK L1 CLOCK EXTRACTOR AM DEMODULATOR RECEIVED CLOCK EEPROM PULSE LOGIC MOD MODULATOR LIMITER Fig.2 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 1 www.emmicroelectronic.com EM4133 Abbreviations AFE Analog Front-End AFI Application family identifier ASK Amplitude shift keying CRC Cyclic redundancy check DSFID Data storage format identifier EOF End of frame LSB Least significant bit MSB Most significant bit PPM Pulse position modulation RF Radio frequency RFU Reserved for future use SOF Start of frame SUM Super User Memory SM System Memory VCD Vicinity coupling device (reader) VICC Vicinity integrated circuit card (tag) UID Unique identifier Definitions, abbreviations and symbols Terms and definitions Downlink communication tag to reader communication link Uplink communication reader to tag communication link Modulation index index equal to [a-b]/[a+b] where a and b are the peak and minimum signal amplitude respectively. Note: The value of the index may be expressed as a percentage. Subcarrier a signal of frequency fs used to modulate the carrier of frequency fc Byte a byte consists of 8 bits of data designated b1 to b8, from the most significant bit (MSB,b8) to the least significant bit (LSB,b1) Symbols a Carrier amplitude without modulation b Carrier amplitude when modulated fc Frequency of operating field (carrier frequency) fs Frequency of subcarrier Anticollision loop Algorithm used to prepare for and handle a dialogue between a VCD and one or more VICCs from several in its energising field. Handling Procedures Absolute Maximum Ratings Parameter Symbol Supply Voltage Voltage at any other pin except L1,L2 Storage temperature Maximum AC current induced on L1, L2 Electrostatic discharge 1) VPOS Conditions -0.3 to 7V Vpin VSS-0.3 to 3.6V Tstore -55 to +125V Icoil_RMS 50mA VESD 2000V Table 1 This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level. Operating Conditions Parameter AC peak current induced on L1, L2 in operating conditions Operating temperature Note 1: Human Body Model (HBM; 100pF, 1.5k Ohms) with reference to substrate VSS Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 2 Symbol Min Icoilop Top -40 Max Unit 30 mA 85 °C Table 2 www.emmicroelectronic.com EM4133 Electrical Characteristics Please note that electrical parameters are preliminary. Operating conditions (unless otherwise specified): VSS=0V fcoil = 13.56MHz Sine Wave Vcoil=4Vpp Parameter Resonance Capacitor Version 001 Symbol Top=25°C Conditions Min. Typ. Max. Unit Cr23 F = 13.56MHz U = 2Vrms 21.1 23.5 25.8 pF Resonance Capacitor Version 500 Cr97 F = 13.56MHz U = 2Vrms 87.3 97 106.7 pF EEPROM write voltage VWR Write Mode for EEPROM 1.8 V Modulator Voltage Drop, low current Vmodiso1 IL2 = 100uA 0.6 0.85 1.1 V Modulator Voltage Drop, high current Vmodiso2 IL2 = 5mA 1.3 1.55 1.85 V EEPROM Cycling Endurance EEPROM Retention Ncy Tret erase all/ write all 10 5 Top=55°C after 10 cycles 5 Cycles 10 Year Table 3 Timing Characteristics All timings are derived from the field frequency and are specified as a number of RF periods. Parameter Symbol Min Max Unit Twr 85 120 85 632 RF Periods Teasw 100 992 101 504 RF Periods Twr - 86 656 RF Periods Teasw - 102 528 RF Periods 17 026 17 284 1 out of 4 mode Write Time 3) 3) EAS Write Time 1 out of 256 mode Write Time EAS Write Time Initialization EAS Timeout Tinit 4) Teas 9 408 RF Periods Table 4 Note 3: Min and Max value depends on last two bits send in message by the VCD Note 4: Min value is the time from Power On Reset, Max value is time after last transmission from EM4133 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 3 www.emmicroelectronic.com EM4133 Memory organisation The 512 bit EEPROM are organized in 14 words of 32 bits. Bit31 Bit0 Block nb PASSWORD 0 RFU 1 Super User Memory (31..17) EAS Lock Block (15 ... 0) 2 User Word 0 3 User Word 1 4 User Word 2 5 User Word 3 6 User Word 4 7 User Word 5 8 User Word 6 9 User Word 7 10 User Word 8 11 UID (31..0) 12 UID (63..32) 13 Fig.3 Access rights Password is located at block 0. It is never readable but written only in Secure mode after a successful Login command. Memory Block #1 is reserved for future uses. No access to this block is possible. Super User Memory, EAS and the Lock Block area (block2) can be read by all users but written only in Secure mode. Lock block bits define which memory blocks are locked against programming/writing operations The UID (blocks 12 and 13) is factory programmed, definitely write protected and always readable. All user memory words (Blocks 3 to 13) are always readable and can be write protected with the corresponding lock bits. Write access rights to User Words (blocks 3 to 11) depend on appropriate Lock Block bit Secure mode is enabled only by a successful Login command (right password value) Lock Block definition Bit 31 Bit 17 Bit 16 Bit15 Bit14 Bit13 Bit12 Block 2 Super User Memory EAS 1 1 1 1 Protected Block - - 15 14 13 12 Bit 11 … 2 .. Bit 1 Bit 0 1 0 1 0 Table 5 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 4 www.emmicroelectronic.com EM4133 Functional Description Modulation of the carrier for 100% ASK 1. Initial dialogue for vicinity cards The dialogue between the VCD and the VICC (one or more VICCs may be present at the same time) is conducted through the following consecutive operations: Activation of the VICC by the RF operating field of the VCD VICC waits silently for a command from the VCD Transmission of a command by the VCD Transmission of a response by the VICC These operations use the RF power transfer and communication signal interface specified in the following paragraphs and are performed according to the protocol defined in ISO/IEC 15693-3. 2. Power transfer Power transfer to the VICC is accomplished by radio frequency via coupling antennas in the VCD and in the VICC. The RF operating field that supplies power to the VICC from the VCD is modulated for communication from the VCD to the VICC, as described in clause 3. Fig.4.a Modulation of the carrier for 10% ASK 2.1 Frequency The frequency fc of the RF operating field is 13,56 MHz ±7 kHz. 2.2 Operating field The VCD is capable of powering any single reference VICC (defined in the test methods) at manufacturer’s specified positions (within the operating volume). The VCD does not generate a field higher than the value specified in ISO/IEC 15693-1 (alternating magnetic field) in any possible VICC position. Test methods for determining the VCD operating field are defined in ISO/IEC 10373-7. 3. Communications signal interface VCD to VICC For some parameters several modes have been defined in order to meet different international radio regulations and different application requirements. From the modes specified any data coding can be combined with any modulation. However, combination of 1 out of 256 coding and 100% ASK modulation is not recommended as it may lead to synchronisation problems. Regulatory wise, this combination do not have any benefit. The following combinations are recommended: 1 out of 256 + 10% ASK for FCC part 15 compliance 1 out of 4 + 100 % ASK or 10% ASK for ETSI 300 330 compliance 3.1 Modulation Communications between the VCD and the VICC takes place using the modulation principle of ASK. Two modulation indexes are used, 10% and 100%. The VICC decodes both. The VCD determines which index is used. Fig.4.b 3.2 Data rate and data coding Data coding modulation. is implemented using pulse position Two data coding modes are supported by the VICC. The selection is made by the VCD and indicated to the VICC within the start of frame (SOF), as defined in chapter 4.3. 3.2.1 Data coding mode: 1 out of 256 The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 256/fc (~18,88 µs), determines the value of the byte. In this case the transmission of one byte takes ~4,833 ms and the resulting data rate is 1,65 kbits/s (fc /8192). The last byte of the frame is completely transmitted before the EOF is sent by the VCD. Fig. Figure 5 illustrates this pulse position modulation technique. Depending on the choice made by the VCD, a "pause" will be created as described in Fig. 4.a and Fig. 4.b. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 5 www.emmicroelectronic.com EM4133 1 out of 256 coding mode 1 out of 4 coding mode Fig. 5 In Fig. , data 'E1' = (11100001)b = (225) is sent by the VCD to the VICC. The pause occurs during the second half of the position of the time period that determines the value, as shown in Fig. 6. Detail of one time period Fig. 7 For example Fig. 8 shows the transmission of 'E1' = (11100001)b = 225 by the VCD. 1 out of 4 coding example Fig. 8 Fig. 6 Note 5: In case of usage of 1/256 coding with 100% modulation index, an accurate timing is needed to ensure proper decoding. 3.2.2 Data coding mode: 1 out of 4 Pulse position modulation for 1 out of 4 mode is used, in this case the position determines two bits at a time. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. The resulting data rate is 26,48 kbits/s (fc /512). Fig. 7 illustrates the 1 out of 4 pulse position technique and coding. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 3.3 VCD to VICC frames Framing has been chosen for ease of synchronisation and independence of protocol. Frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using code violation. Unused options are reserved for future use by ISO/IEC. The VICC is ready to receive a frame from the VCD within 300 s after having sent a frame to the VCD. The VICC is ready to receive a frame within Tinit of activation by the powering field. ISO defines 1 ms 6 www.emmicroelectronic.com EM4133 3.3.1 SOF to select 1 out of 256 code The SOF sequence described in Fig. 9 selects the 1 out of 256 data coding mode. When two subcarriers are used, the frequency fs1 is fc /32 (423,75kHz), and the frequency fs2 is fc /28 (484,28kHz). If two subcarriers are present there is a continuous phase relationship between them. Start of frame of the 1 out of 256 mode 4.3 Data rates A low or high data rate may be used. The selection of the data rate is made by the VCD using the second bit in the protocol header as defined in Table 7. The VICC supports the data rates shown in Table 6. Fig. 9 Data Rate Low High 3.3.2 SOF to select 1 out of 4 code The SOF sequence described in Fig. 10 selects the 1 out of 4 data coding mode. Start of frame of the 1 out of 4 mode Fig. 10 3.3.3 EOF for either data coding mode The EOF sequence for either coding mode is described in Fig. 11 Single Subcarrier 6,62 kbits/s ( fc /2048) 26,48 kbits/s ( fc /512) Dual Subcarrier 6,67 kbits/s ( fc /2032) 26,69 kbits/s ( fc /508) Table 6 4.4 Bit representation and coding Data are encoded using Manchester coding, according to the following schemes. All timings shown refer to the high data rate from the VICC to the VCD. For the low data rate the same subcarrier frequency or frequencies are used, in this case the number of pulses and the timing is multiplied by 4. 4.4.1 Bit coding when using one subcarrier A logic 0 starts with 8 pulses of fc /32 (~423,75 kHz) followed by an unmodulated time of 256/ fc (~18,88 µs), see Fig. 12. Logic 0 End of frame for either mode Fig. 12 Fig. 11 4. Communications signal interface VICC to VCD For some parameters several modes have been defined in order to, allow for use in different noise environments and application requirements. A logic 1 starts with an unmodulated time of 256/ f c (~18,88 µs) followed by 8 pulses of f c /32 (~423,75kHz), see Fig. 13. Logic 1 4.1 Load modulation The VICC is capable of communication to the VCD via an inductive coupling area whereby the carrier is loaded to generate a subcarrier with frequency fs. The subcarrier is generated by switching a load in the VICC. The load modulation amplitude is at least 10 mV when measured as described in the test methods. Test methods for VICC load modulation are defined in International Standard ISO/IEC 10373-7. 4.2 Subcarrier One or two subcarriers may be used as selected by the VCD using the first bit in the protocol header as defined in Table 6.The VICC supports both modes. Fig. 13 4.4.2 Bit coding when using two subcarriers A logic 0 starts with 8 pulses of fc /32 (~423,75kHz) followed by 9 pulses of fc /28 (~484,28kHz),see Fig. 14. When one subcarrier is used, the frequency f s1 of the subcarrier load modulation is fc /32 (423,75kHz). Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 7 www.emmicroelectronic.com EM4133 Logic 0 4.5.2 SOF when using two subcarriers SOF comprises 3 parts: 27 pulses of fc /28 (~484,28kHz). 24 pulses of fc /32 (~423,75kHz). a logic 1 which starts with 9 pulses of f c /28 (~484,28 kHz) followed by 8 pulses of fc /32 (~423,75kHz). The SOF for 2 subcarriers is illustrated in Fig. 7. Fig. 14 Start of frame when using two subcarriers A logic 1 starts with 9 pulses of f c /28 (~484,28 kHz) followed by 8 pulses of f c /32 (~423,75 kHz), see Fig. . Logic 1 Fig. 17 4.5.3 EOF when using one subcarrier EOF comprises 3 parts: Fig. 15 4.5 VICC to VCD frames Framing has been chosen for ease of synchronisation and independence of protocol. a logic 0 which starts with 8 pulses of f c /32 (~423,75 kHz), followed by an unmodulated time of 256 / fc (~18,88 µs). 24 pulses of fc /32 (~423,75kHz). an unmodulated time of 768/ fc (~56,64 µs). The EOF for 1 subcarrier is illustrated in Fig. 8. End of frame when using one subcarrier Frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using code violation. Unused options are reserved for future use by the ISO/IEC. All timings shown below refer to the high data rate from the VICC to the VCD. Fig. 18 For the low data rate the same subcarrier frequency or frequencies are used, in this case the number of pulses and the timing is multiplied by 4. The VCD is ready to receive a frame from the VICC within 300 s after having sent a frame to the VICC. 4.5.1 SOF when using one subcarrier SOF comprises 3 parts: 4.5.4 EOF when using two subcarriers EOF comprises 3 parts: a logic 0 which starts with 8 pulses of f c /32 (~423,75 kHz) followed by 9 pulses of f c /28 (~484,28 kHz). 24 pulses of f c /32 (~423,75kHz). 27 pulses of f c /28 (~484,28kHz). The EOF for 2 subcarriers is illustrated in Fig. 9. an unmodulated time of 768/ f c (~56,64 µs). 24 pulses of f c /32 (~423,75kHz). a logic 1 which starts with an unmodulated time of 256/ f c (~18,88 µs), followed by 8 pulses of f c /32 (~423,75 kHz). End of frame when using 2 subcarriers The SOF for one subcarrier is illustrated in Fig. 6. Start of frame when using one subcarrier Fig. 19 Fig. 16 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 8 www.emmicroelectronic.com EM4133 5. Definition of data elements 5.1 Unique identifier (UID) The VICCs are uniquely identified by a 64 bit unique identifier (UID). This unique number is used for addressing each VICC uniquely and individually, during the anticollision loop and for one-to-one exchange between a VCD and a VICC (addressed mode). The UID is set permanently by the IC manufacturer in accordance with Fig. 20: UID format MSB 63 LSB 56 ‘E0’ 1 bit CAP 55 48 IC Mfg Code 5 bit IC Id 47 0 IC manufacturer serial number 10 bit Customer Id 32 bit Unique Serial Number Fig. 20 The UID comprises: The 8 MSB bits are 'E0' The IC manufacturer code, on 8 bits according to ISO/IEC 7816-6:1996/Amd.1 EM-Microelectronic is identified by code 0x16. A unique serial number on 48 bits assigned by the IC manufacturer. Note 5: 64 bit UID is stored in EEPROM. EM IC manufacturer code is programmed with the 0x16 value. 48 bits of IC manufacturer serial number are composed of 1 bit capacitor value, 5 bit IC code (different for each member of EM ISO 15693 family),10 bit Customer Id and 32 bit unique serial number. IC Id: “0x07” corresponds to EM4133. CAP value bit: ’0’ corresponds to a Cres of 23.5pF ‘1’ corresponds to a Cres of 97pF Lock_flag B2 to B8 RFU Upon reception of a request from the VCD, the VICC verifies that the CRC value is valid. If it is invalid, it will discard the frame and will not answer (modulate). Upon reception of a response from the VICC, it is recommended that the VCD verify that the CRC value is valid. If it is invalid, actions to be performed are left to the responsibility of the VCD designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first. CRC bits and bytes transmission rules LSByte LSBit MSByte MSBit CRC 16 (8 bits) LSBit MSBit CRC 16 (8 bits) first transmitted bit of the CRC Fig. 22 6. Overall protocol description 6.1 Protocol concept The transmission protocol (or protocol) defines the mechanism to exchange instructions and data between the VCD and the VICC, in both directions. a) the protocol is based on an exchange of a request from the VCD to the VICC a response from the VICC(s) to the VCD The conditions under which the VICC sends a response are defined in clause 9.1. Block security status B1 The two bytes CRC are appended to each request and each response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF up to but not including the CRC field. This means that any VICC does not start transmitting (i.e. modulating according to ISO/IEC 15693-2) unless it has received and properly decoded an instruction sent by the VCD. 5.3 Block security status The block security status is sent back by the VICC as a parameter in the response to a VCD request as specified in clause 10 (e.g. Read Multiple block). It is coded on one byte. Flag name The initial register content is all ones: 'FFFF'. It is based on the concept of "VCD talks first". 5.2 Application family identifier (AFI) EM4133 does not support AFI feature. Bit 5.4 CRC The CRC is calculated in accordance with ISO/IEC 13239. Information on how to calculate the CRC can be found in annex C of ISO/IEC 15693-3 document. Value 0 1 0 Description Not locked Locked b) each request and each response are contained in a frame. The frame delimiters (SOF, EOF) are specified in 3.3. Fig. 21 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 9 www.emmicroelectronic.com EM4133 c) each request consists of the following fields: Flags Command code Mandatory and optional parameters fields, depending on the command Application data fields CRC 6.3 Request format The request consists of the following fields: Flags Command code (see clause 9) Parameters and data fields CRC (see 5.4) General request format d) each response consists of the following fields: Flags Mandatory and optional parameters fields, depending on the command Application data fields CRC e) the protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8), i.e. an integer number of bytes. f) a single-byte field is transmitted least significant bit (LSBit) first. SOF Data CRC EOF It consists of eight bits. Request flags 1 to 4 definition Bit b1 b2 i) RFU flags are set to zero (0). b3 6.2 Modes The term mode refers to the mechanism to specify in a request the set of VICC’s that answers to the request. b4 Note 6: Note 7: Flag name Value Description A single sub-carrier 0 frequency is used by the VICC Sub-carrier_flag Two sub-carriers are 1 used by the VICC 0 Low data rate is used Data_rate_flag 1 High data rate is used Flags 5 to 8 meaning is 0 according to Table 8 Inventory_flag Flags 5 to 8 meaning is 1 according to Table 9 No protocol format 0 extension Protocol Protocol format is Extension_flag 1 extended. Reserved for future use Table 7 Sub-carrier_flag refers to the VICC-to-VCD communication as specified in 4.3. Data_rate_flag refers to the VICC-to-VCD communication as specified in 4.3. Request flags 5 to 8 definition when inventory flag is NOT set If it matches, it executes it (if possible) and returns a response to the VCD as specified by the command description. Bit Flag name Value b5 Select_flag 0 If it does not match, it remains silent. 0 6.2.2 Non-addressed mode When the Address_flag is set to 0 (non-addressed mode), the request does not contain a unique ID. b6 Address_flag 1 Any VICC receiving a request with the Address_flag set to 0 executes it (if possible) and returns a response to the VCD as specified by the command description. 0 b7 If tag detects an error in received message (incorrect flags, out of memory, etc.) it doesn’t respond in non-addressed mode. It returns error code only in case a message was addressed directly to this tag. Option_flag 1 b8 RFU Description EM4133 does not support Select feature. If this flag is set EM4133 will not respond Request is not addressed. UID field is not included. It is Executed by any VICC Request is addressed. UID field is included. It is executed only by the VICC whose UID matches the UID specified in the request Meaning is defined by the command description. It is set to 0 if not otherwise defined by the command Meaning is defined by the command description 0 Table 8 6.2.3 Select mode EM4133 does not support Select mode. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 Parameters 6.3.1 Request flags In a request, the field "flags" specifies the actions to be performed by the VICC and whether corresponding fields are present or not. h) the setting of the flags indicates the presence of the optional fields. When the flag is set (to one), the field is present. When the flag is reset (to zero), the field is absent. Any VICC receiving a request with the Address_flag set to 1 compares the received unique ID (address) to its own ID. Command code Fig. 23 g) a multiple-byte field is transmitted least significant byte (LSByte) first, each byte is transmitted least significant bit (LSBit) first. 6.2.1 Addressed mode When the Address_flag is set to 1 (addressed mode), the request contains the unique ID (UID) of the addressed VICC. Flags 10 www.emmicroelectronic.com EM4133 Request flags 5 to 8 definition when inventory flag is set Bit Flag name Value b5 AFI_flag 0 b6 Nb_slots_flag 0 1 b7 Option_flag 0 1 b8 RFU Description EM4133 does not support AFI feature. If this bit is set EM4133 does not respond to Inventory command 16 slots 1 slot Meaning is defined by the command description. It is set to 0 if not otherwise defined by the command Meaning is defined by the command description 6.4 Response format The response consists of the following fields: Flags one or more parameter fields Data CRC (see 5.4) Power-off Ready Quiet Parameters Data EM4133 supports mandatory power-off, ready and quiet states. 6.5.1 Power-off state The VICC is in the power-off state when it cannot be activated by the VCD. 6.5.2 Ready state The VICC is in the Ready state when it is activated by the VCD. It processes any request where the select flag is not set. General response format Flags 6.5 VICC states A VICC can be in one of the 4 following states: The transition between these states is specified in Fig.. 0 Table 9 SOF There is no response from Tag: when Select or AFI flag is set when CRC error is detected when wrong flags are set in Inventory when command was sent in non-addressed mode when RFU or Protocol Extension flag is set CRC EOF Fig. 24 6.4.1 Response flags In a response, it indicates how actions have been performed by the VICC and whether corresponding fields are present or not. 6.5.3 Quiet state When in the quiet state, the VICC processes any request where the Inventory_flag is not set and where the Address_flag is set. Reset To Ready command is accepted and executed also with address flag cleared. Response flags 1 to 8 definition Bit b1 b2 b3 Flag name Value 0 No error 1 Error detected. Error code is in the "Error" field. Error_flag RFU RFU 0 0 0 b4 Extension_flag 1 b5 b6 b7 b8 RFU RFU RFU RFU Description No protocol format extension Protocol format is extended. Reserved for future use. 0 0 0 0 Table 10 6.4.2 Response error code When the Error_flag is set by the VICC, the error code field is included. EM4133 supports only error code 0x0F. The device responds with an error code only if command was sent in addressed mode Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 11 www.emmicroelectronic.com EM4133 VICC state transition diagram Power-Off In Field Out of field Out of field Ready Reset to ready Any other command where Select_flag is not set Stay Quiet (UID) Quiet Any other command where the Address_flag is set AND wher Inventory_flag is not set Fig.25 Note 1: The VICC state transition diagram shows only valid transitions. In all other cases the current VICC state remains unchanged. When the VICC cannot process a VCD request (e.g. CRC error, etc.), it stays in its current state. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 12 www.emmicroelectronic.com EM4133 7. Anticollision The purpose of the anticollision sequence is to make an inventory of the VICCs present in the VCD field by their unique ID (UID). The VCD is the master of the communication with one or multiple VICCs. It initiates card communication by issuing the inventory request. j) all VICCs are ready to receive another request. If it is an inventory command, the slot numbering sequence restarts from 0. Note 8: The decision to interrupt the anticollision sequence is up to the VCD. It could have continued to send EOF’s till slot 15 and then send the request to VICC 1. The VICC sends its response in the slot determined or does not respond, according to the algorithm described in clause 7.2. 7.1 Explanation of an anticollision sequence Fig. summarises the main cases that can occur during a typical anticollision sequence where the number of slots is 16. The different steps are: a) the VCD sends an inventory request, in a frame, terminated by a EOF. The number of slots is 16. b) VICC 1 transmits its response in slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; c) the VCD sends an EOF, meaning to switch to the next slot. d) in slot 1, two VICCs 2 and 3 transmits their response, this generates a collision. The VCD detects it and remembers that a collision was detected in slot 1. e) the VCD sends an EOF, meaning to switch to the next slot. f) in slot 2, no VICC transmits a response. Therefore the VCD does not detect a VICC SOF and decides to switch to the next slot by sending a EOF. g) in slot 3, there is another collision caused by responses from VICC 4 and 5 h) the VCD then decides to send an addressed request (for instance a Read Block) to VICC 1, which UID was already correctly received. i) all VICCs detect a SOF and exit the anticollision sequence. They process this request and since the request is addressed to VICC 1, only VICC1 transmit its response. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 13 www.emmicroelectronic.com EM4133 Description of a possible anticollision sequence Slot 0 VCD SOF Inventory request EOF EOF VICCs Response 1 Timing t1 Comment T2 t1 No collision Time Continued … Slot 1 Slot 2 VCD VICCs EOF EOF Response 2 Response 4 Response 3 Response 5 Timing Comment Slot 3 t1 T3 t1 No VICC response Collision Collision Time Continued … VCD SOF Request to VICC 1 EOF Response from VICC1 VICCs Timing t2 t1 Comment Time Note 9: t1, t2 and t3 are specified in clause 7.3. Fig. 26 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 14 www.emmicroelectronic.com EM4133 7.2 Request processing by the VICC Principle of comparison between the mask value, slot number and UID The Inventory request contains the mask value and its length. The mask is padded with 0’s to a whole number of bytes. Padding Mask value received in Inventory request The mask value less the padding is loaded into comparator. Mask length Upon reception of the Inventory request, the VICC resets its slot counter to 0 Upon reception of an EOF, the VICC increments its slot counter and loads it into the comparator, concatenated with the mask value (less padding) Slot counter The concatenated result is compared with the least significant bits of the VICC UID. If it matches, the VICC shall transmit its response, according to the other criteria (e.g. AFI, Quiet state). Slot number Ignore Mask value(less padding) Compare Unique identifier (UID) Fig.27 Note 10: When the slot number is 1 (Nb_slots_Flag is set to 1), the comparison is made only on the mask (without padding). Upon reception of a valid request, the VICC processes it by executing the operation sequence specified in the following text in Fig.28. NbS is the total number of slots (1 or 16) SN is the current slot number (0 to 15) SN_length is set to 0 when 1 slot is used and set to 4 when 16 slots are used LSB (value, n) function returns the n least significant bits of value "&" is the concatenation operator Slot_Frame is either a SOF or an EOF Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 15 www.emmicroelectronic.com EM4133 SN= 0 if Nb_slots_flag then NbS =1 SN_length=0 else NbS = 16 SN_length=4 endif label1: f LSB(UID, SN_length + Mask_length) = LSB(SN, SN_length)&LSB(Mask, Mask_length) then transmit response to inventory request endif wait (Slot_Frame) if Slot_Frame= SOF then Stop anticollision and decode/process request exit endif if SN<NbS-1 then SN = SN +1 goto label1 exit endif exit Fig.28 7.3 Request parameters When issuing the Inventory command, the VCD sets the Nb_slots_flag to the desired setting and add after the command field the mask length and the mask value. The mask length indicates the number of significant bits of the mask value. It can have any value between 0 and 60 when 16 slots are used and any value between 0 and 64 when 1 slot is used. LSB is transmitted first. The mask value is contained in an integer number of bytes. LSB is transmitted first. If the mask length is not a multiple of 8 (bits), the mask value MSB is padded with the required number of null (set to 0) bits so that the mask value is contained in an integer number of bytes. The next field starts on the next byte boundary. Inventory request format SOF Flags Command Mask length Mask Value 8 bits 8 bits 8 bits 0 to 8 bytes CRC 16 16 bits EOF Fig.29 Example of the padding of the mask To switch in next slot, an EOF has to be sent from a Reader. Any pulse with minimal specified width is considered as EOF in anti-collision sequence. The first slot starts immediately after the reception of the request EOF. To switch to the next slot, the VCD sends an EOF. The rules, restrictions and timing are specified in clause 7.3. 8. Timing specifications The VCD and the VICC comply with the following timing specifications. 8.1 VICC waiting time before transmitting its response after reception of an EOF from the VCD When the VICC has detected an EOF of a valid VCD request or when this EOF is in the normal sequence of a valid VCD request, it waits for a time t1 before starting to transmit its response to a VCD request or before switching to the next slot when in an inventory process (see 7.2 and 7.1) t1 starts from the detection of the rising edge of the EOF received from the VCD (see 3.3.3). Note 11: The synchronisation on the rising edge of the VCD-toVICC EOF is needed for ensuring the required synchronisation of the VICC responses. The minimum value of t1 is t1min= 4320/fc (318,6 µs) 0000 0100 1100 1111 Pad Mask value Fig. 30 In the example of the Fig. 30, the mask length is 12 bits. The mask value MSB is padded with four bits set to 0. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 The nominal value of t1 is t1nom= 4352/fc (320,9 µs) The maximum value of t1 is t1max= 4384/fc (323,3 µs) t1max does not apply for Write alike requests. Timing conditions for Write alike requests are defined in the command descriptions. 16 www.emmicroelectronic.com EM4133 If the VICC detects a 100% carrier modulation during this time t1, it resets its t1 timer and waits for a further time t1 before starting to transmit its response to a VCD request or to switch to the next slot when in an inventory process. 8.2 VICC modulation ignore time after reception of an EOF from the VCD When the VICC has detected an EOF of a valid VCD request or when this EOF is in the normal sequence of a valid VCD request, it ignores any received 10 % modulation during a time tmit. During an inventory process, when the VCD has started to receive one or more VICC responses (i.e. it has detected a VICC SOF and/or a collision), it : waits for the complete reception of the VICC responses (i.e. when a VICC EOF has been received or when the VICC nominal response time tnrt has elapsed), waits an additional time t2 and then sends a 10 % or 100 % modulated EOF to switch to the next slot. t2 starts from the time the EOF has been received from the VICC (4.5.3,4.5.4). tmit starts from the detection of the rising edge EOF received from the VCD (see 3.3.3). The minimum value of t2 is t2min = 4192/fc (309,2 µs). The minimum value of tmit is tmit tmin = 4384/fc (323,3 µs) + tnrt tnrt is dependent on the VICC-to-VCD data rate and subcarrier modulation mode (4.5, 4.5.1, 4.5.2). where tnrt is the nominal response time of a VICC. 8.4.2 When the VCD has received no VICC response Remark: This chapter refers to VCD only. tnrt is dependent on the VICC-to-VCD data rate and subcarrier modulation mode (see 4.5.1, 4.5.2). Note 12: The synchronisation on the rising edge of the VCD-toVICC EOF is needed for ensuring the required synchronisation of the VICC responses. 8.3 VCD waiting time before sending a subsequent request Remark: This chapter refers to VCD only. a) When the VCD has received a VICC response to a previous request other than Inventory and Quiet, it waits a time t2 before sending a subsequent request. t2 starts from the time the EOF has been received from the VICC. b) When the VCD has sent a Quiet request (which causes no VICC response), it waits a time t2 before sending a subsequent request. t2 starts from the end of the Quiet request EOF (rising edge of the EOF plus 9,44 µs, see 3.3.3). During an inventory process, when the VCD has received no VICC response, it waits a time t3 before sending a subsequent EOF to switch to the next slot. t3 starts from the time the VCD has generated the rising edge of the last sent EOF. a) If the VCD sends a 100 % modulated EOF, the minimum value of t3 is t3min = 4384/fc (323,3 µs) + tsof b) If the VCD sends a 10 % modulated EOF, the minimum value of t3 is t3min = 4384/fc (323,3 µs) + tnrt where tsof is the time duration for a VICC to transmit an SOF to the VCD. tnrt is the nominal response time of a VICC. The minimum value of t2 is t2min = 4192/fc (309,2 µs). Note 11: This ensures that the VICCs are ready to receive this subsequent request (see 4.5). Note 12: The VCD should wait at least 1 ms after it activated the powering field before sending the first request, to ensure that the VICCs are ready to receive it (see 4.5). tnrt and tsof are dependent on the VICC-to-VCD data rate and subcarrier modulation mode (see 4.5, 4.5.1,4.5.2). c) When the VCD has sent an Inventory request, it is in an inventory process. See 8.4. 8.4 VCD waiting time before switching to the next slot during an inventory process Remark: This chapter refers to VCD only. An inventory process is started when the VCD sends an Inventory request. (see 7.2, 7.1, 9.3.1), To switch to the next slot, the VCD may send either a 10 % or a 100 % modulated EOF independent of the modulation index it used for transmitting its request to the VICC, after waiting a time specified in 8.4.1 and 8.4.2. 8.4.1 When the VCD has started to receive one or more VICC responses Remark: This chapter refers to VCD only. Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 17 www.emmicroelectronic.com EM4133 9. Commands The Inventory_flag is set to 1. The meaning of flags 5 to 8 is according to Table 9. 9.1 Command types Four sets of commands are defined: mandatory, optional, custom and proprietary. All VICCs with the same IC manufacturer code and same IC version number behave the same. Inventory request format SOF 9.2 Command codes Table 11 shows all implemented commands in EM4133. b4 0 0 0 B5 0 0 0 b6 X 1 X b7 0 0 x b8 0 0 0 x x 0 0 0 X x 0 Mask value CRC 16 8 bits 8 bits 8 bits 0-64 bits 16 bits EOF x x 0 0 0 X 0 0 x x x x 0 0 0 0 0 0 0 X 0 0 0 0 The DSFID – DSIFD feature is not supported by EM4133, zero value is returned The unique ID number If the VICC detects an error, it remains silent. Sub-carrier Inventory response format SOF Flags DSFID UID CRC 16 8 bits 8 bits 64 bits 16 bits EOF Fig.32 RFU ‘26’ ‘A0’ ‘E4’ b3 1 0 0 Option ‘23’ b2 x x x Addressed ‘21’ b1 x x x Select Inventory Stay Quiet Write single block Optional Read multiple blocks Optional Reset to ready Custom Toggle EAS Proprietary Login Inventory Mandatory Mandatory Optional Active Flags Protocol ext. ’01’ ‘02’ Mask length The response contains: Function Data rate Type Inventory Fig.31 Command codes Command code Flags Table 11 9.3.2 Stay quiet (Command code = ‘02’) When receiving the Stay quiet command, the VICC enters the quiet state and does not send back a response. There is NO response to the Stay quiet command. x means used flag, can be 0 or 1. When in quiet state: Mandatory commands the VICC does not process any request where Inventory_flag is set, the VICC processes any addressed request The VICC exits the quiet state when: RFU Option Select Inventory Stay Quiet Addressed Mandatory Mandatory Active Flags b1 b2 b3 b4 B5 B6 b7 b8 x x 1 0 0 x 0 0 x x 0 0 0 1 0 0 Inventory ‘01’ ‘02’ Function Protocol ext. Type Sub-carrier Command code Data rate 9.3 reset (power off), receiving a Reset to ready request with UID. It goes then to the Ready state. Stay quiet request format Table 12 SOF 9.3.1 Inventory (Command code = ‘01’) Flags Stay quiet UID CRC 16 8 bits 8 bits 64 bits 16 bits EOF Fig.33 When receiving the Inventory request, the VICC performs the anticollision sequence. Request parameter: The request contains: UID (mandatory) The Stay quiet command is always executed in Addressed mode (Address_flag is set to 1). The flags, The Inventory command code The mask length The mask value The CRC Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 18 www.emmicroelectronic.com EM4133 Optional Commands supported by EM4133 Optional 0 0 0 x x 0 x 0 0 0 x 0 0 CRC16 16 bits EOF Response parameter: Error_flag (and Error code if Error_flag is set) RFU ‘26’ Flags 8 bits Fig.36 x Option Optional SOF b2 B3 b4 b5 b6 b7 b8 x 0 0 0 x x 0 Addressed ‘23’ b1 Write single x block Read multiple x blocks Reset to x ready Select Optional Write single block response format when Error_flag is NOT set Active Flags Protocol ext. ‘21’ Function Inventory Type Sub-carrier Command code Data rate 9.4 9.4.2 Read multiple blocks (Command code = ‘23’) When receiving the Read multiple block command, the VICC reads the requested block(s) and send back their value in the response. Table 13 If the Option_flag is set in the request, the VICC returns the block security status, followed by the block value sequentially block by block. 9.4.1 Write single block (Command code = ‘21’) When receiving the Write single block command, the VICC writes the requested block with the data contained in the request and report the success of the operation in the response. If the Option_flag is not set in the request, the VICC returns only the block value. The blocks are numbered from '00' to '0D' (0 to 13). If the Option_flag is not set, the VICC returns its response when it has completed the write operation starting after (Twr). The number of blocks in the request is one less than the number of blocks that the VICC returns in its response. If Option_flag is set, the VICC waits for the reception of an EOF from the VCD and upon such reception returns its response. The VCD must wait maximum Twr time before sending EOF in order to ensure proper energy condition to VICC during EEPROM programming. Any pulse with minimal specified width is considered as. EXAMPLE A value of '06' in the "Number of blocks" field requests to read 7 blocks. A value of '00' requests to read a single block. Write single block request format Read multiple blocks request format SOF Command timing: VCD UID First block number Number of blocks CRC 16 8 bits 8 bits 64 bits 8 bits 8 bits 16 bits Response Flags Write single block UID block number Data CRC 16 8 bits 8 bits 64 bits 8 bits 32 bits 16 bits EOF Request parameter: (Optional) UID First block number Number of blocks Read multiple blocks response format when Error_flag is set Fig.34 Request parameter: (Optional) UID Block number Data SOF Flags 8 bits Error Code 8 bits CRC16 16 bits EOF Fig.38 Write single block response format when Error_flag is set Flags 8 bits EOF Fig.37 Twr SOF Read multiple block Write Single Block VICC SOF Flags Error Code 8 bits CRC16 16 bits If VCD tries to read a block protected against Read the data bits and the block security status byte will be masked with ‘0’. It concerns block 0 and 1 which are never readable. EOF Fig.35 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 19 www.emmicroelectronic.com EM4133 Repeated as needed Table 14 Fig.39 9.5.1 Toggle EAS (Command code = ‘A0’) Response parameter: Error_flag (and Error code if Error_flag is set) if Error_flag is not set (the following order is respected in the VICC response) Block security status N (if Option_flag is set in the request) Block value N Block security status N+1 (if Option_flag is set in the request) Block value N+1 etc. where N is the first requested (and returned) block. 9.4.3 Reset to ready (Command code = ‘26’) As default, the EAS feature is not set. To activate the EAS, toggle command is sent by the VCD and a one bit EAS is used to apply the subcarrier fc/32 at the input of the modulator. Toggle EAS command is accepted only in Secure mode upon successful Login with correctly signed CRC. The EAS bit is stored in block 2. When EAS mode is on, the circuit modulates a constant sub-carrier of 423.75kHz (fc/32). Between POR and start of EAS, a 1.2 ms pause is given to enable VCD to switch off EAS mode by sending the toggle EAS command. This timeout is reset when command is sent. It gives enough time to send Login and Write to disable EAS feature. The VICC returns its response when it has completed the write operation starting after (Tweas) If IC Mfg Code is not correct, the tag remains silent. When receiving a Reset to ready command, the VICC shall return to the Ready state. Toggle EAS request format Reset to ready request format Command timing: SOF Flags 8 bits Reset to ready UID 8 bits 64 bits CRC 16 VCD VICC EOF Toggle EAS Response Tweas 16 bits Fig. 40 SOF Request parameter: Flags 8 bits Toggle EAS 8 bits IC Mfg code 8 bits CRC 16 16 bits Request parameter: Select response format when Error_flag is set IC manufacturer code according to ISO/IEC 6:1996/Amd.1. 0x16 for EM-Microelectronic. Flags 8 bits EOF Fig.43 UID (optional) SOF Error Code 8 bits CRC16 16 bits EOF 7816- Toggle EAS response format when Error_flag is set Fig.41 SOF Select block response format when Error_flag is NOT set SOF Flags 8 bits CRC16 16 bits EOF Flags 8 bits Error Code 8 bits CRC16 16 bits EOF Fig.44 EAS bit is located in LSB position of answered byte. Fig.42 Response parameter: Error_flag (and Error code if Error_flag is set) 9.5 Custom commands Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 RFU EOF Option 16 bits Toggle EAS Select 32 bits Custom Addressed CRC 16 ‘A0’ Active Flags b1 b2 B3 b4 b5 b6 b7 b8 x x 0 0 0 0 0 0 Inventory 8 bits Data Function Protocol ext. Flags Type Sub-carrier SOF Block security status 8 bits Command code Data rate Read multiple block response format when Error_flag is NOT set 20 www.emmicroelectronic.com EM4133 Toggle EAS response format when Error_flag is NOT set SOF Flags 8 bits EAS bit 8 bits CRC16 16 bits EOF Fig.45 Function RFU Option Addressed Select b1 b2 b3 b4 b5 b6 b7 B8 x x 0 0 0 x 0 0 Inventory Proprietary Login Active Flags Sub-carrier ‘E4’ Type Protocol ext. Command code The Login command has to include the correct password value. The sent password is compared with password stored in block 0 of EEPROM. If the password is incorrect error “0x0F” is sent back and tag is kept in normal state. After a successful Login, the tag enters in the Secure mode. Proprietary commands Data rate 9.6 9.6.1 Login (Command code = ‘E4’) The Login command enables Secure mode of EM4133. Table 15 Proprietary command is used because commands following Login have to be sent and received in Secure mode where all CRC16 are signed. Secure mode is lost in case of: power on reset Login with incorrect password is sent any situation when tag does not respond CRC error Wrong UID IC Mfg Code is not correct an error, on which tag should not respond, occurred (for ex. Select flag is set, non addressed mode and an error occured) Stay Quiet, Inventory command In all other cases, the Secure mode is kept. Even an error occurs, the Secure mode is not lost. If IC Mfg Code is not correct tag remains silent. Login request format Sequencing: VCD VICC Login Write Response Response t1 SOF Twr Flags Login IC Mfg code UID Password 8 bits 8 bits 8 bits 64 bits 32 bits CRC 16 16 bits EOF Fig.47 Request parameter: IC manufacturer code according to ISO/IEC 6:1996/Amd.1. 0x16 for EM-Microelectronic. (Optional) UID 7816- Login response format when Error_flag is set SOF Flags 8 bits Error Code 8 bits CRC16 16 bits EOF Fig.48 Login response format when Error_flag is NOT set SOF Flags 8 bits CRC16 16 bits EOF Fig.49 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 21 www.emmicroelectronic.com EM4133 10. Chip Floorplan 2.6 0.15 80 80 5 128.5 4 3 713.725 871.1 1000 877.1 EM4133 2 156.1 1 126 874 1000 Pad Opening : 86µm X 86µm All dimensions in µm Fig.50 Pin description Pin Name I/O Description 1 COIL1 ANA Antenna terminal 2 COIL2 ANA Antenna terminal 3 VTest Power Active voltage pad: test purpose only 4 VSS Power Negative supply voltage: test purpose only 5 TEST_IO I/O Test Input/Output: test purpose only Table 16 Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 22 www.emmicroelectronic.com EM4133 11. Ordering Information From wafer from delivery, please, refer to EM4133 wafer specification document. EM4133 V1 WS 11 Circuit Nb: EM4133 - %%% Customer Version: %%% = only for custom specific version Version: V1 = 23.5pF resonant capacitor V2 = 97pF resonant capacitor Die form: WW = Wafer WS = Sawn Wafer/Frame Thickness: 6 = 6 mils (152um) 7 = 7 mils (178um) 11 = 11 mils (280um) Fig.51 Standard Versions: The versions below are considered standards and should be readily available. For the other delivery form, please contact EM Microelectronic-Marin S.A. Please make sure to give the complete part number when ordering. Part Number EM4133V1WW11 EM4133V1WS11E Package / Die Form Unsawn wafer, 11 mils thickness Sawn wafer, 11 mils thickness Delivery form / Bumping No bump Gold bump Table 17 EM Microelectronic-Marin SA (“EM”) makes no warranties for the use of EM products, other than those expressly contained in EM's applicable General Terms of Sale, located at http://www.emmicroelectronic.com. EM assumes no responsibility for any errors which may have crept into this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property rights of EM are granted in connection with the sale of EM products, neither expressly nor implicitly. In respect of the intended use of EM products by customer, customer is solely responsible for observing existing patents and other intellectual property rights of third parties and for obtaining, as the case may be, the necessary licenses. Important note: The use of EM products as components in medical devices and/or medical applications, including but not limited to, safety and life supporting systems, where malfunction of such EM products might result in damage to and/or injury or death of persons is expressly prohibited, as EM products are neither destined nor qualified for use as components in such medical devices and/or medical applications. The prohibited use of EM products in such medical devices and/or medical applications is exclusively at the risk of the customer Copyright 2012, EM Microelectronic-Marin SA 4133-DS.doc, Version 4.0, 5-Oct-12 23 www.emmicroelectronic.com