LRIS2K 2048-bit EEPROM tag IC at 13.56 MHz, with 64-bit UID and Password, ISO15693 and ISO18000-3 Mode 1 compliant Preliminary Data Features ■ ISO15693 standard fully compliant ■ ISO18000-3 mode 1 standard fully compliant ■ 13.56 MHz ±7 kHz carrier frequency ■ To Tag: 10% or 100% ASK modulation using 1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse position coding ■ From Tag: Load modulation using Manchester coding with 423 kHz and 484 kHz subcarriers in Low (6.6 Kbit/s) or High (26 Kbit/s) data rate mode. Supports the 53Kbit/s data rate with Fast commands ■ Internal tuning capacitor (21 pF, 23.5 pF, 28.5 pF, 97 pF) ■ 1 000 000 Erase/Write cycles (minimum) ■ 40 year data retention (minimum) ■ 2048 bits EEPROM with Block Lock feature ■ 64-bit unique identifier (UID) ■ Electrical article surveillance (EAS) capable (software controlled) ■ Kill function ■ Multipassword protection ■ Read & Write (block of 32 bits) ■ 6 ms programming time ■ Packages – ECOPACK® (RoHS compliant) Inlay A1 Antenna (A6) Antenna (A7) UFDFPN8 (MB) 2 × 3 mm² (MLP) Wafer April 2008 Rev 4 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/102 www.st.com 1 Contents LRIS2K Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.1 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.2 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.3 Initial dialogue for vicinity cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.3.1 Power transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.3.2 Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.3.3 Operating field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2 LRIS2K block security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Example of LRIS2K security protection . . . . . . . . . . . . . . . . . . . . . . . . 18 4 Communication signal from VCD to LRIS2K . . . . . . . . . . . . . . . . . . . . 19 5 Data rate and data coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 7 5.1 Data coding mode: 1 out of 256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2 Data coding mode: 1 out of 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 VCD to LRIS2K frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.4 Start of frame (SOF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Communications signal from LRIS2K to VCD . . . . . . . . . . . . . . . . . . . 26 6.1 Load modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.2 Subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.3 Data rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Bit representation and coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.1 2/102 Bit coding using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.1.1 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.1.2 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7.2 Bit coding using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.3 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.4 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 LRIS2K 8 Contents LRIS2K to VCD frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.1 SOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.2 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.3 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8.4 SOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.5 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.6 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.7 EOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.8 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.9 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.10 EOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.11 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.12 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9 Unique identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10 Application family identifier (AFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11 Data storage format identifier (DSFID) . . . . . . . . . . . . . . . . . . . . . . . . . 37 11.1 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 12 LRIS2K protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 13 LRIS2K states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 14 15 13.1 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 13.2 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 13.3 Quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 13.4 Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 14.1 Addressed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 14.2 Non-addressed mode (general request) . . . . . . . . . . . . . . . . . . . . . . . . . 42 14.3 Select mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3/102 Contents LRIS2K 15.1 16 17 Request_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 16.1 Response_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 16.2 Response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 17.1 Request parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 18 Request processing by the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 19 Explanation of the possible cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 20 Inventory Initiated command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21 Timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 21.1 t1: LRIS2K response delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 21.2 t2: VCD new request delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 21.3 t3: VCD new request delay in the absence of a response from the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 22 Commands codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 23 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 24 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 25 Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 26 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 27 Lock Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 28 Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 29 Reset to Ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 30 Write AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 4/102 LRIS2K Contents 31 Lock AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 32 Write DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 33 Lock DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 34 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 35 Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 36 Kill . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 37 Write Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 38 Lock Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 39 Present Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 40 Fast Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 41 Fast Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 42 Fast Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 43 Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 44 Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 45 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 46 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 47 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 48 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Appendix A Anticollision algorithm (Informative) . . . . . . . . . . . . . . . . . . . . . . . . 97 A.1 Algorithm for pulsed slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 5/102 Contents LRIS2K Appendix B CRC (informative) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 B.1 CRC error detection method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 B.2 CRC calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Appendix C Application family identifier (AFI) (informative) . . . . . . . . . . . . . . 100 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6/102 LRIS2K List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Memory block with protection status area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Protect status area organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Read / Write protection bit setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Password Control bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Password system area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 LRIS2K block security protection after power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 LRIS2K block security protection after a valid presentation of password 1 . . . . . . . . . . . . 18 10% modulation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Response data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 UID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 VCD request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 LRIS2K response frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 LRIS2K response depending on Request_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 General request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Definition of request_flags 1 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Request_flags 5 to 8 when Bit 3 = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Request_flags 5 to 8 when Bit 3 = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 General response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Definitions of response_flags 1 to 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Response error code definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Example of the addition of 0-bits to an 11-bit mask value . . . . . . . . . . . . . . . . . . . . . . . . . 47 Timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Inventory response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Stay Quiet request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 57 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 57 Write Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Write Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 59 Write Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 59 Lock Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Lock Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Lock Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Select Block response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . . . . 63 Select response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Reset to Ready request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Reset to Ready response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 64 Reset to Ready request format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Write AFI request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Write AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 7/102 List of tables Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97. Table 98. 8/102 LRIS2K Write AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Lock AFI request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Lock AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Lock AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Write DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Write DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . 68 Write DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Lock DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Lock DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . 70 Lock DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Get System Info request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Get System Info response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . 71 Get System Info response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Get Multiple Block Security Status request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Get Multiple Block Security Status response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Get Multiple Block Security Status response format when Error_flag is set . . . . . . . . . . . . 73 Kill request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Kill response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Kill response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Write Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Write Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 77 Write Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Lock Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Protect status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Lock Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 79 Lock Password response format when Error_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Present Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Present Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 81 Present Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 81 Fast Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Fast Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . 83 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Fast Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . 83 Fast Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Fast Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Fast Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Fast Initiate response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Initiate Initiated response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 A1 antenna on tape, mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 A6 antenna on tape mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 A7 antenna on tape mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 LRIS2K Table 99. Table 100. Table 101. Table 102. List of tables Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 CRC definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 AFI coding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 9/102 List of figures LRIS2K List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. 10/102 Pad connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 MLP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 100% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 1 out of 256 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Detail of a time period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 1 out of 4 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 1 out of 4 coding example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SOF to select 1 out of 256 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SOF to select 1 out of 4 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 EOF for either data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Logic 0, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 0, high data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 1, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 1, high data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 0, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 0, low data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 1, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 1, low data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 0, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 1, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 0, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 1, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Start of frame, high data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Start of frame, high data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Start of frame, low data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Start of frame, low data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Start of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Start of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 End of frame, high data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, high data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, low data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, low data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 End of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 LRIS2K decision tree for AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 LRIS2K protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 LRIS2K state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Principle of comparison between the mask, the slot number and the UID . . . . . . . . . . . . . 48 Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Stay Quiet frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Read Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 58 Write Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 60 Lock Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Select frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Reset to Ready frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . 64 Write AFI frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Lock AFI frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 LRIS2K Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57. Figure 58. Figure 59. Figure 60. Figure 61. Figure 62. Figure 63. Figure 64. List of figures Write DSFID frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . 69 Lock DSFID frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . 70 Get System Info frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 72 Get Multiple Block Security Status frame exchange between VCD and LRIS2K . . . . . . . . 74 Kill frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Write Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 78 Lock Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . 80 Present Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 82 Fast Read Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . 84 Fast Initiate frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Initiate frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 LRIS2K synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 A1 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 A6 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 A7 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) outline . . . . . . . . 95 11/102 Description 1 LRIS2K Description The LRIS2K is a contactless memory powered by the received carrier electromagnetic wave. It is a 2048-bit electrically erasable programmable memory (EEPROM). The memory is organized as 64 blocks of 32 bits. The LRIS2K is accessed via the 13.56 MHz carrier electromagnetic wave on which incoming data are demodulated from the received signal amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10% or 100% modulated with a data rate of 1.6 Kbit/s using the 1/256 pulse coding mode or a Data rate of 26 Kbit/s using the 1/4 pulse coding mode. Outgoing data are generated by the LRIS2K load variation using Manchester coding with one or two subcarrier frequencies at 423 KHz and 484 kHz. Data are transferred from the LRIS2K at 6.6 Kbit/s in low data rate mode and 26 Kbit/s high data rate mode. The LRIS2K supports the 53 Kbit/s in high data rate mode in one subcarrier frequency at 423 kHz. The LRIS2K follows the ISO 15693 recommendation for radio frequency power and signal interface. Figure 1. Pad connections LRIS2K Power Supply Regulator 2048 bit EEPROM memory AC1 ASK Demodulator Manchester Load Modulator AC0 AI12853 Table 1. Signal names Signal name Function AC1 Antenna coil AC0 Antenna coil Figure 2. MLP connections AC0 n/c n/c n/c 1 2 3 4 8 7 6 5 AC1 n/c n/c n/c AI11612 1. n/c means not connected internally. 12/102 LRIS2K 1.1 Description Memory mapping The LRIS2K is divided into 64 blocks of 32 bits as shown in Table 2. Each block can be individually read- and/or write-protected using a specific lock or password command. The user area consists of blocks that are always accessible. Read and Write operations are possible if the addressed block is not protected. During a Write, the 32 bits of the block are replaced by the new 32-bit value. The LRIS2K also has a 64-bit block that is used to store the 64-bit unique identifier (UID). The UID is compliant with the ISO 15963 description, and its value is used during the anticollision sequence (Inventory). This block is not accessible by the user and its value is written by ST on the production line. The LRIS2K also includes an AFI register in which the application family identifier is stored, and a DSFID register in which the data storage family identifier used in the anticollision algorithm is stored. The LRIS2K has four additional 32-bit blocks in which the Kill code and the password codes are stored. Table 2. Add Memory map 0 7 8 15 16 23 24 31 Protect status 0 User area 5 bits 1 User area 5 bits 2 User area 5 bits 3 User area 5 bits 4 User area 5 bits 5 User area 5 bits 6 User area 5 bits 7 User area 5 bits 8 User area 5 bits User area 5 bits User area 5 bits User area 5 bits 60 User area 5 bits 61 User area 5 bits 62 User area 5 bits 63 User area 5 bits UID 0 UID 1 UID 2 UID 3 UID 4 UID 5 UID 6 UID 7 AFI DSFID 0 Kill code 5 bits 1 Password code 1 5 bits 2 Password code 2 5 bits 3 Password code 3 5 bits 13/102 Description 1.2 LRIS2K Commands The LRIS2K supports the following commands: 14/102 ● Inventory, used to perform the anticollision sequence. ● Stay Quiet, used to put the LRIS2K in quiet mode, where it does not respond to any inventory command. ● Select, used to select the LRIS2K. After this command, the LRIS2K processes all Read/Write commands with Select_flag set. ● Reset To Ready, used to put the LRIS2K in the ready state. ● Read Block, used to output the 32 bits of the selected block and its locking status. ● Write Block, used to write the 32-bit value in the selected block, provided that it is not locked. ● Lock Block, used to lock the selected block. After this command, the block cannot be modified. ● Write AFI, used to write the 8-bit value in the AFI register. ● Lock AFI, used to lock the AFI register. ● Write DSFID, used to write the 8-bit value in the DSFID register. ● Lock DSFID, used to lock the DSFID register. ● Get System Info, used to provide the system information value ● Get Multiple Block Security Status, used to send the security status of the selected block. ● Initiate, used to trigger the tag response to the Inventory Initiated sequence. ● Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate command. ● Kill, used to definitively deactivate the tag. ● Write Password, used to write the 32 bits of the selected password. ● Lock Password, used to write the Protect Status bits of the selected block. ● Present Password, enables the user to present a password to unprotect the user blocks linked to this password. ● Fast Initiate, used to trigger the tag response to the Inventory Initiated sequence. ● Fast Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate command. ● Fast Read Single Block, used to output the 32 bits of the selected block and its locking status. LRIS2K 1.3 Description Initial dialogue for vicinity cards The dialog between the vicinity coupling device (VCD) and the vicinity integrated circuit Card or VICC (LRIS2K) takes place as follows: ● activation of the LRIS2K by the RF operating field of the VCD. ● transmission of a command by the VCD. ● transmission of a response by the LRIS2K. These operations use the RF power transfer and communication signal interface described below (see Power transfer, Frequency and Operating field). This technique is called RTF (Reader Talk First). 1.3.1 Power transfer Power is transferred to the LRIS2K by radio frequency at 13.56 MHz via coupling antennas in the LRIS2K and the VCD. The RF operating field of the VCD is transformed on the LRIS2K antenna to an AC Voltage which is rectified, filtered and internally regulated. The amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator. 1.3.2 Frequency The ISO 15693 standard defines the carrier frequency (fC) of the operating field as 13.56 MHz ±7 kHz. 1.3.3 Operating field The LRIS2K operates continuously between Hmin and Hmax. ● The minimum operating field is Hmin and has a value of 150 mA/m rms. ● The maximum operating field is Hmax and has a value of 5 A/m rms. A VCD shall generate a field of at least Hmin and not exceeding Hmax in the operating volume. 15/102 LRIS2K block security 2 LRIS2K LRIS2K block security The LRIS2K provides a special protection mechanism based on passwords. Each memory block of the LRIS2K can be individually protected by one out of three available passwords, and each block can also have Read/Write access conditions set. Each memory block of the LRIS2K is assigned with a Protect Status area including a Block Lock bit, two Password Control bits and two Read/Write protection bits as shown in Table 4. Table 5 describes the organization of the Protect status area which can be read using the Read Single Block and Read Multiple Block commands with the Option_flag set to ‘1’. Table 3. Add Memory block with protection status area 0 7 8 15 16 23 24 31 Protect status 0 User area 5 bits 1 User area 5 bits ... User area 5 bits Table 4. Protect status area organization b7 b6 b5 0 0 0 b4 b3 Password Control bits b2 b1 b0 Read / Write protection Block Lock bits When the Block Lock bit is set to ‘1’, for instance by issuing a Block Lock command, the 2 Read/Write protection bits (b1, b2) are used to set the Read/Write access of the block as described in Table 5. Table 5. Read / Write protection bit setting Block access when password presented Block access when password not presented Block Lock b2, b1 0 xx READ WRITE READ WRITE 1 00 READ WRITE READ NO WRITE 1 01 READ WRITE READ WRITE 1 10 READ WRITE NO READ NO WRITE 1 11 READ NO WRITE NO READ NO WRITE The next 2 bits of the Protect Status area (b3, b4) are the Password Control bits. The value these two bits is used to link a password to the block as defined in Table 6. Table 6. 16/102 Password Control bits b4, b3 Password 00 The block is not protected by a Password 01 The block is protected by the Password 1 10 The block is protected by the Password 2 11 The block is protected by the Password 3 LRIS2K LRIS2K block security The LRIS2K password protection is organized around a dedicated set of commands plus a system area of four password blocks where the password values and the Kill code are stored. Each password block also has a Protect Status area, making it possible to set the Read / Write access right of each individual block. This system area is described in Table 7. Table 7. Add Password system area 0 7 8 15 16 23 24 31 Protect status 0 Kill code 5 bits 1 Password 1 5 bits 2 Password 2 5 bits 3 Password 3 5 bits The dedicated password commands are: ● Write Password: The Write Password command is used to write a 32-bit block into the password system area. This command must be used to write or update password values and to set the kill code. After the write cycle, the password block, or the kill code, must be activated by issuing the Lock password command. Depending on the Read/Write access set in the Protect Status area, it is possible to modify a password value after issuing a valid Present Password command. ● Lock Password: The Lock Password command is used to set the Protect Status area of the selected block. Bits b4 to b1 of the Protect Status are affected by the Lock Password command. The Block Lock bit, b0, is set to ‘1’ automatically. After issuing a Lock Password command, the protection settings of the selected block are activated. The protection of a locked block cannot be changed. A Lock Password command sent to a locked block returns an error code. The Lock Password command is also used to set the Protect Status areas of the password blocks. RFU bit 8 of the Request_flag is used to select either the memory area (bit 8 = ‘0’) or the password area (bit 8 = ‘1’). ● Present Password: The Present Password command is used to present one of the three passwords to the LRIS2K in order to modify the access rights of all the memory blocks linked to that password (Table 5) including the password itself. If the presented password is correct, the access rights remain activated until the tag is powered off or until a new Present Password command is issued. 17/102 Example of LRIS2K security protection 3 LRIS2K Example of LRIS2K security protection Table 8 and Table 9 show the block security protections before and after a valid Present Password command. The Table 8 shows blocks access rights of an LRIS2K after power-up. After a valid Present Password command with password 1, the memory block access is changed as given in Table 9. Table 8. LRIS2K block security protection after power-up Protect status Add 0 7 8 15 16 23 24 31 b7b6b5 b4 b3 b2 b1 b0 0 Protection: Standard,Read - No Write xxx 0 0 0 0 1 1 Protection: Pswd 1,Read - Write xxx 0 1 0 1 1 2 Protection: Pswd 1,No Read - No Write xxx 0 1 1 0 1 4 Protection: Pswd 1,No Read - No Write xxx 0 1 1 1 1 Table 9. LRIS2K block security protection after a valid presentation of password 1 Protect status Add 0 18/102 7 8 15 16 23 24 31 b7b6b5 b4 b3 b2 b1 b0 0 Protection: Standard,Read - No Write xxx 0 0 0 0 1 1 Protection: Pswd 1,Read - Write xxx 0 1 0 1 1 2 Protection: Pswd 1,Read - Write xxx 0 1 1 0 1 4 Protection: Pswd 1,Read - No Write xxx 0 1 1 1 1 LRIS2K 4 Communication signal from VCD to LRIS2K Communication signal from VCD to LRIS2K Communications between the VCD and the LRIS2K takes place using the modulation principle of ASK (Amplitude Shift Keying). Two modulation indexes are used, 10% and 100%. The LRIS2K decodes both. The VCD determines which index is used. The modulation index is defined as [a – b]/[a + b] where a is the peak signal amplitude and b, the minimum signal amplitude of the carrier frequency. Depending on the choice made by the VCD, a "pause" will be created as described in Figure 3 and Figure 4. The LRIS2K is operational for any degree of modulation index from between 10% and 30%. Figure 3. 100% modulation waveform a 105% 100% 95% 60% 5% tRFF tRFR tRFSBL t AI06683 Table 10. 10% modulation parameters Symbol Parameter definition Value hr 0.1 x (a – b) max hf 0.1 x (a – b) max 19/102 Communication signal from VCD to LRIS2K Figure 4. LRIS2K 10% modulation waveform hf hr tRFF a tRFSFL b tRFR t AI06655 20/102 LRIS2K 5 Data rate and data coding Data rate and data coding The data coding implemented in the LRIS2K uses pulse position modulation. Both data coding modes that are described in the ISO15693 are supported by the LRIS2K. The selection is made by the VCD and indicated to the LRIS2K within the start of frame (SOF). 5.1 Data coding mode: 1 out of 256 The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 18.88 µs (256/fC), determines the value of the byte. In this case the transmission of one byte takes 4.833 ms and the resulting data rate is 1.65 kbits/s (fC/8192). Figure 5 illustrates this pulse position modulation technique. In this figure, data E1h (225 decimal) is sent by the VCD to the LRIS2K. The pause occurs during the second half of the position of the time period that determines the value, as shown in Figure 6. A pause during the first period transmits the data value 00h. A pause during the last period transmit the data value FFh (255 decimal). Figure 5. 1 out of 256 coding mode 9.44 µs Pulse Modulated Carrier 18.88 µs 0 1 2 3 . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 2 2 5 3 2 5 4 2 5 5 4.833 ms AI06656 21/102 Data rate and data coding Figure 6. LRIS2K Detail of a time period 9.44 µs 18.88 µs Pulse Modulated Carrier . . . . . . . . 2 2 4 2 2 5 . . . . . 2 2 6 Time Period one of 256 22/102 . AI06657 LRIS2K 5.2 Data rate and data coding Data coding mode: 1 out of 4 The value of 2 bits is represented by the position of one pause. The position of the pause on 1 of 4 successive time periods of 18.88 µs (256/fC), determines the value of the 2 bits. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. In this case the transmission of one byte takes 302.08 µs and the resulting data rate is 26.48 Kbits/s (fC/512). Figure 7 illustrates the 1 out of 4 pulse position technique and coding. Figure 8 shows the transmission of E1h (225d - 1110 0001b) by the VCD. Figure 7. 1 out of 4 coding mode Pulse position for "00" 9.44 µs 9.44 µs 75.52 µs Pulse position for "01" (1=LSB) 28.32 µs 9.44 µs 75.52 µs Pulse position for "10" (0=LSB) 47.20µs Pulse position for "11" 9.44 µs 75.52 µs 66.08 µs 9.44 µs 75.52 µs AI06658 Figure 8. 1 out of 4 coding example 10 00 01 11 75.52µs 75.52µs 75.52µs 75.52µs AI06659 23/102 Data rate and data coding 5.3 LRIS2K VCD to LRIS2K frames Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are implemented using code violation. Unused options are reserved for future use. The LRIS2K is ready to receive a new command frame from the VCD 311.5 µs (t2) after sending a response frame to the VCD. The LRIS2K takes a power-up time of 0.1 ms after being activated by the powering field. After this delay, the LRIS2K is ready to receive a command frame from the VCD. 5.4 Start of frame (SOF) The SOF defines the data coding mode the VCD is to use for the following command frame. The SOF sequence described in Figure 9 selects the 1 out of 256 data coding mode. The SOF sequence described in Figure 10 selects the 1 out of 4 data coding mode. The EOF sequence for either coding mode is described in Figure 11. Figure 9. SOF to select 1 out of 256 data coding mode 9.44µs 9.44µs 37.76µs 37.76µs AI06661 Figure 10. SOF to select 1 out of 4 data coding mode 9.44µs 9.44µs 37.76µs 9.44µs 37.76µs AI06660 24/102 LRIS2K Data rate and data coding Figure 11. EOF for either data coding mode 9.44µs 9.44µs 37.76µs AI06662 25/102 Communications signal from LRIS2K to VCD 6 LRIS2K Communications signal from LRIS2K to VCD The LRIS2K has several modes defined for some parameters, owing to which it can operate in different noise environments and meet different application requirements. 6.1 Load modulation The LRIS2K is capable of communication to the VCD via an inductive coupling area whereby the carrier is loaded to generate a subcarrier with frequency fS. The subcarrier is generated by switching a load in the LRIS2K. The load-modulated amplitude received on the VCD antenna must be of at least 10mV when measured as described in the test methods defined in International Standard ISO10373-7. 6.2 Subcarrier The LRIS2K supports the one-subcarrier and two-subcarrier response formats. These formats are selected by the VCD using the first bit in the protocol header. When one subcarrier is used, the frequency fS1 of the subcarrier load modulation is 423.75 kHz (fC/32). When two subcarriers are used, the frequency fS1 is 423.75 kHz (fC/32), and frequency fS2 is 484.28 kHz (fC/28). When using the two-subcarrier mode, the LRIS2K generates a continuous phase relationship between fS1 and fS2. 6.3 Data rates The LRIS2K can respond using the low or the high data rate format. The selection of the data rate is made by the VCD using the second bit in the protocol header. It also supports the x2 mode available on all the Fast commands. Table 11 shows the different data rates produced by the LRIS2K using the different response format combinations. Table 11. Response data rates Data rate One subcarrier Two subcarriers Standard commands 6.62 Kbits/s (fc/2048) 6.67 Kbits/s (fc/2032) Fast commands 13.24 Kbits/s (fc/1024) not applicable Standard commands 26.48 Kbits/s (fc/512) 26.69 Kbits/s (fc/508) Fast commands 52.97 Kbits/s (fc/256) not applicable Low High 26/102 LRIS2K 7 Bit representation and coding Bit representation and coding Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same subcarrier frequency or frequencies is/are used, in this case the number of pulses is multiplied by 4 and all times will increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. 7.1 Bit coding using one subcarrier 7.1.1 High data rate A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 18.88 µs as shown in Figure 12. Figure 12. Logic 0, high data rate 37.76µs ai12076 For the fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 9.44 µs as shown in Figure 13. Figure 13. Logic 0, high data rate x2 18.88µs ai12066 A logic 1 starts with an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz (fC/32) as shown in Figure 14. Figure 14. Logic 1, high data rate 37.76µs ai12077 For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4 pulses of 423.75 kHz (fC/32) as shown in Figure 15. Figure 15. Logic 1, high data rate x2 18.88µs ai12067 27/102 Bit representation and coding 7.1.2 LRIS2K Low data rate A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 75.52 µs as shown in Figure 16. Figure 16. Logic 0, low data rate 151.04µs ai12068 For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 37.76 µs as shown in Figure 17. Figure 17. Logic 0, low data rate x2 75.52µs ai12069 A logic 1 starts with an unmodulated time of 75.52 µs followed by 32 pulses at 423.75 kHz (fC/32) as shown in Figure 18. Figure 18. Logic 1, low data rate 151.04µs ai12070 For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz (fC/32) as shown in Figure 18. Figure 19. Logic 1, low data rate x2 75.52µs 28/102 ai12071 LRIS2K Bit representation and coding 7.2 Bit coding using two subcarriers 7.3 High data rate A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by 9 pulses at 484.28 kHz (fC/28) as shown in Figure 20. For the Fast commands, the x2 mode is not available. Figure 20. Logic 0, high data rate 37.46µs ai12074 A logic 1 starts with 9 pulses at 484.28 kHz (fC/28) followed by 8 pulses at 423.75 kHz (fC/32) as shown in Figure 21. For the Fast commands, the x2 mode is not available. Figure 21. Logic 1, high data rate 37.46µs 7.4 ai12073 Low data rate A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by 36 pulses at 484.28 kHz (fC/28) as shown in Figure 22. For the Fast commands, the x2 mode is not available. Figure 22. Logic 0, low data rate 149.84µs ai12072 A logic 1 starts with 36 pulses at 484.28 kHz (fC/28) followed by 32 pulses at 423.75 kHz (fC/32) as shown in Figure 23. For the Fast commands, the x2 mode is not available. Figure 23. Logic 1, low data rate 149.84µs ai12075 29/102 LRIS2K to VCD frames 8 LRIS2K LRIS2K to VCD frames Frames are delimited by an SOF and an EOF. They are implemented using code violation. Unused options are reserved for future use. For the low data rate, the same subcarrier frequency or frequencies is/are used. In this case the number of pulses is multiplied by 4. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. 8.1 SOF when using one subcarrier 8.2 High data rate The SOF includes an unmodulated time of 56.64 µs, followed by 24 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz as shown in Figure 24. Figure 24. Start of frame, high data rate, one subcarrier 37.76µs 113.28µs ai12078 For the Fast commands, the SOF comprises an unmodulated time of 28.32 µs, followed by 12 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 9.44µs followed by 4 pulses at 423.75 kHz as shown in Figure 25. Figure 25. Start of frame, high data rate, one subcarrier x2 56.64µs 18.88µs ai12079 30/102 LRIS2K 8.3 LRIS2K to VCD frames Low data rate The SOF comprises an unmodulated time of 226.56 µs, followed by 96 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 75.52 µs followed by 32 pulses at 423.75 kHz as shown in Figure 26. Figure 26. Start of frame, low data rate, one subcarrier 453.12µs 151.04µs ai12080 For the Fast commands, the SOF comprises an unmodulated time of 113.28 µs, followed by 48 pulses at 423.75 kHz (fC/32), and a logic 1 that includes an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz as shown in Figure 27. Figure 27. Start of frame, low data rate, one subcarrier x2 226.56µs 75.52µs ai12081 31/102 LRIS2K to VCD frames LRIS2K 8.4 SOF when using two subcarriers 8.5 High data rate The SOF comprises 27 pulses at 484.28 kHz (fC/28), followed by 24 pulses at 423.75 kHz (fC/32), and a logic 1 that includes 9 pulses at 484.28 kHz followed by 8 pulses at 423.75 kHz as shown in Figure 28. For the Fast commands, the x2 mode is not available. Figure 28. Start of frame, high data rate, two subcarriers 112.39µs 8.6 37.46µs ai12082 Low data rate The SOF comprises 108 pulses at 484.28 kHz (fC/28), followed by 96 pulses at 423.75 kHz (fC/32), and a logic 1 that includes 36 pulses at 484.28 kHz followed by 32 pulses at 423.75 kHz as shown in Figure 29. For the Fast commands, the x2 mode is not available. Figure 29. Start of frame, low data rate, two subcarriers 449.56µs 149.84µs ai12083 32/102 LRIS2K LRIS2K to VCD frames 8.7 EOF when using one subcarrier 8.8 High data rate The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and an unmodulated time of 18.88 µs, followed by 24 pulses at 423.75 kHz (fC/32), and by an unmodulated time of 56.64 µs as shown in Figure 30. Figure 30. End of frame, high data rate, one subcarriers 37.76µs 113.28µs ai12084 For the Fast commands, the EOF comprises a logic 0 that includes 4 pulses at 423.75 kHz and an unmodulated time of 9.44 µs, followed by 12 pulses at 423.75 kHz (fC/32) and an unmodulated time of 37.76 µs as shown in Figure 31. Figure 31. End of frame, high data rate, one subcarriers x2 18.88µs 56.64µs ai12085 8.9 Low data rate The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and an unmodulated time of 75.52 µs, followed by 96 pulses at 423.75 kHz (fC/32) and an unmodulated time of 226.56 µs as shown in Figure 32. Figure 32. End of frame, low data rate, one subcarriers 453.12µs 151.04µs ai12086 For the Fast commands, the EOF comprises a logic 0 that includes 16 pulses at 423.75 kHz and an unmodulated time of 37.76 µs, followed by 48 pulses at 423.75 kHz (fC/32) and an unmodulated time of 113.28 µs as shown in Figure 33. Figure 33. End of frame, low data rate, one subcarriers x2 75.52µs 226.56µs ai12087 33/102 LRIS2K to VCD frames LRIS2K 8.10 EOF when using two subcarriers 8.11 High data rate The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and 9 pulses at 484.28 kHz, followed by 24 pulses at 423.75 kHz (fC/32) and 27 pulses at 484.28 kHz (fC/28) as shown in Figure 34. For the Fast commands, the x2 mode is not available. Figure 34. End of frame, high data rate, two subcarriers 37.46µs 8.12 112.39µs ai12088 Low data rate The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and 36 pulses at 484.28 kHz, followed by 96 pulses at 423.75 kHz (fC/32) and 108 pulses at 484.28 kHz (fC/28) as shown in Figure 35. For the Fast commands, the x2 mode is not available. Figure 35. End of frame, low data rate, two subcarriers 149.84µs 449.56µs ai12089 34/102 LRIS2K 9 Unique identifier (UID) Unique identifier (UID) The LRIS2Ks are uniquely identified by a 64-bit Unique Identifier (UID). This UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read-only code and comprises: ● 8 MSBs with a value of E0h ● The IC Manufacturer code of ST 02h, on 8 bits (ISO/IEC 7816-6/AM1) ● a Unique Serial Number on 48 bits Table 12. UID format MSB 63 LSB 56 55 0xE0 48 0x02 47 0 Unique serial number With the UID each LRIS2K can be addressed uniquely and individually during the anticollision loop and for one-to-one exchanges between a VCD and an LRIS2K. 35/102 Application family identifier (AFI) 10 LRIS2K Application family identifier (AFI) The AFI (application family identifier) represents the type of application targeted by the VCD and is used to identify, among all the LRIS2Ks present, only the LRIS2Ks that meet the required application criteria. Figure 36. LRIS2K decision tree for AFI Inventory Request Received No AFI Flag Set ? Yes AFI value =0? No Yes AFI value = Internal value ? No Yes Answer given by the LRIS2K to the Inventory Request No Answer AI13238 The AFI is programmed by the LRIS2K issuer (or purchaser) in the AFI register. Once programmed and Locked, it can no longer be modified. The most significant nibble of the AFI is used to code one specific or all application families. The least significant nibble of the AFI is used to code one specific or all application subfamilies. Subfamily codes different from 0 are proprietary. (See ISO 15693-3 documentation) 36/102 LRIS2K 11 Data storage format identifier (DSFID) Data storage format identifier (DSFID) The data storage format identifier indicates how the data is structured in the LRIS2K memory. The logical organization of data can be known instantly using the DSFID. It can be programmed and locked using the Write DSFID and Lock DSFID commands. 11.1 CRC The CRC used in the LRIS2K is calculated as per the definition in ISO/IEC 13239. The initial register contents are all ones: "FFFF". The two-byte CRC are appended to each request and response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field. Upon reception of a request from the VCD, the LRIS2K verifies that the CRC value is valid. If it is invalid, the LRIS2K discards the frame and does not answer to the VCD. Upon reception of a request from the LRIS2K, it is recommended that the VCD verifies whether the CRC value is valid. If it is invalid, actions to be performed are left to the discretion of the VCD designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first. Table 13. CRC transmission rules LSByte LSBit MSByte MSBit CRC 16 (8 bits) LSBit MSBit CRC 16 (8 bits) 37/102 LRIS2K protocol description 12 LRIS2K LRIS2K protocol description The Transmission protocol (or simply protocol) defines the mechanism used to exchange instructions and data between the VCD and the LRIS2K, in both directions. It is based on the concept of "VCD talks first". This means that an LRIS2K will not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of: ● a request from the VCD to the LRIS2K ● a response from the LRIS2K to the VCD Each request and each request are contained in a frame. The frame delimiters (SOF, EOF) are described in Section 8: LRIS2K to VCD frames. Each request consists of: ● a request SOF (see Figure 9 and Figure 10) ● flags ● a command code ● parameters, depending on the command ● application data ● a 2-byte CRC ● a request EOF (see Figure 11) Each request consists of: ● an Answer SOF (see Figure 24 to Figure 29) ● flags ● parameters, depending on the command ● application data ● a 2-byte CRC ● an Answer EOF (see Figure 30 to Figure 35) The protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8), i.e. an integer number of bytes. A single-byte field is transmitted least significant bit (LSBit) first. A multiple-byte field is transmitted least significant byte (LSByte) first, each byte is transmitted least significant bit (LSBit) first. The setting of the flags indicates the presence of the optional fields. When the flag is set (to one), the field is present. When the flag is reset (to zero), the field is absent. Table 14. VCD request frame format Request SOF Request_flags Table 15. Response SOF 38/102 Command code Parameters Data 2-byte CRC Request EOF LRIS2K response frame format Response _flags Parameters Data 2-byte CRC Response EOF LRIS2K LRIS2K protocol description Figure 37. LRIS2K protocol timing VCD Request frame (Table 14) Request frame (Table 14) Timing Response frame (Table 15) Response frame (Table 15) LRIS2K t1 t2 t1 t2 39/102 LRIS2K states 13 LRIS2K LRIS2K states An LRIS2K can be in one of 4 states: ● Power-off ● Ready ● Quiet ● Selected Transitions between these states are specified in Figure 38: LRIS2K state transition diagram and Table 16: LRIS2K response depending on Request_flags. 13.1 Power-off state The LRIS2K is in the Power-off state when it does not receive enough energy from the VCD. 13.2 Ready state The LRIS2K is in the Ready state when it receives enough energy from the VCD. When in the Ready state, the LRIS2K answers any request where the Select_flag is not set. 13.3 Quiet state When in the Quiet state, the LRIS2K answers any request except for Inventory requests with the Address_flag set. 13.4 Selected state In the Selected state, the LRIS2K answers any request in all modes (see Section 14: Modes): 40/102 ● request in Select mode with the Select_flag set ● request in Addressed mode if the UID matches ● request in Non-Addressed mode as it is the mode for general requests LRIS2K LRIS2K states Table 16. LRIS2K response depending on Request_flags Address_flag Flags 1 Addressed 0 Non addressed LRIS2K in Ready or Selected state (Devices in Quiet state do not answer) X LRIS2K in Selected state X LRIS2K in Ready, Quiet or Selected state (the device which matches the UID) X Error (03h) X Select_flag 1 Selected 0 Non selected X X X X Figure 38. LRIS2K state transition diagram Power Off In field Out of field Out of field Any other Command where Select_Flag is not set (U iet qu ay St y ad re o tt se Re e er r ) ID wh o y et D) (U ad s UI ct le re is t o ag en Se t t Fl er se ct_ diff Re ele ect( S el S ID ) Out of field Ready Select (UID) Quiet Stay quiet(UID) Any other command where the Address_Flag is set AND where Inventory_Flag is not set Selected Any other command AI06681 1. The intention of the state transition method is that only one LRIS2K should be in the selected state at a time. 41/102 Modes 14 LRIS2K Modes The term “mode” refers to the mechanism used in a request to specify the set of LRIS2Ks that will answer the request. 14.1 Addressed mode When the Address_flag is set to 1 (Addressed mode), the request contains the Unique ID (UID) of the addressed LRIS2K. Any LRIS2K that receives a request with the Address_flag set to 1 compares the received Unique ID to its own. If it matches, then the LRIS2K executes the request (if possible) and returns a request to the VCD as specified in the command description. If the UID does not match, then it remains silent. 14.2 Non-addressed mode (general request) When the Address_flag is cleared to 0 (Non-Addressed mode), the request does not contain a Unique ID. Any LRIS2K receiving a request with the Address_flag cleared to 0 executes it and returns a request to the VCD as specified in the command description. 14.3 Select mode When the Select_flag is set to 1 (Select mode), the request does not contain an LRIS2K Unique ID. The LRIS2K in the Selected state that receives a request with the Select_flag set to 1 executes it and returns a request to the VCD as specified in the command description. Only LRIS2Ks in the Selected state answer a request where the Select_flag set to 1. The system design ensures in theory that only one LRIS2K can be in the Select state at a time. 42/102 LRIS2K 15 Request format Request format The request consists of: ● an SOF ● flags ● a command code ● parameters and data ● a CRC ● an EOF Table 17. S O F 15.1 General request format Request_flags Command code Parameters Data CRC E O F Request_flags In a request, the "flags" field specifies the actions to be performed by the LRIS2K and whether corresponding fields are present or not. The flag field consists of eight bits. The bit 3 (Inventory_flag) of the request_flag defines the contents of the 4 MSBs (bits 5 to 8). When bit 3 is reset (0), bits 5 to 8 define the LRIS2K selection criteria. When bit 3 is set (1), bits 5 to 8 define the LRIS2K Inventory parameters. Table 18. Bit No Bit 1 Bit 2 Bit 3 Bit 4 Definition of request_flags 1 to 4 Flag Subcarrier_flag(1) Data_rate_flag(2) Level Description 0 A single subcarrier frequency is used by the LRIS2K 1 Two subcarrier are used by the LRIS2K 0 Low data rate is used 1 High data rate is used 0 The meaning of flags 5 to 8 is described in Table 19 1 The meaning of flags 5 to 8 is described in Table 20 0 No Protocol format extension Inventory_flag Protocol Extension_flag 1. Subcarrier_flag refers to the LRIS2K-to-VCD communication. 2. Data_rate_flag refers to the LRIS2K-to-VCD communication 43/102 Request format LRIS2K . Table 19. Bit No Flag Level Select_flag(1) Bit 5 Bit 6 Request_flags 5 to 8 when Bit 3 = 0 Description 0 Request is executed by any LRIS2K according to the setting of Address_flag 1 Request is executed only by the LRIS2K in Selected state 0 Request is not addressed. UID field is not present. The request is executed by all LRIS2Ks. 1 Request is addressed. UID field is present. The request is executed only by the LRIS2K whose UID matches the UID specified in the request. Address_flag(1) Bit 7 Option_flag 0 Bit 8 RFU 0 1. If the Select_flag is set to 1, the Address_flag is set to 0 and the UID field is not present in the request. Table 20. Bit No Bit 5 Bit 6 44/102 Request_flags 5 to 8 when Bit 3 = 1 Flag Level Description 0 AFI field is not present 1 AFI field is present 0 16 slots 1 1 slot AFI_flag Nb_slots_flag Bit 7 Option_flag 0 Bit 8 RFU 0 LRIS2K 16 Response format Response format The request consists of: ● an SOF ● flags ● parameters and data ● a CRC ● an EOF Table 21. S O F 16.1 General response format Response_flags Parameters Data CRC E O F Response_flags In a request, the flags indicate how actions have been performed by the LRIS2K and whether corresponding fields are present or not. The request_flags consist of eight bits. Table 22. Definitions of response_flags 1 to 8 Bit No Bit 1 Flag Level Description 0 No error 1 Error detected. Error code is in the "Error" field. Error_flag Bit 2 RFU 0 Bit 3 RFU 0 Bit 4 Extension_flag 0 Bit 5 RFU 0 Bit 6 RFU 0 Bit 7 RFU 0 Bit 8 RFU 0 No extension 45/102 Response format 16.2 LRIS2K Response error code If the Error_flag is set by the LRIS2K in the request, the Error code field is present and provides information about the error that occurred. Error codes not specified in Table 23 are reserved for future use. Table 23. Response error code definition Error code 46/102 Meaning 03h The option is not supported 0Fh Error with no information given 10h The specified block is not available 11h The specified block is already locked and thus cannot be locked again 12h The specified block is locked and its contents cannot be changed. 13h The specified block was not successfully programmed 14h The specified block was not successfully locked LRIS2K 17 Anticollision Anticollision The purpose of the anticollision sequence is to inventory the LRIS2Ks present in the VCD field using their unique ID (UID). The VCD is the master of communications with one or several LRIS2Ks. It initiates LRIS2K communication by issuing the Inventory request. The LRIS2K sends its request in the determined slot or does not respond. 17.1 Request parameters When issuing the Inventory command, the VCD: ● sets the Nb_slots_flag as desired ● adds the mask length and the mask value after the command field ● The mask length is the number of significant bits of the mask value. ● The mask value is contained in an integer number of bytes. The mask length indicates the number of significant bits. LSB is transmitted first ● If the mask length is not a multiple of 8 (bits), as many 0-bits as required will be added to the mask value MSB so that the mask value is contained in an integer number of bytes ● The next field starts at the next byte boundary. Table 24. Inventory request format MSB SOF LSB Request_ flags Command Optional AFI Mask length Mask value CRC 8 bits 8 bits 8 bits 8 bits 0 to 8 bytes 16 bits EOF In the example of the Table 25 and Figure 39, the mask length is 11 bits. Five 0-bits are added to the mask value MSB. The 11-bit Mask and the current slot number are compared to the UID. Table 25. Example of the addition of 0-bits to an 11-bit mask value (b15) MSB LSB (b0) 0000 0 100 1100 1111 0-bits added 11-bit mask value 47/102 Anticollision LRIS2K Figure 39. Principle of comparison between the mask, the slot number and the UID MSB LSB 0000 0100 1100 1111 b 16 bits Mask value received in the Inventory command MSB LSB 100 1100 1111 b 11 bits The Mask value less the padding 0s is loaded into the Tag comparator MSB LSB xxxx The Slot counter is calculated Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits The Slot counter is concatened to the Mask value Nb_slots_flags = 0 The concatenated result is compared with the least significant bits of the Tag UID. 4 bits MSB LSB xxxx 100 1100 1111 b 15 bits UID b63 b0 xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx b Bits ignored 64 bits Compare AI06682 The AFI field is present if the AFI_flag is set. The pulse is generated according to the definition of the EOF in ISO/IEC 15693-2. The first slot starts immediately after the reception of the request EOF. To switch to the next slot, the VCD sends an EOF. The following rules and restrictions apply: 48/102 ● if no LRIS2K answer is detected, the VCD may switch to the next slot by sending an EOF, ● if one or more LRIS2K answers are detected, the VCD waits until the complete frame has been received before sending an EOF for switching to the next slot. LRIS2K 18 Request processing by the LRIS2K Request processing by the LRIS2K Upon reception of a valid request, the LRIS2K performs the following algorithm: ● NbS is the total number of slots (1 or 16) ● SN is the current slot number (0 to 15) ● LSB (value, n) function returns the n Less Significant Bits of value ● MSB (value, n) function returns the n Most Significant Bits of value ● "&" is the concatenation operator ● Slot_frame is either an SOF or an EOF SN = 0 if (Nb_slots_flag) then NbS = 1 SN_length = 0 endif else NbS = 16 SN_length = 4 endif label1: if LSB(UID, SN_length + Mask_length) = LSB(SN,SN_length)&LSB(Mask,Mask_length) then answer to inventory request endif wait (Slot_frame) if Slot_frame = SOF then Stop Anticollision decode/process request exit endif if Slot_frame = EOF if SN < NbS-1 then SN = SN + 1 goto label1 exit endif endif 49/102 Explanation of the possible cases 19 LRIS2K Explanation of the possible cases Figure 40 summarizes the main possible cases that can occur during an anticollision sequence when the slot number is 16. The different steps are: Note: 50/102 ● The VCD sends an Inventory request, in a frame terminated by an EOF. The number of slots is 16. ● LRIS2K 1 transmits its request in Slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; ● The VCD sends an EOF in order to switch to the next slot. ● In slot 1, two LRIS2Ks, LRIS2K 2 and LRIS2K 3 transmit a request, thus generating a collision. The VCD records the event and remembers that a collision was detected in Slot 1. ● The VCD sends an EOF in order to switch to the next slot. ● In Slot 2, no LRIS2K transmits a request. Therefore the VCD does not detect any LRIS2K SOF and decides to switch to the next slot by sending an EOF. ● In slot 3, there is another collision caused by requests from LRIS2K 4 and LRIS2K 5 ● The VCD then decides to send a request (for instance a Read Block) to LRIS2K 1 whose UID has already been correctly received. ● All LRIS2Ks detect an SOF and exit the anticollision sequence. They process this request and since the request is addressed to LRIS2K 1, only LRIS2K 1 transmits a request. ● All LRIS2Ks are ready to receive another request. If it is an Inventory command, the slot numbering sequence restarts from 0. The decision to interrupt the anticollision sequence is made by the VCD. It could have continued to send EOFs until Slot 16 and only then sent the request to LRIS2K 1. Time Comment Timing LRIS2Ks VCD SOF Inventory EOF Request t1 No collision Response 1 Slot 0 t2 EOF t1 Collision Response 3 Response 2 Slot 1 t2 EOF No Response t3 Slot 2 EOF t1 Collision Response 5 Response 4 Slot 3 t2 SOF Request to EOF LRIS2K 1 t1 AI12885 Response from LRIS2K 1 LRIS2K Explanation of the possible cases Figure 40. Description of a possible anticollision sequence 51/102 Inventory Initiated command 20 LRIS2K Inventory Initiated command The LRIS2K provides a special feature to improve the inventory time response of moving tags using the Initiate_flag value. This flag, controlled by the Initiate command, allows tags to answer to Inventory Initiated commands. For applications in which multiple tags are moving in front of a reader, it is possible to miss tags using the standard inventory command. The reason is that the inventory sequence has to be performed on a global tree search. For example, a tag with a particular UID value may have to wait the run of a long tree search before being inventoried. If the delay is too long, the tag may be out of the field before it has been detected. Using the Initiate command, the inventory sequence is optimized. When multiple tags are moving in front of a reader, the ones which are within the reader field will be initiated by the Initiate command. In this case, a small batch of tags will answer to the Inventory Initiated command which will optimize the time necessary to identify all the tags. When finished, the reader has to issue a new Initiate command in order to initiate a new small batch of tags which are new inside the reader field. It is also possible to reduce the inventory sequence time using the Fast Initiate and Fast Inventory Initiated commands. These commands allow the LRIS2Ks to increase their response data rate by a factor of 2, up to 53kbit/s. 52/102 LRIS2K Timing definition 21 Timing definition 21.1 t1: LRIS2K response delay Upon detection of the rising edge of the EOF received from the VCD, the LRIS2K waits for a time t1nom before transmitting its response to a VCD request or before switching to the next slot during an inventory process. Values of t1 are given in Table 26. The EOF is defined in Figure 11 on page 25. 21.2 t2: VCD new request delay t2 is the time after which the VCD may send an EOF to switch to the next slot when one or more LRIS2K responses have been received during an Inventory command. It starts from the reception of the EOF from the LRIS2Ks. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the LRIS2K. t2 is also the time after which the VCD may send a new request to the LRIS2K as described in Table 37: LRIS2K protocol timing. Values of t2 are given in Table 26. 21.3 t3: VCD new request delay in the absence of a response from the LRIS2K t3 is the time after which the VCD may send an EOF to switch to the next slot when no LRIS2K response has been received. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the LRIS2K. From the time the VCD has generated the rising edge of an EOF: ● If this EOF is 100% modulated, the VCD waits a time at least equal to t3min before sending a new EOF. ● If this EOF is 10% modulated, the VCD waits a time at least equal to the sum of t3min + the LRIS2K nominal response time (which depends on the LRIS2K data rate and subcarrier modulation mode) before sending a new EOF. Table 26. Timing values(1) Minimum (min) values Nominal (nom) values Maximum (max) values t1 318.6 µs 320.9 µs 323.3 µs t2 309.2 µs No tnom No tmax No tnom No tmax t3 t1max (2) + tSOF(3) 1. The tolerance of specific timings is ± 32/fC. 2. t1max does not apply for write alike requests. Timing conditions for write alike requests are defined in the command description. 3. tSOF is the time taken by the LRIS2K to transmit an SOF to the VCD. tSOF depends on the current data rate: High data rate or Low data rate. 53/102 Commands codes 22 LRIS2K Commands codes The LRIS2K supports the commands described in this section. Their codes are given in Table 27. Table 27. Command codes Command code standard 54/102 Function Command code custom Function 01h Inventory A6h Kill 02h Stay Quiet B1h Write password 20h Read Single Block B2h Lock Password 21h Write Single Block B3h Present Password 22h Lock Block C0h Fast Read Single Block 25h Select C1h Fast Inventory Initiated 26h Reset to Ready C2h Fast Initiate 27h Write AFI D1h Inventory Initiated 28h Lock AFI D2h Initiate 29h Write DSFID 2Ah Lock DSFID 2Bh Get System Info 2Ch Get Multiple Block Security Status LRIS2K 23 Inventory Inventory When receiving the Inventory request, the LRIS2K runs the anticollision sequence. The Inventory_flag is set to 1. The meaning of flags 5 to 8 is shown in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The request contains the: ● flags ● Inventory command code (see Table 27: Command codes) ● AFI if the AFI flag is set ● mask length ● mask value ● CRC The LRIS2K does not generate any answer in case of error. Table 28. Inventory request format Request Request_flags Inventory SOF Optional AFI Mask length Mask value CRC16 8 bits 8 bits 8 bits 0 - 64 bits 16 bits 01h Request EOF The response contains the: ● flags ● unique ID Table 29. Inventory response format Response Response_ SOF flags 8 bits DSFID UID CRC16 8 bits 64 bits 16 bits Response EOF During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD. ● If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tSOF ● If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tNRT where: ● tSOF is the time required by the LRIS2K to transmit an SOF to the VCD ● tNRT is the nominal response time of the LRIS2K tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode. 55/102 Stay Quiet 24 LRIS2K Stay Quiet Command code = 0x02 On receiving the Stay Quiet command, the LRIS2K enters the Quiet state and does NOT send back a request. There is NO response to the Stay Quiet command even if an error occurs. When in the Quiet state: ● the LRIS2K does not process any request if the Inventory_flag is set, ● the LRIS2K processes any Addressed request The LRIS2K exits the Quiet state when: ● it is reset (power off), ● receiving a Select request. It then goes to the Selected state, ● receiving a Reset to Ready request. It then goes to the Ready state. Table 30. Request SOF Stay Quiet request format Request_flags Stay Quiet UID CRC16 8 bits 02h 64 bits 16 bits Request EOF The Stay Quiet command must always be executed in Addressed mode (Select_flag is reset to 0 and Address_flag is set to 1). Figure 41. Stay Quiet frame exchange between VCD and LRIS2K VCD LRIS2K Timing 56/102 SOF Stay Quiet request EOF LRIS2K 25 Read Single Block Read Single Block On receiving the Read Single Block command, the LRIS2K reads the requested block and sends back its 32 bits value in the request. The Option_flag is supported. Table 31. Read Single Block request format Request SOF Request_flags Read Single Block UID Block number CRC16 8 bits 20h 64 bits 8 bits 16 bits Request EOF Request parameters: ● Option_flag ● UID (optional) ● Block number Table 32. Read Single Block response format when Error_flag is NOT set Response SOF Response_flags Block locking status Data CRC16 8 bits 8 bits 32 bits 16 bits Response EOF Response parameters: ● Block Locking Status if Option_flag is set (see Table 33: Block Locking status) ● 4 bytes of block data Table 33. b7 Block Locking status b6 b5 Reserved for future use. All at 0 Table 34. b4 b3 password control bits b2 b1 Read / Write protection bits b0 0: Current Block not locked 1: Current Block locked Read Single Block response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set – 0Fh: other error – 10h: block address not available 57/102 Read Single Block LRIS2K Figure 42. Read Single Block frame exchange between VCD and LRIS2K VCD LRIS2K 58/102 SOF Read Single Block request EOF <-t1-> SOF Read Single Block response EOF LRIS2K 26 Write Single Block Write Single Block On receiving the Write Single Block command, the LRIS2K writes the data contained in the request to the requested block and reports whether the write operation was successful in the request. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not program correctly the data into the memory. The tW time is equal to t1nom + 18 × 302 µs. Table 35. Write Single Block request format Request Request_ SOF flags 8 bits Write Single Block UID Block number Data CRC16 21h 64 bits 8 bits 32 bits 16 bits Request EOF Request parameters: ● UID (optional) ● Block number ● Data Table 36. Write Single Block response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. The response is send back after the writing cycle. Table 37. Write Single Block response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 10h: block address not available – 12h: block is locked – 13h: block not programmed 59/102 Write Single Block LRIS2K Figure 43. Write Single Block frame exchange between VCD and LRIS2K VCD LRIS2K LRIS2K 60/102 SOF Write Single Block request EOF <-t1-> SOF Write Single Block response <------------ tW ------------><- t1 -> EOF SOF Write sequence when error Write Single Block response EOF LRIS2K 27 Lock Block Lock Block On receiving the Lock Block command, the LRIS2K permanently locks the selected block. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not lock correctly the memory block. The tW time is equal to t1nom + 18 × 302µs. Table 38. Lock Single Block request format Request Request_ SOF flags 8 bits Lock Block UID Block number CRC16 22h 64 bits 8 bits 16 bits Request EOF Request parameters: ● (Optional) UID ● Block number Table 39. Lock Block response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. Table 40. Lock Block response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 10h: block address not available – 11h: block is locked – 14h: block not locked 61/102 Lock Block LRIS2K Figure 44. Lock Block frame exchange between VCD and LRIS2K VCD LRIS2K LRIS2K 62/102 SOF Lock Block EOF request <-t1-> SOF Lock Block response EOF <------------ tW ------------><- t1 -> SOF Lock sequence when error Lock Block response EOF LRIS2K 28 Select Select When receiving the Select command: ● if the UID is equal to its own UID, the LRIS2K enters or stays in the Selected state and sends a request. ● if the UID does not match its own, the selected LRIS2K returns to the Ready state and does not send a request. The LRIS2K answers an error code only if the UID is equal to its own UID. If not, no response is generated. Table 41. Select request format Request Request_ SOF flags Select UID CRC16 25h 64 bits 16 bits 8 bits Request EOF Request parameter: ● UID Table 42. Select Block response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. Table 43. Select response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 0Fh: other error Figure 45. Select frame exchange between VCD and LRIS2K VCD LRIS2K SOF Select request EOF <-t1-> SOF Select response EOF 63/102 Reset to Ready 29 LRIS2K Reset to Ready On receiving a Reset to Ready command, the LRIS2K returns to the Ready state. In the Addressed mode, the LRIS2K answers an error code only if the UID is equal to its own UID. If not, no response is generated. Table 44. Reset to Ready request format Request Request_ Reset to SOF flags Ready UID CRC16 8 bits 64 bits 16 bits 26h Request EOF Request parameter: ● UID (Optional) Table 45. Reset to Ready response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter Table 46. Reset to Ready request format when Error_flag is set Response Response_ SOF flags 8 bits Error code CRC16 8 bits 16 bits Response parameter: ● Error code as Error_flag is set: – 0Fh: other error Figure 46. Reset to Ready frame exchange between VCD and LRIS2K VCD LRIS2K 64/102 SOF Reset to Ready request EOF <-t1-> SOF Reset to Ready response EOF Response EOF LRIS2K 30 Write AFI Write AFI On receiving the Write AFI request, the LRIS2K programs the 8-bit AFI value to its memory. Only bits set to ‘1’ are programmed to the AFI Register. Bits set to ‘0’ are not updated by the LRIS2K. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not write correctly the AFI value into the memory. The tW time is equal to t1nom + 18 × 302 µs. Table 47. Write AFI request format Request Request Write SOF _flags AFI 8 bits 27h UID AFI CRC16 64 bits 8 bits 16 bits Request EOF Request parameters: ● UID (Optional) ● AFI Table 48. Write AFI response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. Table 49. Write AFI response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set – 12h: block is locked – 13h: block not programmed 65/102 Write AFI LRIS2K Figure 47. Write AFI frame exchange between VCD and LRIS2K VCD 66/102 SOF Write AFI request EOF Write AFI response LRIS2K <-t1-> SOF EOF LRIS2K <------------ tW ------------><- t1 -> SOF Write sequence when error Write AFI response EOF LRIS2K 31 Lock AFI Lock AFI On receiving the Lock AFI request, the LRIS2K locks the AFI value permanently. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not Lock correctly the AFI value in memory. The tW time is equal to t1nom + 18 × 302 µs. Table 50. Lock AFI request format Request Request_ SOF flags 8 bits Lock AFI UID CRC16 28h 64 bits 16 bits Request EOF Request parameter: ● UID (optional) Table 51. Lock AFI response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter Table 52. Lock AFI response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set – 11h: block is locked – 14h: block not locked Figure 48. Lock AFI frame exchange between VCD and LRIS2K VCD SOF Lock AFI request EOF Lock AFI response LRIS2K <-t1-> SOF EOF LRIS2K <------------ tW ------------><- t1 -> SOF Lock sequence when error Lock AFI response EOF 67/102 Write DSFID 32 LRIS2K Write DSFID On receiving the Write DSFID request, the LRIS2K programs the 8-bit DSFID value to its memory. Only bits set to ‘1’ are programmed to the DSFID Register. Bits at ‘0’ are not updated by the LRIS2K. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not write correctly the DSFID value in memory. The tW time is equal to t1nom + 18 × 302 µs. Table 53. Write DSFID request format Request Request_ Write SOF flags DSFID 8 bits 29h UID DSFID CRC16 64 bits 8 bits 16 bits Request EOF Request parameters: ● UID (optional) ● DSFID Table 54. Write DSFID response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter Table 55. Write DSFID response format when Error_flag is set Response Response_flags SOF Error code CRC16 8 bits 16 bits 8 bits Response parameter: ● 68/102 Error code as Error_flag is set – 12h: block is locked – 13h: block not programmed Response EOF LRIS2K Write DSFID Figure 49. Write DSFID frame exchange between VCD and LRIS2K VCD SOF Write DSFID EOF request Write DSFID response LRIS2K <-t1-> SOF LRIS2K <------------ tW ------------><- t1 -> SOF EOF Write sequence when error Write DSFID EOF response 69/102 Lock DSFID 33 LRIS2K Lock DSFID On receiving the Lock DSFID request, the LRIS2K locks the DSFID value permanently. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not lock correctly the DSFID value in memory. The tW time is equal to t1nom + 18 × 302 µs. Table 56. Lock DSFID request format Request Request_ SOF flags Lock DSFID UID CRC16 2Ah 64 bits 16 bits 8 bits Request EOF Request parameter: ● UID (optional) Table 57. Lock DSFID response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. Table 58. Lock DSFID response format when Error_flag is set Response Response_flags SOF Error code CRC16 8 bits 16 bits 8 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 11h: block is locked – 14h: block not locked Figure 50. Lock DSFID frame exchange between VCD and LRIS2K VCD 70/102 SOF Lock DSFID EOF request Lock DSFID response LRIS2K <-t1-> SOF EOF LRIS2K <------------ tW ------------><- t1 -> SOF Lock sequence when error Lock DSFID EOF response LRIS2K 34 Get System Info Get System Info When receiving the Get System Info command, the LRIS2K sends back its information data in the request.The Option_flag is supported and must be reset to 0. The Get System Info can be issued in both Addressed and Non Addressed modes. Table 59. Get System Info request format Request Request Get System SOF _flags Info 8 bits 2Bh UID CRC16 64 bits 16 bits Request EOF Request parameter: ● UID (optional) Table 60. Get System Info response format when Error_flag is NOT set Response Response Information SOF _flags _flags 00h 0Fh UID 64 bits DSFID AFI Memory IC Response CRC16 Size reference EOF 8 bits 8 bits 033Fh 001000xxb 16 bits Response parameters: ● Information flags set to 0Fh. DSFID, AFI, memory size and IC reference fields are present ● UID code on 64 bits ● DSFID value ● AFI value ● Memory size. The LRIS2K provides 64 blocks (3Fh) of 4 byte (03h) ● IC Reference. Only the 6 MSB are significant. The product code of the LRIS2K is 00 1010b=10d Table 61. Get System Info response format when Error_flag is set Response SOF Response_ flags Error code CRC16 01h 0Fh 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 03h: Option not supported – 0Fh: other error 71/102 Get System Info LRIS2K Figure 51. Get System Info frame exchange between VCD and LRIS2K VCD LRIS2K 72/102 SOF Get System Info request EOF <-t1-> SOF Get System Info response EOF LRIS2K 35 Get Multiple Block Security Status Get Multiple Block Security Status When receiving the Get Multiple Block Security Status command, the LRIS2K sends back the block security status. The blocks are numbered from '00 to '3F' in the request and the value is minus one (–1) in the field. For example, a value of '06' in the "Number of blocks" field requests to return the security status of 7 blocks. Table 62. Get Multiple Block Security Status request format Get Multiple Request Request Block SOF _flags Security Status UID 8 bits 64 bits 2Ch First Number block of number blocks 8 bits 8 bits CRC16 Request EOF 16 bits Request parameters: ● UID (optional) ● First block number ● Number of blocks NOT set Table 63. Get Multiple Block Security Status response format when Error_flag is NOT set Response SOF Response_ Flags Block locking status CRC16 8 bits 8 bits(1) 16 bits Response EOF 1. Repeated as needed. Response parameters: ● Block Locking Status (see Table 64: Block Locking status) ● N blocks of data Table 64. Block Locking status b7 b6 b5 Reserved for future use. All at 0 Table 65. b4 b3 password control bits b2 b1 b0 Read / Write protection bits 0: Current Block not locked 1: Current Block locked Get Multiple Block Security Status response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 03h: Option not supported – 0Fh: other error 73/102 Get Multiple Block Security Status LRIS2K Figure 52. Get Multiple Block Security Status frame exchange between VCD and LRIS2K VCD LRIS2K 74/102 SOF Get Multiple Block Security Status EOF <-t1-> SOF Get Multiple Block EOF Security Status LRIS2K 36 Kill Kill On receiving the Kill command, in the Addressed mode only, the LRIS2K compares the kill code with the data contained in the request and reports whether the operation was successful in the request. The Option_flag is supported. If the command is received in the Non Addressed or the Selected mode, the LRIS2K returns an error response. During the comparison cycle equal to tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not match the kill code correctly. The tW time is equal to t1nom + 18 × 302 µs. After a successful Kill command, the LRIS2K is deactivated and does not interpret any other command. Table 66. Kill request format Request Request SOF _flags 8 bits Kill IC Mfg Code UID Kill access Kill code CRC16 A6h 0x02 64 bits 00h 32 bits 16bits Request EOF Request parameters: ● UID (optional) ● Kill code Table 67. Kill response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. The response is send back after the writing cycle Table 68. Kill response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 0Fh: other error – 14h: block not locked 75/102 Kill LRIS2K Figure 53. Kill frame exchange between VCD and LRIS2K VCD 76/102 SOF Kill request EOF LRIS2K <-t1-> SOF LRIS2K <------------ tW ------------><- t1 -> SOF Kill response EOF Kill sequence when error Kill response EOF LRIS2K 37 Write Password Write Password On receiving the Write Password command, the LRIS2K uses the data contained in the request to write the password and reports whether the operation was successful in the request. The Option_flag is supported. During the write cycle time, tW, there must be no modulation at all (neither 100% nor 10%). Otherwise, the LRIS2K may not correctly program the data into the memory. The tW time is equal to t1nom + 18 × 302 µs. After a successful write, the selected password must be locked again by issuing a Lock Password command to re-activate the block protection. Prior to writing the password for a block, the Write Password command erases the Protect Status area of the block. Table 69. Write Password request format Request Request Write IC Mfg SOF _flags Password code 8 bits B1h 02h UID Password number Data CRC16 64 bits 8 bits 32 bits 16 bits Request EOF Request parameters: ● UID (optional) ● Password number (00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other = Error) ● Data Table 70. Write Password response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● 32-bit password value. The response is sent back after the write cycle. Table 71. Write Password response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 10h: block address not available – 12h: block is locked – 13h: block not programmed 77/102 Write Password LRIS2K Figure 54. Write Password frame exchange between VCD and LRIS2K VCD 78/102 SOF Write Password request EOF Write Password response LRIS2K <-t1-> SOF EOF LRIS2K <------------ tW ------------><- t1 -> SOF Write sequence when error Write Password response EOF LRIS2K 38 Lock Password Lock Password On receiving the Lock Password command, the LRIS2K sets the access rights and permanently locks the selected block. The Option_flag is supported. RFU bit 8 of the request_flag is used to select either the memory area (bit 8 = ‘0’) or the password area (bit 8 = ‘1’). During the write cycle tW, there should be no modulation (neither 100% nor 10%) otherwise, the LRIS2K may not correctly lock the memory block. The tW time is equal to t1nom + 18 × 302 µs. Table 72. Lock Password request format Request Request Lock IC Mfg SOF _flags Password code 8 bits B2h Block Protect Request CRC16 number Status EOF UID 02h 64 bits 8 bits 8 bits 16 bits Request parameters: ● (Optional) UID ● Block number (bit 8 = ‘1’: 00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other = Error) ● Protect status (refer to Table 73) Table 73. Protect status b7 b6 b5 0 0 0 Table 74. b4 b3 password control bits b2 b1 Read / Write protection bits b0 1 Lock Password response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. Table 75. Lock Password response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 10h: block address not available – 11h: block is locked – 14: block not locked 79/102 Lock Password LRIS2K Figure 55. Lock Password frame exchange between VCD and LRIS2K VCD 80/102 SOF Lock Password request EOF Lock Password response LRIS2K <-t1-> SOF EOF LRIS2K <------------ tW ------------><- t1 -> SOF Lock sequence when error Lock Password response EOF LRIS2K 39 Present Password Present Password On receiving the Present Password command, the LRIS2K compares the requested password with the data contained in the request and reports whether the operation has been successful in the request. The Option_flag is supported. During the comparison cycle equal to tW, there should be no modulation (neither 100% nor 10%) otherwise, the LRIS2K the Password value may not be correctly compared. The tW time is equal to t1nom + 18 × 302 µs. After a successful command, the access to all the memory blocks linked to the password is changed as described in Section 2: LRIS2K block security. Table 76. Present Password request format IC Request Request Present Mfg SOF _flags Password code 8 bits B3h 02h UID Password number Data CRC16 64 bits 8 bits 32 bits 16 bits Request EOF Request parameters: ● UID (optional) ● Password number (0x01 = Pswd1, 0x02 = Pswd2, 0x03 = Pswd3, other = Error) ● Data Table 77. Present Password response format when Error_flag is NOT set Response SOF Response_flags CRC16 8 bits 16 bits Response EOF Response parameter: ● No parameter. The response is send back after the writing cycle Table 78. Present Password response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 0Fh: other error 81/102 Present Password LRIS2K Figure 56. Present Password frame exchange between VCD and LRIS2K VCD 82/102 SOF Present Password request EOF Present Password response LRIS2K <-t1-> SOF LRIS2K <------------ tW ------------><- t1 -> SOF EOF sequence when error Present Password response EOF LRIS2K 40 Fast Read Single Block Fast Read Single Block On receiving the Fast Read Single Block command, the LRIS2K reads the requested block and sends back its 32-bit value in the request. The Option_flag is supported. The data rate of the response is multiplied by 2. Table 79. Fast Read Single Block request format Request Request_ SOF flags Fast Read IC Mfg Single code Block 8 bits C0h 02h UID Block number CRC16 64 bits 8 bits 16 bits Request EOF Request parameters: ● Option_flag ● UID (optional) ● Block number Table 80. Fast Read Single Block response format when Error_flag is NOT set Response Response SOF _flags Block Locking Status Data CRC16 8 bits 32 bits 16 bits 8 bits Response EOF Response parameters: ● Block Locking Status if Option_flag is set (see Table 81) ● 4 bytes of block data Table 81. Block Locking status b7 b6 b5 Reserved for future used. All at 0 Table 82. b4 b3 password control bits b2 b1 Read / Write protection bits b0 0: Current Block not locked 1: Current Block locked Fast Read Single Block response format when Error_flag is set Response SOF Response_ Flags Error code CRC16 8 bits 8 bits 16 bits Response EOF Response parameter: ● Error code as Error_flag is set: – 0Fh: other error – 10h: block address not available 83/102 Fast Read Single Block LRIS2K Figure 57. Fast Read Single Block frame exchange between VCD and LRIS2K VCD LRIS2K 84/102 SOF Fast Read Single Block request EOF <-t1-> SOF Fast Read Single Block response EOF LRIS2K 41 Fast Inventory Initiated Fast Inventory Initiated Before receiving the Fast Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Fast Inventory Initiated command. On receiving the Fast Inventory Initiated request, the LRIS2K runs the anticollision sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is shown in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The data rate of the response is multiplied by 2. The request contains the: ● flags ● Inventory command code ● AFI if the AFI_flag is set ● mask length ● mask value ● CRC The LRIS2K does not generate any answer in case of error. Table 83. Fast Inventory Initiated request format Fast Request Request IC Mfg Optional Mask Inventory SOF Flags code AFI length Initiated 8 bits C1h 02h 8 bits 8 bits Mask value CRC16 0 - 64 bits 16 bits Request EOF The response contains: ● the flags ● the Unique ID Table 84. Fast Inventory Initiated response format Response Response DSFID SOF _flags 8 bits 00h UID CRC16 64 bits 16 bits Response EOF During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD. ● If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tSOF ● If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tNRT where: ● tSOF is the time required by the LRIS2K to transmit an SOF to the VCD ● tNRT is the nominal response time of the LRIS2K tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode. 85/102 Fast Initiate 42 LRIS2K Fast Initiate On receiving the Fast Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The data rate of the response is multiplied by 2. The request contains: ● No data Table 85. Request SOF Fast Initiate request format Request_flags Fast Initiate IC Mfg Code CRC16 8 bits C2h 02h 16 bits Request EOF The response contains: ● the flags ● the Unique ID Table 86. Fast Initiate response format Response Response DSFID SOF _flags 8 bits 00h UID CRC16 64 bits 16 bits Response EOF Figure 58. Fast Initiate frame exchange between VCD and LRIS2K VCD LRIS2K 86/102 SOF Fast Initiate request EOF <-t1-> SOF Fast Initiate response EOF LRIS2K 43 Inventory Initiated Inventory Initiated Before receiving the Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Inventory Initiated command. On receiving the Inventory Initiated request, the LRIS2K runs the anticollision sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is given in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The request contains the: ● flags ● Inventory command code ● AFI if the AFI_flag is set ● mask length ● mask value ● CRC The LRIS2K does not generate any answer in case of error. Table 87. Inventory Initiated request format Request Request Inventory SOF _flags Initiated 8 bits D1h IC Optional Mask Mfg AFI length code 02h 8 bits 8 bits Mask value CRC16 0 - 64 bits 16 bits Request EOF The response contains the: ● flags ● unique ID Table 88. Inventory Initiated response format Response Response DSFID SOF _flags 8 bits 0x00 UID CRC16 64 bits 16 bits Response EOF During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD. ● If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tSOF ● If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3µs) + tNRT where: ● tSOF is the time required by the LRIS2K to transmit an SOF to the VCD ● tNRT is the nominal response time of the LRIS2K tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode. 87/102 Initiate 44 LRIS2K Initiate On receiving the Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The request contains: ● No data Table 89. Initiate request format Request Request_flags SOF Initiate IC Mfg code CRC16 D2h 02h 16 bits 8 bits Request EOF The response contains the: ● flags ● unique ID Table 90. Initiate Initiated response format Response Response SOF _flags 8 bits DSFID UID CRC16 00h 64 bits 16 bits Figure 59. Initiate frame exchange between VCD and LRIS2K VCD LRIS2K 88/102 SOF Initiate request EOF <-t1-> SOF Initiate response EOF Response EOF LRIS2K 45 Maximum rating Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 91. Absolute maximum ratings Symbol Parameter Min. Max. Unit 15 25 °C 23 months Wafer kept in its antistatic bag TSTG, hSTG, Storage conditions tSTG A1, A6, A7 ICC VMAX VESD 15 25 °C 40% 60% RH 2 years Supply current on AC0 / AC1 –20 20 mA Input voltage on AC0 / AC1 –7 7 V A1, A6, A7 –7000 7000 V MLP (HBM) –1000 1000 V MLP (MM) –100 100 V Electrostatic discharge voltage(1) (2) 1. Mil. Std. 883 - Method 3015. 2. ESD test: ISO10373-7 specification. 89/102 DC and AC parameters 46 LRIS2K DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 92. AC characteristics(1) (2) Symbol fCC Parameter External RF signal frequency MICARRIER 10% carrier modulation index tRFR, tRFF tRFSBL tRFSBL tJIT Min Typ Max 13.553 13.56 13.567 MHz MI=(A-B)/(A+B) 30 % 10% rise and fall time 0.5 3.0 µs 10% minimum pulse width for bit 7.1 9.44 µs 95 100 % 100% rise and fall time 0.5 3.5 µs 100% minimum pulse width for bit 7.1 9.44 µs Bit pulse jitter -2 +2 µs 1 ms MI=(A-B)/(A+B) tMIN CD Minimum time from carrier generation to first data From H-field min 0.1 fSH Subcarrier frequency high FCC/32 423.75 KHz fSL Subcarrier frequency low FCC/28 484.28 KHz t1 Time for LRIS2K response 4224/FS 318.6 320.9 323.3 µs t2 Time between commands 4224/FS 309 311.5 314 µs tW Programming time 5.8 ms 1. TA = –20 to 85 °C. 2. All timing measurements were performed on a reference antenna with the following characteristics: External size: 75 mm x 48 mm Number of turns: 6 Width of conductor: 1 mm Space between 2 conductors: 0.4 mm Value of the tuning capacitor: 28.5 pF (LRIS2K-W4) Value of the coil: 4.3 µH Tuning frequency: 13.8 MHz. 90/102 Unit 10 MICARRIER 100% carrier modulation index tRFR, tRFF Condition LRIS2K DC and AC parameters Table 93. DC characteristics(1) Symbol Parameter Test conditions VCC Regulated voltage VRET Retromodulated induced voltage ICC Min. Typ. 1.5 ISO10373-7 Max. Unit 3.0 V 10 mV Read VCC = 3.0 V 50 µA Write VCC = 3.0 V 150 µA Supply current f = 13.56 MHz for W4/1 21 pF f = 13.56 MHz for W4/2 28.5 pF f = 13.56 MHz for W4/3 97 pF f = 13.56 MHz for W4/4 23.5 pF Internal tuning capacitor CTUN 1. TA = –20 to 85 °C. Table 94. Operating conditions Symbol Parameter Min. Max. Unit TA Ambient operating temperature –20 85 °C Figure 60 shows an ASK modulated signal, from the VCD to the LRIS2K. The test condition for the AC/DC parameters are: ● Close coupling condition with tester antenna (1mm) ● LRIS2K performance measured at the tag antenna Figure 60. LRIS2K synchronous timing, transmit and receive A B tRFF tRFR fCC tRFSBL tMAX tMIN CD AI06680 91/102 Package mechanical data 47 LRIS2K Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 61. A1 antenna on tape outline C1 A1 B1 C2 A2 B2 ai10119 1. Drawing is not to scale. Table 95. A1 antenna on tape, mechanical data Symbol Typ Min Max Unit A1 Coil width 45 44.5 45.5 mm A2 Coil length 76 75.5 76.5 mm B1 Antenna cut width 49 48.8 49.2 mm B2 Antenna cut length 82 81.8 82.2 mm C1 Die position from antenna 23 22.8 23.2 mm C2 Die position from antenna 56 55.8 56.2 mm Silicon thickness 180 165 195 µm Unloaded Q value 35 Q FNOM PA 92/102 Parameter Unloaded free-air resonance H-field energy for device operation 15.1 MHz 0.03 90 A/m dbµA/m LRIS2K Package mechanical data Figure 62. A6 antenna on tape outline I A B ai10120 1. Drawing is not to scale. Table 96. A6 antenna on tape mechanical data Symbol Parameter Typ Min Max Unit A Coil diameter 35 34.5 35.5 mm B Antenna cut diameter 40 38.8 40.2 mm I Hole diameter 16 15.8 16.2 mm Overall thickness of copper antenna coil 80 70 90 µm Silicon thickness 180 165 195 µm Unloaded Q value 35 Q FNOM PA Unloaded free-air resonance H-field energy for device operation 15.1 MHz 0.5 114 A/m dbµA/m 93/102 Package mechanical data LRIS2K Figure 63. A7 antenna on tape outline A1 B1 C1 C2 A2 B2 ai10121 1. Drawing is not to scale. Table 97. A7 antenna on tape mechanical data Symbol Typ Min Max Unit A1 Coil width 40 39.5 40.5 mm A2 Coil length 20 19.5 20.5 mm B1 Antenna cut width 44 43.8 44.2 mm B2 Antenna cut length 24 23.8 24.2 mm C1 Die position from antenna 10 9.8 10.2 mm C2 Die position from antenna 20 19.8 20.2 mm Overall thickness of copper antenna coil 160 145 175 µm Silicon thickness 180 165 195 µm Unloaded Q value 35 Q FNOM PA 94/102 Parameter Unloaded free-air resonance H-field energy for device operation 15.1 MHz 1 120 A/m dbµA/m LRIS2K Package mechanical data Figure 64. UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) outline e D b L1 L3 E E2 L A D2 ddd A1 UFDFPN-01 1. Drawing is not to scale. Table 98. UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data Inches(1) Millimeters Symbol Typ. Min. Max. Typ. Min. Max. A 0.55 0.45 0.6 0.0217 0.0177 0.0236 A1 0.02 0 0.05 0.0008 0 0.002 b 0.25 0.2 0.3 0.0098 0.0079 0.0118 D 2 1.9 2.1 0.0787 0.0748 0.0827 D2 1.6 1.5 1.7 0.063 0.0591 0.0669 E 3 2.9 3.1 0.1181 0.1142 0.122 E2 0.2 0.1 0.3 0.0079 0.0039 0.0118 e 0.5 - - 0.0197 - - L 0.45 0.4 0.5 0.0177 0.0157 0.0197 L1 L3 (2) ddd 0.15 0.0059 0.3 0.0118 0.08 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 95/102 Part numbering 48 LRIS2K Part numbering Table 99. Ordering information scheme Example: LRIS2K - W4/2 Device type LRIS2K Package W4 =180 µm ± 15 µm unsawn wafer SBN18 = 180 µm ± 15 µm bumped and sawn wafer on 8-inch frame A1T = 45 mm x 76 mm copper antenna on continuous tape A1S = 4 5mm x 76 mm copper singulated adhesive antenna on tape A6S2U = 35 mm copper singulated adhesive CD antenna on white PET tape and no marking A7T = 20 mm x 40 mm copper antenna on continuous tape MBTG = UFDFPN8 (MLP8), tape & reel packing, ECOPACK®, RoHS compliant, Sb2O3-free and TBBA-free For further information on any aspect of this device, please contact your nearest ST sales office. 96/102 LRIS2K Anticollision algorithm (Informative) Appendix A Anticollision algorithm (Informative) The following pseudocode describes how anticollision could be implemented on the VCD, using recursivity. A.1 Algorithm for pulsed slots function function function function push (mask, address); pushes on private stack pop (mask, address); pops from private stack pulse_next_pause; generates a power pulse store(LRIS2K_UID); stores LRIS2K_UID function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask; generates new mask ; send the request mode = anticollision send_Request (Request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; LRIS2K is inventoried then store (LRIS2K_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ; if some collisions have been detected and then ; not yet processed, the function calls itself poll_loop (sub_address_size); recursively to process the last stored collision endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle 97/102 CRC (informative) Appendix B B.1 LRIS2K CRC (informative) CRC error detection method The cyclic redundancy check (CRC) is calculated on all data contained in a message, from the start of the flags through to the end of data. The CRC is used from VCD to LRIS2K and from LRIS2K to VCD. Table 100. CRC definition CRC definition CRC type ISO/IEC 13239 Length 16 bits Polynomial 16 X + X12 + X5 + 1 = 8408h Direction Preset Residue Backward FFFFh F0B8h To add extra protection against shifting errors, a further transformation on the calculated CRC is made. The One’s Complement of the calculated CRC is the value attached to the message for transmission. To check received messages the 2 CRC bytes are often also included in the re-calculation, for ease of use. In this case, the expected value for the generated CRC is the residue F0B8h. B.2 CRC calculation example This example in C language illustrates one method of calculating the CRC on a given set of bytes comprising a message. C-example to calculate or check the CRC16 according to ISO/IEC 13239 #define #define #define POLYNOMIAL0x8408// PRESET_VALUE0xFFFF CHECK_VALUE0xF0B8 x^16 + x^12 + x^5 + 1 #define #define #define NUMBER_OF_BYTES4// Example: 4 data bytes CALC_CRC1 CHECK_CRC0 void main() { unsigned int current_crc_value; unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = NUMBER_OF_BYTES; int calculate_or_check_crc; int i, j; calculate_or_check_crc = CALC_CRC; // calculate_or_check_crc = CHECK_CRC;// This could be an other example if (calculate_or_check_crc == CALC_CRC) { number_of_databytes = NUMBER_OF_BYTES; 98/102 LRIS2K CRC (informative) } else // check CRC { number_of_databytes = NUMBER_OF_BYTES + 2; } current_crc_value = PRESET_VALUE; for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) { current_crc_value = (current_crc_value >> 1) ^ POLYNOMIAL; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == CALC_CRC) { current_crc_value = ~current_crc_value; printf ("Generated CRC is 0x%04X\n", current_crc_value); // stream // } else { if { current_crc_value is now ready to be appended to the data (first LSByte, then MSByte) // check CRC (current_crc_value == CHECK_VALUE) printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value); } } } 99/102 Application family identifier (AFI) (informative) Appendix C LRIS2K Application family identifier (AFI) (informative) The AFI (application family identifier) represents the type of application targeted by the VCD and is used to extract from all the LRIS2K present only the LRIS2K meeting the required application criteria. It is programmed by the LRIS2K issuer (the purchaser of the LRIS2K). Once locked, it cannot be modified. The most significant nibble of the AFI is used to code one specific or all application families, as defined in Table 101. The least significant nibble of the AFI is used to code one specific or all application subfamilies. Subfamily codes different from 0 are proprietary. Table 101. AFI coding(1) AFI AFI Most significant nibble Least significant nibble ‘0’ ‘0’ All families and subfamilies No applicative preselection ‘X’ '0 'All subfamilies of family X Wide applicative preselection 'X '‘Y’ Only the Yth subfamily of family X ‘0’ ‘Y’ Proprietary subfamily Y only ‘1 '‘0’, ‘Y’ Transport Mass transit, Bus, Airline,... '2 '‘0’, ‘Y’ Financial IEP, Banking, Retail,... '3 '‘0’, ‘Y’ Identification Access Control,... '4 '‘0’, ‘Y’ Telecommunication Public Telephony, GSM,... ‘5’ ‘0’, ‘Y’ Medical '6 '‘0’, ‘Y’ Multimedia '7 '‘0’, ‘Y’ Gaming 8 '‘0’, ‘Y’ Data Storage '9 '‘0’, ‘Y’ Item Management 'A '‘0’, ‘Y’ Express Parcels 'B '‘0’, ‘Y’ Postal Services 'C '‘0’, ‘Y’ Airline Bags 'D '‘0’, ‘Y’ RFU 'E '‘0’, ‘Y’ RFU ‘F’ ‘0’, ‘Y’ RFU 1. X = '1' to 'F', Y = '1' to 'F' 100/102 Meaning VICCs respond from Examples / Note Internet services.... Portable Files,... LRIS2K Revision history Revision history Table 102. Document revision history Date Revision 13-Jun-2006 1 Initial release. 19-Feb-2007 2 Figure 2: MLP connections added. Only bits set to ‘1’ are programmed to the AFI and DSFID Registers (see Section 30: Write AFI and Section 32: Write DSFID. CTUN typical value for W4/3 modified in Table 93: DC characteristics. Small text changes. 07-Sep-2007 3 23.5 pF internal tuning capacitor (CTUN) value added (see Features on page 1 and Table 93: DC characteristics. VESD modified for MLP in Table 91: Absolute maximum ratings. 4 Small text changes. Titles of Table 63 and Table 64 modified. Response parameters modified in Section 35: Get Multiple Block Security Status on page 73. UFDFPN8 package mechanical data updated and dimensions in inches rounded to four decimal digits instead of three in Table 98: UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data 08-Apr-2008 Changes 101/102 LRIS2K Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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