1/4 STRUCTURE ： PRODUCT NAME ： BD8645EFV MODEL NAME： FEATURES ： Silicon Monolithic Integrated Circuit Synchronous rectification with built-in FET type DC/DC converter IC ・Synchronous rectification with built-in FET type DC/DC converter ・Reference voltage accuracy FB 0.8V±1% ・Switching frequency 250kHz～2.3MHz（Synchronizable with external clock.） ・Over current protection circuit ・Thermal shutdown ・Output voltage watch （VDET） function ・Input low voltage detection （UVLO） function ・Soft start / Start delay circuit ◎ABSOLUTE MAXIMUM RATING （Ta=25℃） Parameter Input supply voltage Input terminal voltage Output terminal voltage Output current Power dissipation Operating temperature Storage temperature Symbol VIN VINP*1 VOUT*２ IOUT Pd Topr Tstg Limits 7 VIN VIN 5 *３ 3.2 -40 ～ 85 -55 ～ 150 Unit V V V A Ｗ ℃ ℃ ＊1 VINP Application terminal： SYNCLK, EN, SS/DELAY, FB ＊2 VOUT Application terminal：SW, VDET, FC, RT ＊3 (70mm×70mm, thickness 1.6mm, and four layer glass epoxy substrates)When mounting substrate and the package back exposure part are connected with solder. Operating at higher than Ta=25℃, 25.6mW shall be reduced per 1 ◎Operation condition Parameter Input supply voltage Output current Symbol VIN IOUT MIN 4 - TYP - This product is not designed for protection against radioactive rays. Status of this document The Japanese version of this document is the formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document, formal version takes priority. Be careful to handle because the content of the description of this material might correspond to the labor (technology in the design, manufacturing, and use) in foreign country exchange and Foreign Trade Control Law. REV. B MAX 5.5 4 Unit Ｖ A 2/4 ◎Electrical characteristic (Unless otherwise noted Ta=25℃, VIN=5.0V) Parameter VIN supply current (operating) VIN supply current (standby) Reference voltage (VREF) Output rise detection voltage Output decrease detection voltage Terminal VDET output current Oscillation frequency Pch FET ON resistance Nch FET ON resistance UVLO voltage SW leak current EN terminal H threshold voltage EN terminal L threshold voltage FC sink current FC source current SS/DELAY terminal source current Symbol IQ_active IQ_stby VREF VOVP VLVP IVDET fOSC RPFET RNFET VUVLO ILSW VENH VENL IFCSI IFCSO ISSSO Specification value MIN TYP MAX 500 700 0 10 0.792 0.8 0.808 30 60 90 -90 -60 -30 0.4 2.0 2.3 2.6 70 105 50 85 2.35 2.50 2.65 0 10 1.1 0.4 5 10 -10 -5 2 4 6 UNIT μA μA V mV mV mA MHz mΩ mΩ V μA V V μA μA μA ●VFB :FB terminal voltage、VEN :EN terminal voltage、VFC :FC terminal voltage、VVDET: VDET < 0.3V ●Current capability should not exceed Pd. REV. B Condition VFB = 0.83V, VFC = 1V VEN = 0V Monitoring FB terminal Monitoring FB terminal VVDET < 0.3V RRT = 43kΩ ISW = 1A ISW = -1A VEN= 0V, VIN = 5.5V 3/4 ◎BLOCK DIAGRAM ◎PIN ASSIGNMENT No. Symbol Description No. Symbol 1 2 3 4 5 6 7 8 9 10 SGND RT VDET SW SW PGND PGND PGND SW SW Signal GND terminal Frequency adjustment resistance connection terminal Output abnormality detection terminal Switching output terminal Switching output terminal Power GND terminal Power GND terminal Power GND terminal Switching output terminal Switching output terminal 11 12 13 14 15 16 17 18 19 20 PVIN PVIN PVIN SVIN SYNCLK EN NC SS/DELAY FC FB Description Power supply input terminal Power supply input terminal Power supply input terminal Signal system power supply input terminal Input terminal for external clock synchronization Enable input terminal Soft start adjustment capacity connection terminal Phase amends terminal Feedback terminal ◎PACKAGE OUTLINE Product number BD8645 1PIN MARK Lot No. HTSSOP-B20 (UNIT：mm) REV. B 4/4 ◎NOTE ON USE 1．About the absolute maximum rating Attention is brushed off enough to the quality control, it is likely to destroy when the absolute maximum rating such as impressed voltages (VCC_IN,DCIN) and ranges (Topr) of the operating temperature as it is exceeded, the mode of breakings of the short or the opening, etc. cannot be specified, and examine it in this IC to give physical measures for safety such as fuses when a special mode that exceeds the absolute maximum rating is assumed. 2．About the reverse-connection of the power supply connector IC might destroy it by reversely connecting the power supply connector. Give measures such as putting the diode between power supply terminals of power supply and IC outside for the reverse-touching destruction protection. 3．Power supply line Please do measures such as putting the bypass capacitor in power supply-GND nearest pin of this IC as the route of the resurrection current to cause the return of the current in which it resurrected it by the counter electromotive force of the coil. Please confirm the characteristic of the electrolytic capacitor enough as the capacity omission etc. at the low temperature never happen, and decide it. 4．About grand potential Any state of operation must become the lowest potential about the potential of the terminal GND. Moreover, confirm whether there is terminal that is actually the voltage of GND or less including transients. 5．About the heat design Think about permissible loss (Pd) in an actual state of use, and do the heat design with the margin enough. 6．About the short and the miss-installation between terminals Note the direction and the miss-registration of IC enough when you install it in the set substrate. IC might destroy it as well as reversely connecting the power supply connector when installing it by mistake. Moreover, there is fear of destruction when the foreign body enters between terminals, the terminal, the power supply, and grandeur and it is short-circuited. 7．About operation in strong electromagnetic field In use in strong electromagnetic field, note that there is a possibility of malfunctioning. 8．About the capacitor during output-GND The current charged the capacitor with when VCC is 0V or is GND and is short-circuited when a big capacitor is connected between GND output by some factors flows into the output and it is likely to destroy it. Give the capacitor between GND output to 0.1μF or less. 9．About the inspection by the set substrate It is likely to suffer stress to IC and discharge electricity every one process when you connect the capacitor with the pin with low impedance when inspecting it in the set substrate. Moreover, detach it after connecting after the power supply is turned off without fail when detaching it to G in the inspection process, inspecting, and turning off the power supply. n addition, be give the earth to the assembly process as a static electricity measures, and careful enough when it transports and you preserve it. 10．About each input terminal + This IC is a monolithic IC which has a P isolations and P substrate to isolate elements each other. This P layer and an N layer in each element form a PN junction to construct various parasitic elements. For instance, the potential difference operates in resistance as shown in the figure below when resistance and the transistor connect it with the terminal and the playground (GND) >(terminal B) joint of PN operates as a parasitic diode in playground (GND) >(terminal A) transistor (NPN). In addition, the NPN transistor of parasitism works with N layer of the element of the above-mentioned parasitic diode and the neighborhood and others in transistor (NPN). A parasitic element in IC composition is inevitably formed because of the potential relation. A parasitic element can operate, the interference with the circuit operation be caused, it malfunction, and, consequently, it cause destruction. Therefore, do not do the usage that a parasitic element operates as a voltage that is lower than the playground (GND;P substrate) is impressed to the input terminal enough. Moreover, do not impress the voltage to the input terminal when you do not impress the power-supply voltage to IC. Give each input terminal to me the voltage below the power-supply voltage or in the guarantee value of an electric characteristic when you similarly impress the power-supply voltage. Example of IC of simple structure 11．Earth wiring pattern If small signal GND and large current GND exist, disperse their pattern. In addition, for voltage change by pattern wiring impedance and large current not to change voltage of small signal GND, each ground terminal of IC must be connected at the one point on the set circuit board. As for GND of external parts, it is similar to the above-mentioned. 12．Thermal Shut-Down When a thermal shutdown operates, the DC/DC converter controller of all Ch is turned off. When a thermal shutdown is released, the DC/DC converter controller of all Ch becomes an operation beginning from turning off. REV. B Appendix Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM CO.,LTD. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). 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More detail product informations and catalogs are available, please contact your nearest sales office. ROHM Customer Support System www.rohm.com Copyright © 2009 ROHM CO.,LTD. THE AMERICAS / EUROPE / ASIA / JAPAN Contact us : webmaster @ rohm.co. jp 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan TEL : +81-75-311-2121 FAX : +81-75-315-0172 Appendix-Rev4.0