CAT6243 1 Amp Adjustable CMOS LDO Voltage Regulator Description The CAT6243 is a low dropout CMOS voltage regulator providing up to 1000 mA of output current with fast response to load current and line voltage changes. CAT6243 offers a user adjustable output voltage from 0.8 V to 5.0 V and its low quiescent current make CAT6243 ideal for energy conscious designs. CAT6243 is available in a DPAK−5 5−lead packages and in a space saving 3 mm x 3 mm WDFN−6 package with a power pad for heat sinking to the PCB. www.onsemi.com WDFN−6 3 x 3 mm CASE 511AP Features • • • • • • • • • • • • DPAK−5 TO−252 CASE 369AE Guaranteed 1000 mA Continuous Output Current VOUT: 0.8 V to 5.0 V Dropout Voltage of 350 mV Typical at 1000 mA ±2.0% Output Voltage Accuracy at Room Temperature No−load Ground Current of 70 mA Typical Full−load Ground Current of 140 mA Typical “Zero” Current Shutdown Mode Under Voltage Lockout Stable with Ceramic Output Capacitors Current Limit and Thermal Protection 4 and 5 Lead DPAK−5 and 3 mm x 3 mm WDFN−6 Power Packages These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant PIN CONNECTIONS (Top Views) 1 EN VIN GND ADJ BYP VOUT GND (Tab) 1 5 • • • • • ADJ VOUT GND VIN EN Typical Applications DSP Core and I/O Voltages FPGAs, ASICs PDAs, Mobile Phones, GPS Camcorders and Cameras Hard Disk Drives ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. MARKING DIAGRAMS 6243 AXXX YWW G 1 6243 A XXX Y WW G = Specific Device Code = Assembly Location = Last Three Digits of = Assembly Lot Number = Production Year = Production Week (Two Digits) = Pb−Free Package x6243yG ALYWW G A L Y WW *Pb−Free indicator, “G” or microdot “G”, may or may not be present. © Semiconductor Components Industries, LLC, 2015 September, 2015 − Rev. 9 x 6243 y 1 = P (CAT) = Device Code = Output Voltage = W = Adjustable = Pb−Free Package = Assembly Location = Wafer Lot = Year = Work Week Publication Order Number: CAT6243/D CAT6243 VIN VIN VOUT VOUT ENABLE CIN 1 mF COUT 2.2 mF CAT6243 BYP CBYP (Optional) ADJ GND Figure 1. Application Schematic VOUT VIN ISENSE Thermal Shutdown + ADJ − + VREF − Enable Logic EN BYP 2.5 M GND Figure 2. Simplified Block Diagram Table 1. PIN FUNCTION DESCRIPTION Pin # WDFN−6 Pin # DPAK−5−5 Pin Name 1 5 EN 2, PAD 3, TAB GND Power Supply Ground; Device Substrate. The center pad is internally connected to Ground and as such can cause short circuits to signal traces running beneath the IC. This pad is intended for heat sinking the IC to the PCB and is typically connected to the PCB ground plane. 3 NC BYP Bypass input. Placing a capacitor of 100 pF to 470 pF between BYP and ground reduces noise on VOUT. This capacitor is optional and it increases the turn−on time. 4 2 VOUT Regulated Output Voltage. A protection block eliminates any current flow from output to input if VOUT > VIN. 5 1 ADJ Output Voltage Adjust Input. This input ties to the common point of a resistor divider which determines the regulator’s output voltage. See Applications section for details on selecting resistor values. 6 4 VIN Positive Power Supply Input. Supplies power for VOUT as well as the regulator’s internal circuitry. Description The Enable Input. An active HIGH input, turning ON the LDO. This input should be tied to VIN if the LDO is not intended to be shut off during normal operation. A pull−down 2.5 MW resistor maintains the circuit in the OFF state if the pin is left open. www.onsemi.com 2 CAT6243 Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to 6.0 V VOUT −0.3 to 6.0 V Enable Input Range EN −0.3 to 5.5 V or (VIN + 0.3), whichever is lower V Adjust Input Range ADJ −0.3 to 5.5 V V Bypass Input Range BYP −0.3 to 5.5 V or (VIN + 0.3), whichever is lower V Power Dissipation PD Internally Limited mW TJ(max) 150 °C TSTG −65 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2 kV ESD Capability, Machine Model (Note 2) ESDMM 200 V TSLD 260 °C Input Voltage Range (Note 1) Output Voltage Range Maximum Junction Temperature Storage Temperature Range Lead Temperature Soldering Reflow (SMD Styles Only), Pb−Free Versions (Note 3) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating range. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78 3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D Table 3. THERMAL CHARACTERISTICS Rating Symbol Thermal Characteristics, WDFN−6, 3 x 3 mm Thermal Resistance, Junction−to−Air: 1 in2/1 oz. copper (Note 4) Thermal Reference, Junction−to−Case (Note 4) Value Unit °C/W 55 10 RqJA RyJL 4. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Table 4. OPERATING RANGES (Note 5) Rating Symbol Min Max Unit VIN 1.8 1.8 5.0 5.5 V Output Current IOUT 0.1 1000 mA Output Voltage VOUT 0.8 5.0 V TA −40 85 °C Input Voltage (Note 6) CAT6243−ADJ CAT6243DC Ambient Temperature 5. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating range. 6. Minimum VIN_MIN = 1.8 V or (VOUT + VDO), whichever is higher. www.onsemi.com 3 CAT6243 Table 5. ELECTRICAL CHARACTERISTICS (VIN = (VOUT + 1 V) or VIN_MIN, whichever is higher, CIN = 1 mF, COUT = 2.2 mF, for typical values TA = 25°C, for Bold values TA = −40°C to 85°C; unless otherwise noted.) Symbol Parameter Conditions Min Typ Max Unit 0.8 0.8 4.5 5.0 V −2 −2 −3 +2 +2 +3 INPUT / OUTPUT VOUT VOUT−ACC VADJ TCOUT Output Voltage Range Output Voltage Accuracy CAT6243−ADJ CAT6243DC CAT6243DC Initial accuracy, IOUT = 1 mA Voltage at ADJ input % 0.784 Output Voltage Temp. Coefficient CAT6243−ADJ CAT6243DC IOUT Output Current VR−LINE Line Regulation VR−LOAD CAT6243−ADJ CAT6243DC VOUT = 1.2 V VOUT = 2.5 V CAT6243−ADJ CAT6243DC 0.0001 1 VIN = VOUT + 1.0 V to VIN(max), IOUT = 10 mA −0.2 ±0.05 VIN = VOUT + 1.0 V to VIN(max), IOUT = 10 mA −0.35 A 0.2 1.5 2 % 3 IOUT = 300 mA TA = 25°C 600 IOUT = 1 A TA = 25°C 625 650 mV 110 130 85 VOUT = 1.2 V CAT6243−ADJ CAT6243DC VOUT = 2.5 V CAT6243−ADJ CAT6243DC 350 400 VOUT = 3.3 V 275 IADJ ADJ Input Current 100 IGND Ground Current IOUT = 0 mA nA mA 70 IOUT = 0 mA 100 IOUT = 1000 mA 140 IOUT = 1000 mA ISC %/V 0.35 VOUT = 3.3 V IGND−SD V ppm/°C IOUT = 100 mA to 1000 mA VDO 0.816 25 50 IOUT = 100 mA to 1000 mA Load Regulation 0.8 200 250 mA Shutdown Ground Current CAT6243−ADJ CAT6243DC VEN < 0.4 V Output short circuit current limit VOUT = 0 V 900 mA f = 1 kHz, BYP = 470 pF, IOUT = 10 mA 54 dB f = 20 kHz, BYP = 470 pF, IOUT = 10 mA 42 BW = 10 Hz to 100 kHz BYP = 470 pF, IOUT = 10 mA 45 2 5 PSRR AND NOISE PSRR eN Power Supply Rejection Ratio CAT6243 Output Noise Voltage for 1.8 V output mVrms UVLO, ROUT AND ESR VUVLO ROUT−SH ESR Under voltage lockout threshold 1.65 ON resistance of Discharge Transistor 150 COUT equivalent series resistance 5 1.75 V W 500 mW 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. www.onsemi.com 4 CAT6243 Table 5. ELECTRICAL CHARACTERISTICS (VIN = (VOUT + 1 V) or VIN_MIN, whichever is higher, CIN = 1 mF, COUT = 2.2 mF, for typical values TA = 25°C, for Bold values TA = −40°C to 85°C; unless otherwise noted.) Symbol Parameter Conditions Min Typ Max Unit ENABLE INPUT VHI Logic High Level VIN = 1.8 to 5.5 V VLO Logic Low Level VIN = 1.8 to 5.5 V IEN Enable Input Current VEN = 0.4 V VEN = VIN = 2.5 V REN Enable pull−down resistor 1.6 V 0.4 V 0.15 1 mA 1 3 2.5 MW CBYP = 0 pF 230 ms CBYP = 470 pF 1600 TIMING TON Turn−On Time THERMAL PROTECTION TSD Thermal Shutdown 145 °C THYS Thermal Hysteresis 10 °C 7. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. www.onsemi.com 5 CAT6243 TYPICAL CHARACTERISTICS (shown for VOUT = 2.5 V, VIN = 3.5 V, IOUT = 1 mA, CIN = 1 mF, COUT = 4.7 mF, CBYP = 0, and TA = 25°C unless otherwise specified.) 2.55 2.52 2.53 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.54 2.52 2.51 2.50 2.49 2.48 2.47 2.46 2.45 2.49 100 200 300 400 500 600 700 800 900 1000 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT LOAD CURRENT (mA) INPUT VOLTAGE (V) Figure 3. Output Voltage vs. Load Current Figure 4. Output Voltage vs. Input Voltage 150 100 140 90 GROUND CURRENT (mA) GROUND CURRENT (mA) 2.50 2.48 0 130 120 110 100 90 80 70 60 50 5.5 80 70 60 50 40 30 20 10 0 0 100 200 300 400 500 600 0 700 800 900 1000 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 OUTPUT LOAD CURRENT (mA) INPUT VOLTAGE (V) Figure 5. Ground Current vs. Load Current Figure 6. Ground Current vs. Input Voltage 3.0 400 350 2.5 OUTPUT VOLTAGE (V) DROPOUT VOLTAGE (mV) 2.51 300 250 200 150 100 IOUT = 1 mA 2.0 IOUT = 1000 mA 1.5 1.0 0.5 50 0 0 0 100 200 300 400 500 600 700 800 900 1000 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 OUTPUT LOAD CURRENT (mA) INPUT VOLTAGE (V) Figure 7. Dropout Voltage vs. Load Current Figure 8. Dropout Characteristics www.onsemi.com 6 CAT6243 TYPICAL CHARACTERISTICS 1.2 1.2 1.0 1.0 ENABLE THRESHOLD (V) ENABLE THRESHOLD (V) (shown for VOUT = 2.5 V, VIN = 3.5 V, IOUT = 1 mA, CIN = 1 mF, COUT = 4.7 mF, CBYP = 0, and TA = 25°C unless otherwise specified.) 0.8 0.6 0.4 0.2 0 2.0 2.5 3.0 3.5 4.0 4.5 0.4 0.2 5.5 5.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.5 5.0 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 9. Rising Enable Threshold vs. Supply Voltage Figure 10. Falling Enable Threshold vs. Supply Voltage 1400 80 1200 70 1000 60 VOUT = 0 PSRR (dB) CURRENT LIMIT (mA) 0.6 0 1.5 800 600 400 50 40 30 20 200 10 0 0 0 1 2 3 4 1E+01 1E+02 5 1E+03 1E+04 1E+05 INPUT VOLTAGE (V) FREQUENCY (Hz) Figure 11. Current Limit on Output vs. Supply Voltage Figure 12. PSRR @ 10 mA 1E+06 80 GROUND CURRENT (mA) 820 ADJUSTABLE VOLTAGE (mV) 0.8 810 800 790 780 −40 −20 0 20 40 60 80 100 70 60 50 40 −40 −20 120 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure 13. Adjustable Voltage vs. Temperature Figure 14. Ground Current vs. Temperature www.onsemi.com 7 CAT6243 TRANSIENT CHARACTERISTICS (shown for VOUT = 2.0 V, VIN = 3.0 V, IOUT = 1 mA, CIN = 1 mF, COUT = 4.7 mF, CBYP = 0, and TA = 25°C unless otherwise specified.) Figure 15. Enable Turn−On (1 mA Load) Figure 16. Enable Turn−Off (1 mA Load) Figure 17. Enable Turn−On (1000 mA Load) Figure 18. Enable Turn−Off (1000 mA Load) Figure 19. Enable Turn−On (1 mA Load) CBYP = 470 pF Figure 20. Enable Turn−On (1000 mA Load) CBYP = 470 pF www.onsemi.com 8 CAT6243 TRANSIENT CHARACTERISTICS (shown for VOUT = 2.0 V, VIN = 3.0 V, IOUT = 1 mA, CIN = 1 mF, COUT = 4.7 mF, CBYP = 0, and TA = 25°C unless otherwise specified.) Figure 21. Slow Enable Operation (1 mA Load) Figure 22. Slow Enable Operation (1000 mA Load) Figure 23. Load Transient Response (1 mA to 1000 mA) Figure 24. Enable Turn−On (1 mA Load) (VOUT = 0.8 V and VIN = 1.8 V) Figure 25. Load Transient Response (1 mA to 400 mA) (VOUT = 0.8 V and VIN = 1.8 V) Figure 26. Load Transient Response (1 mA to 800 mA) (VOUT = 0.8 V and VIN = 1.8 V) www.onsemi.com 9 CAT6243 PIN FUNCTIONS VIN 100 pF to 470 pF. Values larger than this will provide no additional improvement and will further extend CAT6243’s startup time. A bypass capacitor is not required for operation and BYP may be left open or floating if no capacitor is used but DO NOT ground BYP as this will interfere with the error amplifier’s functioning. Positive Power Input. Power is supplied to the device through the VIN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general it is advisable to include a small bypass capacitor adjacent to the regulator. In battery−powered circuits this is particularly important because the output impedance of a battery rises with frequency, so a bypass capacitor in the range of 1 mF to 10 mF is recommended. ADJ ADJ = Adjust and is the voltage control input. ADJ connects to the center point of a resistor divider which determines the CAT6243’s output voltage. See Applications Section for resistor selection guidelines. GND Ground. The negative voltage of the input power source. The center pad on the back of the package is also electrically ground. This pad is used for cooling the device by making connection to the buried ground plane through solder filled vias or by contact with a topside copper surface exposed to free flowing air. VOUT VOUT is the regulator’s output and supplies power to the load. VOUT can be shut off via the ENABLE input. All CAT6243 members are designed to block reverse current, meaning anytime VOUT becomes greater than VIN the pass FET will be shut off so there is no reverse current flow from output to input. CAT6243 is also equipped with an output discharge transistor that is turned ON anytime ENABLE is at a logic Low. This transistor ensures VOUT discharges to 0 V when the regulator is shutdown. This is especially important when powering digital circuitry because if VOUT fails to reach 0 V their POR (power−ON reset) circuitry may not trigger and scrambled data or unpredictable operations may result. A minimum output capacitor of 2.2 mF should be placed between VOUT and GND to insure stable operation. Increasing the size of COUT, up to 22 mF, will improve transient response to large changes in load current. ENABLE ENABLE is an active high logic input which controls the regulator’s the output state. If ENABLE < 0.4 V the regulator is shutdown and VOUT = 0 V. If ENABLE > 1.6 V the regulator is active and supplying power to the load. If the regulator is intended to operate continuously and won’t be shut down from time to time ENABLE should be tied to VIN. BYP The Bypass Capacitor input is used to decrease output voltage noise by placing a capacitor between BYP and ground. The recommended range of capacitance is from www.onsemi.com 10 CAT6243 APPLICATIONS INFORMATION Input Decoupling (CIN) VIN A ceramic or tantalum 1 mF capacitor is recommended and should be connected close to the CAT6243’s package. Higher capacitance and lower ESR will improve the overall line and load transient response. VOUT ENABLE CIN BYP CBYP The minimum output decoupling value is 2.2 mF and can be augmented to fulfill stringent load transient requirements. The regulator works with ceramic chip capacitors. Larger values, up to 22 mF, improve noise rejection and load regulation transient response. The CAT6243 is a highly stable regulator and performs well over a wide range capacitor Equivalent Series Resistances (ESR). As power in the CAT6243 increases, it may become necessary to provide thermal relief. The maximum power dissipation supported by this device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the CAT6243 has good thermal conductivity through the PCB, the junction temperature will be relatively low even with high power applications. The maximum dissipation the CAT6243 can handle is given by: P D(MAX) + The output voltage can be adjusted from 0.8 V to 5.0 V using resistors between the output and the ADJ input. The output voltage and resistors are chosen using Equation 1 and Equation 2. 0.8 V I DIV ǒ R1 ^ R2 Ǔ V OUT *1 0.8 V R 1Ǔ ƪTJ(MAX) * TAƫ R qJA (eq. 4) Since TJ is not recommended to exceed 125°C, then with CAT6243 soldered to 645 mm2 (1 sq inch), 1 oz copper area, FR4 PCB material can dissipate in excess of 1 W when the ambient temperature (TA) is 25°C. Note that this assumes the pad in the center of the package is soldered to the dissipating copper foil. See Figure below for RqJA versus PCB area for heat dissipating areas smaller than 645 mm2. Power dissipation can be calculated from the following equations: (eq. 1) (eq. 2) Ǔ R2 Thermal Considerations Output Voltage Adjust R2 ^ GND Input bias current, IADJ, for all practical designs can be ignored (IADJ = 0). Considering that the lowest recommended IOUT value is 100 mA, then, when there is no load on VOUT, IDIV must be 100 mA to keep CAT6243 in regulation. This then sets R2’s value using Equation 2 to 8 KW, which minimizes output noise. Use Equation 3 to find the required value for R1. If needed, lower values for IDIV can be considered, but not lower than 10 mA. The price will be worse values for both load regulation and TCOUT. The CAT6243 adjustable regulator will operate properly under conditions where the only load current is through the resistor divider that sets the output voltage. However, in the case where the CAT6243 is configured to provide a 0.8 V output, there is no resistor divider and the ADJ pin is connected to VOUT. If the part is enabled under no−load conditions, leakage current through the pass transistor at junction temperatures above 85°C can approach several microamperes, especially as junction temperature approaches 150°C. If this leakage current is not directed into a load, the output voltage will rise above nominal until a load is applied. For this reason it is recommended that a minimum load of 100 mA be present at all times. Normally the voltage setting resistor divider will serve this function but if no divider is used (VOUT = 0.8 V) then an external load of 8 KW should be provided. R1 ) ǒI ADJ R2 COUT ADJ Figure 27. Adjustable Output Resistor Divider No−Load Regulation Considerations ǒ R1 CAT6243 Output Decoupling (COUT) V OUT + 0.8 1 ) VOUT VIN P D [ V IN(I GND ) I OUT) ) I OUT(V IN * V OUT) (eq. 5) (eq. 3) or V IN(MAX) [ www.onsemi.com 11 P D(MAX) ) (V OUT I OUT ) I GND I OUT) (eq. 6) CAT6243 300 1 oz C.F 250 Theta JA (°C/W) 2 oz C.F 1 oz Sim 200 2 oz Sim 150 100 50 0 0 25 50 75 100 125 150 175 200 225 250 275 300 650 Copper heat spreading area (mm2) Figure 28. Thermal Resistance vs. PCB Copper Area for 3 mm x 3 mm WDFN Package PCB Layout Top Layer and connections to heat spreading plane Close−up of pad area Figure 29. Topside Copper Foil Pattern for Heat Dissipation Design Hints VIN and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high due to narrow trace width or long length, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the input and output capacitors, as close as possible to the CAT6243, and keep traces between power source and load as short as possible. www.onsemi.com 12 CAT6243 PACKAGE DIMENSIONS WDFN6 3x3, 0.95P CASE 511AP ISSUE O A D B ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ L1 PIN 1 REFERENCE 2X 0.15 C 2X 0.15 C 0.10 C DETAIL A E ALTERNATE TERMINAL CONSTRUCTIONS ÇÇ ÇÇ ÉÉ EXPOSED Cu TOP VIEW DETAIL B MOLD CMPD ÉÉÉ ÉÉÉ ÇÇÇ A3 A1 DETAIL B ALTERNATE CONSTRUCTIONS A 7X 0.08 C (A3) SIDE VIEW DETAIL A 6X NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMESNION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L A1 C DIM A A1 A3 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.35 0.45 3.00 BSC 2.40 2.60 3.00 BSC 1.50 1.70 0.95 BSC 0.20 −−− 0.30 0.50 −−− 0.15 SEATING PLANE D2 L e 1 4X 3 SOLDERING FOOTPRINT* 6X E2 6X K 6 2.60 PKG OUTLINE 0.63 4 6X BOTTOM VIEW b 0.10 C A B 0.05 C 1.70 3.30 NOTE 3 1 0.95 PITCH 6X 0.45 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 13 CAT6243 PACKAGE DIMENSIONS DPAK−5 (TO−252, 5 LEAD) CASE 369AE ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. THERMAL PAD CONTOUR OPTIONAL, WITHIN DIMENSIONS SHOWN. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A E b2 A B c2 D1 D H DETAIL A 1 2 3 4 E1 5 DIM A A1 b b2 c c2 D D1 E E1 e H L L1 L2 c e SIDE VIEW b TOP VIEW 0.12 M BOTTOM VIEW C A B H C A1 L2 GUAGE PLANE 5.04 REF 2.74 REF 0.10 C L MILLIMETERS MIN MAX 2.10 2.50 0.00 0.13 0.40 0.60 5.14 5.54 0.40 0.60 0.40 0.60 5.40 6.30 4.80 5.10 6.35 6.80 4.75 5.05 1.27 BSC 9.50 10.20 1.39 1.78 2.50 2.90 0.51 BSC L1 DETAIL A BOTTOM VIEW ALTERNATE CONSTRUCTION RECOMMENDED SOLDERING FOOTPRINT* 5.70 6.00 10.50 5X 2.10 5X 1.27 PITCH 0.80 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 14 CAT6243 Table 6. ORDERING INFORMATION (Notes 8 − 11) Output Voltage Package Shipping CAT6243−ADJMT5T3 Adjustable WDFN−6, 3 mm x 3 mm (Pb−Free) 3,000 / Tape & Reel CAT6243DCADJ−RKG Adjustable DPAK 5 5−Lead (Pb−Free) 2,500 / Tape & Reel Device 8. The standard lead finish is Matte−Tin. 9. For additional package and temperature options, contact your nearest ON Semiconductor Sales office. 10. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 11. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device Nomenclature document, TND310/D, available at www.onsemi.com ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 15 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative CAT6243/D