EtronTech EM562166 - Etron Technology, Inc.

EtronTech
EM562166
128K x 16 Low Power SRAM
Rev 1.5
04/2007
48-Ball BGA (CSP), Top View
Features
• Single power supply voltage of 2.7V to 3.6V
• Power down features using CE
• Low operating current : 30mA(max for 55 ns)
• Maximum Standby current : 35µA at 3.6 V
• Data retention supply voltage: 1.5V to 3.6V
• Direct TTL compatibility for all input and output
• Wide operating temperature range: -40°C to 85°C
• Package type:
48-ball TFBGA, 6x8mm
44L pin TSOP II
Ordering Information
Part Number
Speed
IDDS2 Package
EM562166BC-55
55 ns
35 µA
6x8 BGA
EM562166BC-55G
55 ns
35 µA
6x8 BGA
Green
EM562166TS-55
55 ns
35 µA
44pin TSOP II
EM562166BC-70
70 ns
35 µA
6x8 BGA
EM562166BC-70G
70 ns
35 µA
6x8 BGA
Green
EM562166TS-70
70 ns
35 µA
44pin TSOP II
Pin Description
Symbol
Function
A0 - A16
Address Inputs
DQ0 – DQ15
Data Inputs / Outputs
CE
Chip Enable Inputs
OE#
Output Enable
WE#
Read / Write Control Input
LB#, UB#
Data Byte Control Inputs
GND
Ground
VDD
Power Supply
NC
No Connection
44L TSOP II, Top View
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
Vcc
GND
DQ4
DQ5
DQ6
DQ7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
Pin Configuration
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
Vcc
DQ11
DQ10
DQ9
DQ8
NC
A08
A09
A10
A11
NC
EtronTech
EM562166
Overview
The EM562166 is a 2,097,152-bit SRAM organized as 131,072 words by 16 bits. It is designed with advanced
CMOS technology. This Device operates from a single 2.7V to 3.6V power supply. Advanced circuit technology
provides both high speed and low power. It is automatically placed in low-power mode when chip enable (CE#)
is asserted high. There are two control inputs. CE# is used to select the device and for data retention control,
and output enable (OE#) provides fast memory access. Data byte control pin (LB#,UB#) provides lower and
upper byte access. This device is well suited to various microprocessor system applications where high speed,
low power and battery backup are required. And, with a guaranteed operating range from -40°C to 85°C, the
EM562166 can be used in environments exhibiting extreme temperature conditions.
Etron Technology Inc.
1F, No. 1, Prosperity Rd. 1, Science-Based Industrial Park, Hsinchu, Taiwan, R.O.C
TEL: (886)-35-782345 FAX: (886)-35-778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
EtronTech
EM562166
Block Diagram
3
Rev 1.5
Apr. 2007
EtronTech
EM562166
Operating Mode
Mode
CE#
Read
L
Write
L
Output Deselect
OE# WE#
L
X
H
L
LB#
UB#
DQ0~DQ7
DQ8~DQ15
Power
L
L
DOUT
DOUT
Active
H
L
High-Z
DOUT
Active
L
H
DOUT
High-Z
Active
L
L
DIN
DIN
Active
H
L
High-Z
DIN
Active
L
H
DIN
High-Z
Active
High-Z
High-Z
Active
High-Z
High-Z
Standby
L
H
H
X
X
H
X
X
X
X
L
X
X
H
H
Standby
Note: X = don't care. H=logic high. L=logic low.
Absolute Maximum Ratings
Supply voltage, VDD
-0.3 to +4.6V
Input voltages, VIN
-0.3 to +4.6V
Input and output voltages, VI/O
-0.5 to VDD +0.5V
Operating temperature, TOPR
-40 to +85°C
Storage temperature, TSTRG
-55 to +150°C
Soldering Temperature (10s), TSOLDER
240°C(for Non Green Package)
260°C(for Green Package)
Power dissipation, PD
0.6 W
DC Recommended Operating Conditions (Ta= -40°C to 85°C)
Symbol
Parameter
Min
Typ
Max
VDD
Power Supply Voltage
2.7
−
3.6
VIH
VIL
Input High Voltage
2.2
Input Low Voltage
-0.3
VDR
Data Retention Supply Voltage
Note:
(1) Overshoot : VDD +2.0V in case of pulse width ≤ 20ns
(2) Undershoot : -2.0V in case of pulse width ≤ 20ns
4
(2)
1.5
−
VDD + 0.3
Unit
V
(1)
V
−
0.6
V
−
3.6
V
Rev 1.5
Apr. 2007
EtronTech
EM562166
DC Characteristics (Ta = -40°C to 85°C, VDD = 2.7V to 3.6V)
Parameter
Symbol
Input low current
Test Conditions
IIL
Min
IIN = 0V to VDD
Max Unit
-1
1
µA
Output low
voltage
VOL
IOL = 2.1 mA
-
0.4
V
Output high
voltage
VOH
IOH = -1.0 mA
2.2
−
V
55 ns
−
30
IDD1
VDD = 3.6 V ,
CE1# = VIL and
70 ns
−
25
−
4
−
35
Operating current
CE2 = VIH and
IOUT = 0mA
Other Input = VIH / VIL
IDD2
Standby current
Cycle time =
min
CE# ≥ VDD – 0.2V
IDDS2**
(Note)
Cycle time = 1µs
or LB# = UB# ≥ VDD – 0.2V
mA
µA
Capacitance (Ta = 25°C; f = 1 MHz)
Parameter
Input capacitance
Output capacitance
Symbol
Min
Typ
Max
Unit
CIN
−
−
10
pF
COUT
−
−
10
pF
Test Conditions
VIN = GND
VOUT = GND
Notes: This parameter is periodically sampled and is not 100% tested.
5
Rev 1.5
Apr. 2007
EtronTech
EM562166
AC Characteristics and Operating Conditions (Ta = -40°C to 85°C, VDD = 2.7V to 3.6V)
Read Cycle
EM562166
Symbol
-55
Parameter
-70
Unit
Min Max Min Max
tRC
Read cycle time
55
−
70
−
tAA
Address access time
−
55
−
70
tCO
Chip Enable (CE#) Access Time
−
55
−
70
tOE
Output enable access time
−
25
−
35
tBA
Data Byte Control Access Time
−
55
−
70
tLZ
Chip Enable Low to Output in Low-Z
10
−
10
−
tOLZ
Output enable Low to Output in Low-Z
3
−
3
−
tBLZ
Data Byte Control Low to Output in Low-Z
5
−
5
−
tHZ
Chip Enable High to Output in High-Z
−
20
−
25
tOHZ
Output Enable High to Output in High-Z
−
20
−
25
tBHZ
Data Byte Control High to Output in High-Z
−
20
−
25
tOH
Output Data Hold Time
0
−
0
−
ns
Write Cycle
EM562166
Symbol
-55
Parameter
-70
Unit
Min Max Min Max
tWC
Write cycle time
55
−
70
−
tWP
Write pulse width
40
−
55
−
tCW
Chip Enable to end of write
45
−
60
−
tBW
Data Byte Control to end of Write
45
−
60
−
tAS
Address setup time
0
−
0
−
tWR
Write Recovery time
0
−
0
−
tWHZ
WE# Low to Output in High-Z
−
25
−
30
tOW
WE# High to Output in Low-Z
5
−
5
−
tDS
Data Setup Time
25
−
30
−
tDH
Data Hold Time
0
−
0
−
ns
AC Test Condition
• Output load : 50pF + one TTL gate
• Input pulse level : 0.4V, 2.4V
• Timing measurements : 0.5 x VDD
• tR, tF : 5ns
6
Rev 1.5
Apr. 2007
EtronTech
EM562166
Read Cycle
(See Note 1)
7
Rev 1.5
Apr. 2007
EtronTech
EM562166
Write Cycle1
(WE# Controlled)(See Note 4)
8
Rev 1.5
Apr. 2007
EtronTech
EM562166
Write Cycle 2
(CE# Controlled)(See Note 4)
9
Rev 1.5
Apr. 2007
EtronTech
EM562166
Write Cycle3
(UB#, LB# Controlled)(See Note 4)
Note:
1.
2.
3.
4.
5.
WE# remains HIGH for the read cycle.
If CE# goes LOW with or after WE# goes LOW, the outputs will remain at high impedance.
If CE# goes HIGH coincident with or before WE# goes HIGH, the outputs will remain at high impedance.
If OE# is HIGH during the write cycle, the outputs will remain at high impedance.
Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be
applied.
10
Rev 1.5
Apr. 2007
EtronTech
EM562166
Data Retention Characteristics (Ta = -40°C to 85°C)
Symbol
Parameter
VDR
Data Retention Supply
Voltage
IDR
Data Retention Current
CE1# ≥ VDD - 0.2V, CE2 ≤ 0.2V,
VIN ≥ VDD - 0.2V or VIN ≤ 0.2V
VDD = 1.5V, CE# ≥ VDD - 0.2V,
VIN ≥ VDD - 0.2V or VIN ≤ 0.2V
tSDR
Chip Deselect to Data Retention Mode Time
tRDR
Recovery Time
Min
Typ
Max
Unit
1.5
−
3.6
V
−
-
35
µA
0
−
−
ns
tRC
−
−
ns
CE# Controlled Data Retention Mode
Note:
1. CE ≥ VDD – 0.2V or UB# = LB# ≥ VDD – 0.2V
11
Rev 1.5
Apr. 2007
EtronTech
EM562166
Package Diagrams
48-Ball (6mm x 8mm) BGA
Units in mm
12
Rev 1.5
Apr. 2007
EtronTech
EM562166
HE
E
Package Diagrams
44L 400 mil TSOP II
D
S
y
F
θ
L1
Symbol
D
A
A1
A2
b
e
C
D
E
HE
L
L1
F
θ
S
y
Min
Dimension in mm
Nom
Max
--0.05
0.90
0.22
--0.095
18.28
10.03
11.56
0.40
--0°
---
----1.0
--0.80
0.125
18.41
10.16
11.76
--0.8 BASIC
0.25
--0.805 REF
---
Min
Dimension in inch
Nom
Max
1.2
0.2
1.1
0.45
--0.21
18.54
10.29
11.96
0.75
--0.002
0.035
0.009
--0.004
0.720
0.395
0.455
0.016
--10°
--0°
0.10
---
13
----0.039
--0.031
0.005
0.725
0.400
0.463
--0.032 BASIC
0.01
--0.003 REF
---
DETAIL A
0.047
0.008
0.043
0.018
--0.008
0.730
0.405
0.471
0.03
--10°
0.004
Rev 1.5
Apr. 2007