HU1136 3A, High Efficiency LDS Module GENERAL DESCRIPTION: FEATURES: The LDS module is non-isolated dc-dc converters that can deliver up to 3A of output current. The PWM switching regulator, high frequency power inductor are integrated in one hybrid package. It only need input/output capacitors and one voltage dividing resistor. High Density LDS Module 3A Output Current 95% Peak Efficiency at 5VIN Input Voltage Range from 2.7V to 5.5V Adjustable Output Voltage Enable / PGOOD Function Automatic Power Saving/PWM Mode Protections (UVLO, OCP: Non-latching) Internal Soft Start Compact Size: 3.0mm*3.7mm*1.2mm Pb-free for RoHS compliant MSL 2, 260C Reflow The module has automatic operation with PWM mode and power saving mode according to loading. Other features include remote enable function, internal soft-start, non-latching over current protection, power good, and input under voltage locked-out capability. The low profile and compact size package (3.0mm × 3.7mm x 1.2mm) is suitable for automated assembly by standard surface mount equipment. The LDS module is Pb-free and RoHS compliance. APPLICATIONS: Single Li-Ion Battery-Powered Equipment LDOs Replacement Cell Phones / PDAs / Palmtops TYPICAL APPLICATION CIRCUIT & PACKAGE: 1.2mm 3.7mm 3.0mm FIGURE.1 TYPICAL APPLICATION CIRCUIT FIGURE.2 HIGH DENSITY LOW PROFILE LDS MODULE 1 HU1136 3A, High Efficiency LDS Module ELECTRICAL SPECIFICATIONS: CAUTION: Do not operate at or near absolute maximum rating listed for extended periods of time. This stress may adversely impact product reliability and result in failures not covered by warranty. Parameter Min. Typ. Max. Unit VIN to GND - - +6.0 V VOUT to GND - - +6.0 V VIN+0.3 V Absolute Maximum Ratings SW to GND Note 1 EN to GND Note 1 - - +6.0 V Tc Case Temperature of Inductor - - +110 °C Tj Junction Temperature -40 - +150 °C Tstg Storage Temperature -40 - +125 °C Human Body Model (HBM) - - 2k V Machine Model (MM) - - 200 V Charge Device Model (CDM) - - 500 V Input Supply Voltage +2.7 - +5.5 V Adjusted Output Voltage 0.6 +3.3 V Ambient Temperature -40 +85 °C ESD Rating Description Recommendation Operating Ratings VIN VOUT Ta NOTES: 1. Parameters guaranteed and tested by power IC vendor. 2 - HU1136 3A, High Efficiency LDS Module ELECTRICAL SPECIFICATIONS: (Cont.) Conditions: TA = 25 ºC, Vin = 3.3V, Vout = 1.8V, Cin=22uF/X5R/6.3V , Cout=47uF/X5R/6.3V, unless otherwise specified. Symbol Conditions Min. Typ. Max. Unit Input Characteristics ISD(IN) Input shutdown current Vin = 3.3V, EN = GND - 50 - uA IQ(IN) Input supply bias current Vin = 3.3V, Iout = 0A EN = VIN Vout = 1.8V - 120 - uA Vin = 3.3V, EN = VIN - - - - - 3.2 - mA - 0.91 - A - 2 - A 0 - 3 A -3.0 - +3.0 % VO(SET) - 0.1 - % VO(SET) - 0.5 - % VO(SET) - - - - IOUT = 5mA, - 50 - mVp-p IOUT = 3.0A, - 15 - mVp-p Iout = 3.0A, ESR≧1 m - - 150 uF IS(IN) Parameter Input supply current Iout = 5mA Vout = 1.8V Iout = 1.5A Vout = 1.8V Iout = 3.0A Vout = 1.8V Output Characteristics IOUT(DC) Output continuous current range VO(SET) Ouput Voltage Set Point ΔVOUT /ΔVIN ΔVOUT /ΔIOUT Line regulation accuracy Load regulation accuracy VOUT(AC) COUT(MAX) Output ripple voltage Maximum capacitive load Vin=3.3V, Vout=1.8V With 0.5% tolerance for external resistor used to set output voltage Vin = 3.3V to 5V Vout = 1.8V, Iout = 3.0A Iout = 0A to 3.0A Vin = 3.3V, Vout = 1.8V Vin = 3.3V, Vout = 1.8V EN = VIN 3 HU1136 3A, High Efficiency LDS Module ELECTRICAL SPECIFICATIONS: (Cont.) Conditions: TA = 25 ºC, Vin = 3.3V, Vout = 1.8V, Cin=22uF/X5R/6.3V , Cout=47uF/X5R/6.3V, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit VEN_TH rising 1.2 - - V VEN_TH falling - - 0.4 V 0.9 1.2 1.6 MHz -2.0% 0.600 +2.0% V/% - +10% - % - -10% - % 0.4 V Control Characteristics VEN_TH FOSC VREF Enable upper threshold voltage Enable lower threshold voltage Oscillator frequency Note 1, PWM Operation Note 1 Referance voltage Upper trip, VREF respect to the VPGOOD_TH PGOOD threshold voltage regulation, Note 1 Lower trip, VREF respect to the regulation, Note 1 VPGOOD_L VPGOOD_H PGOOD sink current capability PGOOD logic high voltage Sink 1mA VIN=3.3V, VFB=0.6V 3.2 V Fault Protection ILIMIT_TH TOTP Current limit threshold Peak value of inductor current, Note 1 Over temperature protection Note 1 4 4.2 4.8 - A - 150 - °C HU1136 3A, High Efficiency LDS Module PIN CONFIGURATION: (14) SW VIN (1) (13) GND VIN (2) (12) GND PGOOD (3) (11) GND EN (4) (10) GND FB (5) (9) VOUT AGND (6) (8) VOUT (7) VOUT TOP VIEW PIN DESCRIPTION: Symbol Pin No. VIN 1, 2 Description Power input pin. It needs to connect input rail. PGOOD 3 Power Good indicator. The pin output is an open drain that connects to VIN by an internal pull-up resistor. PG is pulled up to VIN when the FB voltage is within 10% of the regulation level. If FB voltage is out of that regulation range, it is LOW. EN 4 On/Off control pin for module. EN = LOW, the module is off. EN = HIGH, the module is on. FB 5 Feedback input. Connect an external resistor divider from the output to GND to set the output voltage. AGND 6 Analog ground. VOUT 7, 8, 9 GND 10, 11, 12, 13 SW 14 Power output pin. Connect to output for the load. Power ground pin for signal, input, and output return path. This pin needs to connect one or more ground plane directly. Switch output 5 HU1136 3A, High Efficiency LDS Module TYPICAL PERFORMANCE CHARACTERISTICS: (1.0VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 76.2mm×76.2mm×1.6mm, 4 layers. The output ripple and transient response measurement is short loop probing and 20MegHz bandwidth limited. The following figures provide the typical characteristic curves at 1.0Vout. 100 95 EFFICIENCY (%) 90 85 80 75 70 3.3VIN 3.6VIN 65 60 4.2VIN 55 5.0VIN 50 1 10 100 1000 3000 LOAD CURRENT (mA) FIG.3 EFFICIENCY V.S. LOAD CURRENT FIG.4 DE-RATING CURVE VOUT VOUT FIG.5 OUTPUT RIPPLE (5VIN, IOUT=0A) FIG.6 OUTPUT RIPPLE (5VIN, IOUT=3A) VOUT EN VOUT FIG.7 TRANSIENT RESPONSE (5VIN, 0% to 100% LOAD STEP) FIG.8 TURN-ON (5VIN, IOUT=3A) 6 HU1136 3A, High Efficiency LDS Module TYPICAL PERFORMANCE CHARACTERISTICS: (1.2VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 76.2mm×76.2mm×1.6mm, 4 layers. The output ripple and transient response measurement is short loop probing and 20MegHz bandwidth limited. The following figures provide the typical characteristic curves at 1.2Vout. 100 95 EFFICIENCY (%) 90 85 80 75 70 3.3VIN 3.6VIN 65 60 4.2VIN 55 5.0VIN 50 1 10 100 1000 3000 LOAD CURRENT (mA) FIG.9 EFFICIENCY V.S. LOAD CURRENT FIG.10 DE-RATING CURVE VOUT VOUT FIG.11 OUTPUT RIPPLE (5VIN, IOUT=0A) FIG.12 OUTPUT RIPPLE (5VIN, IOUT=3A) EN VOUT VOUT FIG.13 TRANSIENT RESPONSE (5VIN, 0% to 100% LOAD STEP) FIG.14 TURN-ON (5VIN, IOUT=3A) 7 HU1136 3A, High Efficiency LDS Module TYPICAL PERFORMANCE CHARACTERISTICS: (1.8VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 76.2mm×76.2mm×1.6mm, 4 layers. The output ripple and transient response measurement is short loop probing and 20MegHz bandwidth limited. The following figures provide the typical characteristic curves at 1.8Vout. 100 95 EFFICIENCY (%) 90 85 80 75 70 3.3VIN 3.6VIN 4.2VIN 5.0VIN 65 60 55 50 1 10 100 1000 3000 LOAD CURRENT (mA) FIG.15 EFFICIENCY V.S. LOAD CURRENT FIG.16 DE-RATING CURVE VOUT VOUT FIG.17 OUTPUT RIPPLE (5VIN, IOUT=0A) FIG.18 OUTPUT RIPPLE (5VIN, IOUT=3A) VOUT EN VOUT FIG.19 TRANSIENT RESPONSE (5VIN, 0% to 100% LOAD STEP) FIG.20 TURN-ON (5VIN, IOUT=3A) 8 HU1136 3A, High Efficiency LDS Module TYPICAL PERFORMANCE CHARACTERISTICS: (2.5VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 76.2mm×76.2mm×1.6mm, 4 layers. The output ripple and transient response measurement is short loop probing and 20MegHz bandwidth limited. The following figures provide the typical characteristic curves at 2.5Vout. 100 95 EFFICIENCY (%) 90 85 80 75 70 65 3.6VIN 4.2VIN 5.0VIN 60 55 50 1 10 100 1000 3000 LOAD CURRENT (mA) FIG.21 EFFICIENCY V.S. LOAD CURRENT FIG.22 DE-RATING CURVE VOUT VOUT FIG.23 OUTPUT RIPPLE (5VIN, IOUT=0A) FIG.24 OUTPUT RIPPLE (5VIN, IOUT=3A) EN VOUT VOUT FIG.25 TRANSIENT RESPONSE (5VIN, 0% to 100% LOAD STEP) FIG.26 TURN-ON (5VIN, IOUT=3A) 9 HU1136 3A, High Efficiency LDS Module TYPICAL PERFORMANCE CHARACTERISTICS: (3.3VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 76.2mm×76.2mm×1.6mm, 4 layers. The output ripple and transient response measurement is short loop probing and 20MegHz bandwidth limited. The following figures provide the typical characteristic curves at 3.3Vout. 100 95 EFFICIENCY (%) 90 85 80 75 70 65 60 4.5VIN 55 5.0VIN 50 1 10 100 1000 3000 LOAD CURRENT (mA) FIG.27 EFFICIENCY V.S. LOAD CURRENT FIG.28 DE-RATING CURVE VOUT VOUT FIG.29 OUTPUT RIPPLE (5VIN, IOUT=0A) FIG.30 OUTPUT RIPPLE (5VIN, IOUT=3A) EN VOUT VOUT FIG.31 TRANSIENT RESPONSE (5VIN, 0% to 100% LOAD STEP) FIG.32 TURN-ON (5VIN, IOUT=3A) 10 HU1136 3A, High Efficiency LDS Module APPLICATIONS INFORMATION: REFERENCE CIRCUIT FOR GENERAL APPLICATION: The Figure 33 shows the module application schematics for input voltage +5V or +3.3V and turn on by input voltage directly through enable resistor (REN). FIG.33 REFERENCE CIRCUIT FOR GENERAL APPLICATION 11 HU1136 3A, High Efficiency LDS Module APPLICATIONS INFORMATION: (Cont.) SAFETY CONSIDERATIONS: Certain applications and/or safety agencies may require fuses at the inputs of power conversion components. Fuses should also be used when there is the possibility of sustained input voltage reversal which is not current limited. For greatest safety, we recommend a fast blow fuse installed in the ungrounded input supply line. The installer must observe all relevant safety standards and regulations. For safety agency approvals, install the converter in compliance with the end-user safety standard. INPUT FILTERING: The module should be connected to a low AC impedance source supply and a highly inductive source or line inductance can affect the stability of the module. An input capacitor must be placed directly to the input pin of the module, to minimize input ripple voltage and ensure module stability. OUTPUT FILTERING: To reduce output ripple and improve the dynamic response to as step load change, the additional capacitor at the output must be used. Low ESR polymer and ceramic capacitors are recommended to improve the output ripple and dynamic response of the module. PROGRAMMING OUTPUT VOLTAGE: The module has an internal 0.6V±2% reference voltage. The output voltage can be programed by the dividing resistance RFB which respects to FB pin and GND pin. The output voltage can be calculated as shown in Equation 1 and the resistor according to typical output voltage is shown in TABLE 1. RFB_top VOUT (V) 0.6 1 RFB_bot (EQ.1) Vout (V) RFB_top (k) RFB_bot (k) 1.0 200(1%) 300(1%) 1.2 200(1%) 200(1%) 1.8 200(1%) 100(1%) 2.5 200(1%) 63.2(1%) 3.3 200(1%) 44.2(1%) TABLE.01 Resistor values for common output voltages 12 HU1136 3A, High Efficiency LDS Module APPLICATIONS INFORMATION: (Cont.) RECOMMENDATION LAYOUT GUIDE: In order to achieve stable, low losses, less noise or spike, and good thermal performance some layout considerations are necessary. The recommendation layout is shown as Figure 34. 1. The ground connection between pin 10 and 13 should be a solid ground plane under the module. It can be connected to one or more ground plane by using several Vias. 2. Keep the RFB_top and RFB_bot connection trace to the module pin 5 (FB) short. 3. Use large copper area for power path (VIN, VOUT, and GND) to minimize the conduction loss and enhance heat transferring. Also, use multiple Vias to connect power planes in different layers. FIG.34 RECOMMENDATION LAYOUT (TOP LAYER) 13 HU1136 3A, High Efficiency LDS Module APPLICATIONS INFORMATION: (Cont.) Thermal Considerations: All thermal testing condition is complied with JEDEC EIJ/JESD 51 Standards. Therefore, the test board size is 76.2mm×76.2mm×1.6mm with 4 layers. The case temperature of module sensing point is shown as Figure 35. Then Rth(jchoke-a) is measured with the component mounted on an effective thermal conductivity test board on 0 LFM condition. The HU1136 power module is designed for using when the case temperature is below 110°C regardless the change of output current, input/output voltage or ambient temperature. Figure 35. Case Temperature Sensing Point 14 HU1136 3A, High Efficiency LDS Module REFLOW PARAMETERS: Lead-free soldering process is a standard of making electronic products. Many solder alloys like Sn/Ag, Sn/Ag/Cu, Sn/Ag/Bi and so on are used extensively to replace traditional Sn/Pb alloy. Here the Sn/Ag/Cu alloy (SAC) are recommended for process. In the SAC alloy series, SAC305 is a very popular solder alloy which contains 3% Ag and 0.5% Cu. It is easy to get it. Figure 9 shows an example of reflow profile diagram. Typically, the profile has three stages. During the initial stage from 70°C to 90°C, the ramp rate of temperature should be not more than 1.5°C/sec. The soak zone then occurs from 100°C to 180°C and should last for 90 to 120 seconds. Finally the temperature rises to 230°C to 245°C and cover 220°C in 30 seconds to melt the solder. It is noted that the time of peak temperature should depend on the mass of the PCB board. The reflow profile is usually supported by the solder vendor and user could switch to optimize the profile according to various solder type and various manufactures’ formula. FIG.36 Recommendation Reflow Profile 15 HU1136 3A, High Efficiency LDS Module PACKAGE OUTLINE DRAWING: Unit: mm 16 HU1136 3A, High Efficiency LDS Module LAND PATTERN REFERENCE: Unit: mm 17 HU1136 3A, High Efficiency LDS Module PACKING REFERENCE: Unit: mm Package In Tape Loading Orientation PIN 1 Tape Dimension A0 3.3 0.10 E1 1.75 0.10 B0 4.0 0.10 K0 1.65 0.10 F 5.50 0.05 P0 8.00 0.10 W 12.0 0.30 P1 2.00 0.05 D0 φ1.5 +0.10/-0.00 P2 4.00 0.10 D1 φ1.50 0.10 t 0.25 0.1 18 HU1136 3A, High Efficiency LDS Module PACKING REFERENCE: (Cont.) Unit: mm Reel Dimension See Detail A Detail A Peel Strength of Top Cover Tape The peel speed shall be about 300mm/min. The peel force of top cover tape shall be between 0.1N to 1.3N 19 HU1136 3A, High Efficiency LDS Module REVERSION HISTORY: Date Revision 2013.12.06 00 Changes Release the preliminary specification. Thermal de-rating updated. 2014.01.08 01 Thermal resistance Rth(j-a) updated. Packing reference revised. 2014.11.11 02 Release new part number. 2014.12.22 03 Update land pattern and reference layout. 2014.12.31 04 Change uPOL module to LDS module. 2015.05.20 05 Update package outline drawing data. 2015.06.24 06 Add REFLOW PARAMETERS 20