Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV 12-bit, serial IN, parallel OUT driver BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV The BU2090, BU2090F, BU2090FS, BU2092, BU2092F, and BU2092FV are 12-bit serial input, parallel output drivers. For the BU2090 / F / FS, data input is shifted to the 12-bit internal shift register on the rising edge of a clock pulse. On the falling edge of the pulse, if the DATA pin is HIGH, the data in the shift register is output in parallel to Q0 to Q11. For the BU2092 / F / FV, shift data read at the rising edge of CLOCK is output in parallel to Q0 to Q11 at the rising edge of LCK. These ICs also have an OE pin, which when HIGH, forces data to be output, regardless of the shift data state. Applications •Radio cassette players, telephones, compact audio systems, car stereos, and others •1)Features Low power dissipation. 2) Operating voltages ranging from 2.7 to 5.5V. 3) Output is Nch open drain. 4) High output withstand voltage of + 25V. 5) Diverse variety of packages. BU2090 / F / FS: DIP16, SOP16, SSOP-A16 BU2092 / F / FV: DIP18, SOP18, SSOP-A18 (plastic molds) 6) High drive capability; direct lighting of green LED possible. 1 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs maximum ratings (Ta = 25°C) •Absolute (BU2090 / F / FS, BU2092 / F / FV) Parameter Symbol Power supply voltage Power dissipation Power dissipation VDD BU2090 / F / FS Pd BU2092 / F / FV BU2090 / F / FS Limits Unit – 0.3 ~ + 7.0 V 1000 (DIP), 300 (SOP), 500 (SSOP)∗1 1050 (DIP), 450 (SOP), 400 (SSOP)∗1 500 (SOP)∗2, 650 (SSOP)∗3 Pd 500 (SOP)∗2, 650 (SSOP)∗4 mW Operating temperature Topr – 25 ~ + 75 °C Storage temperature Tstg – 55 ~ + 125 °C Input voltage VIN VSS – 0.3 ~ VDD + 0.3 V Output voltage VO VSS ~ 25.0 V BU2092 / F / FV ∗1 Unmounted ∗2 When mounted on a glass epoxy board of 50mm × 50mm × 1.6mm ∗3 When mounted on a glass epoxy board of 90mm × 50mm × 1.6mm ∗4 When mounted on a glass epoxy board of 70mm × 70mm × 1.6mm •Recommended operating conditions Parameter Power supply voltage 2 mW Symbol Limits Unit VDD 2.7 ~ 5.5 V BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs •Block diagram BU2090 / F / FS BU2092 / F VSS 1 VSS 1 DATA 2 CLOCK 3 Control circuit 12-bit shift register 16 VDD Control circuit DATA 2 18 VDD 17 OE 12-bit shift register 15 Q11 CLOCK 3 14 Q10 Latch LCK 4 16 Q11 112-bit storage register 15 Q10 13 Q9 Q0 4 Q0 5 Output buffer (open drain) Q1 5 12 Q8 Q2 6 11 Q7 Q3 7 10 Q6 Q4 8 9 Q5 Output buffer (open drain) 14 Q9 Q1 6 13 Q8 Q2 7 12 Q7 Q3 8 11 Q6 Q4 9 10 Q5 BU2092FV VSS 1 Control circuit DATA 2 20 VDD 19 OE 12-bit shift register 18 Q11 CLOCK 3 LCK 4 Q0 5 12-bit storage register Output buffer (open drain) 17 Q10 16 Q9 Q1 6 15 Q8 Q2 7 14 Q7 Q3 8 13 N.C. Q4 9 12 N.C. Q5 10 11 Q6 3 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs •Pin descriptions Pin No. BU2090 / F / FS 4 BU2092 / F BU2092 / FV Pin name 1 1 1 VSS 2 2 2 DATA Function GND Serial data input 3 3 3 CLOCK Data shift clock input — 4 4 LCK Data latch clock input 4 5 5 Q0 Parallel data output 5 6 6 Q1 Parallel data output 6 7 7 Q2 Parallel data output 7 8 8 Q3 Parallel data output 8 9 9 Q4 Parallel data output 9 10 10 Q5 Parallel data output 10 11 11 Q6 Parallel data output — — 12 N.C. Not connected Not connected — — 13 N.C. 11 12 14 Q7 Parallel data output 12 13 15 Q8 Parallel data output 13 14 16 Q9 Parallel data output 14 15 17 Q10 Parallel data output 15 16 18 Q11 Parallel data output — 17 19 OE Output Enable 16 18 20 VDD Power supply BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs characteristics (Ta = 25°C) •Electrical DC characteristics (unless otherwise noted, Ta = 25°C, V Parameter Symbol Input high level voltage VIH Input low level voltage VIL Output low level voltage SS = 0V) Min. Typ. Max. 3.5 — — 2.5 — — — — 1.5 VOL — — 0.4 — — 2.0 — — 1.0 Unit VDD Conditions 5 V — 3 5 V — 3 V 5 IOL = 20mA 3 IOL = 5mA "H" output disable current IOZH — — 10.0 µA 5 VO = 25.0V "L" output disable current IOZL — — – 5.0 µA 5 VO = 0V Current dissipation — — IDD 5.0 5 VIN = VSS or VDD — — 3.0 3 OUTPUT: OPEN µA BU2090 / F / FS switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V) Parameter Symbol Minimum clock pulse width tW Data shift setup time Min. Typ. Max. 500 — — 1000 — — 200 — — 300 — — 200 — — 400 — — 50 — — 100 — — 250 — — 500 — — 200 — — 400 — — 250 — — 500 — — tSU Data shift hold time tH Data latch setup time tLSUH Data latch hold time tLHH Data latch "L" setup time tLSUL Data latch "L" hold time tLHL Unit VDD Conditions 5 ns — 3 5 ns — 3 5 ns — 3 5 ns — 3 5 ns — 3 5 ns — 3 5 ns — 3 䊊Not designed for radiation resistance. BU2090 / F / FS switching characteristics measurement conditions tW 90% CLOCK tW 90% 10% tSU DATA 90% 10% tH tLSUL 10% 10% tLSUH tLHL 90% 90% 10% VDD 90% 10% GND (VSS) tLHH 90% VDD GND (VSS) Fig.1 5 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs BU2092 / F / FV switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V) Parameter Symbol tPLZ (LCK) Transmission delay time (LCK to OUTPUT QX) tPZL (LCK) tPLZ Output disable time (OE to OUTPUT QX) tPZL Minimum clock pulse width tW tW (LCK) Minimum latch pulse width Setup time (LCK to CLOCK) tS Setup time (DATA to CLOCK) tSU Hold time (CLOCK to DATA) tH Min. Typ. Max. — 55 — — 90 — — 50 — — 115 — — 45 — — 70 — — 35 — — 80 — 500 — — 1000 — — 500 — — 1000 — — 200 — — 400 — — 200 — — 400 — — 200 — — 400 — — Unit ns ns ns ns ns ns ns ns ns VDD 5 3 5 3 5 3 5 3 Conditions RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF RL = 5kΩ CL = 10pF 5 — 3 5 — 3 5 — 3 5 — 3 5 — 3 䊊 Not designed for radiation resistance. BU2092 / F / FV switching characteristics measurement conditions tW 90% CLOCK 10% 90% 10% tSU tW 90% 90% 10% VDD GND (VSS) tH VDD 90% 90% tS DATA GND (VSS) tW (LCK) 90% 50% 10% 50% LCK tPLZ (LCK) VDD 90% GND (VSS) VDD tPZL (LCK) 50% 50% OE GND (VSS) tPLZ Qx 10% 50% Fig.2 6 tPZL 10% 50% BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs table •Truth BU2092 / F / FV INPUT CLOCK DATA LCK OE FUNCTION × × × H Output (Q0 to Q11) disabled × × × L Output (Q0 to Q11) enabled L × × First cell of the shift register stores the LOW. Other cells, respectively, store data from the preceding cells or other prior data. (Output state is HOLD.) H × × First cell of the shift register stores the HIGH. Other cells, respectively, store data from the preceding cells or other prior data. (Storage state and output state are HOLD.) × × × No change in shift register. × × × Contents of shift register are stored in storage register. × × × No change in shift register. Q0 to Q11 output for the BU2090 / F / FS and BU2092 / F / FV is Nch open drain output. When the shift register transfer data is LOW, the corresponding output FET is ON (continuous state). When the transfer data is HIGH, the output FET is OFF (discontinuous). •Input / output circuit BU2090 / F / FS Pin No. BU2092 / F BU2092FV BU2090 / F / FS BU2092 / F BU2092FV 5, 6, 7, 8, 9, 5, 6, 7, 8, 9, 4, 5, 6, 7, 8, 9 Pin No. 2, 3, 4, 17 Pin No. 2, 3, 4, 19 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 14, 15 14, 15 14, 15, 16 16, 17, 18 2, 3 VDD GND (VSS) VDD GND (VSS) GND (VSS) 7 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs operation •TheCircuit logic of the DATA pin is sent to the 12-bit shift register on the rising edge of the CLOCK pulse. Subsequently, it is shifted from Q0 to Q11 for every clock rising edge. For the BU2090 / F / FS When the DATA pin is LOW on the CLOCK falling edge, the data does not change its output state. It is only shifted in the internal shift register. However, when the DATA pin is HIGH, the content of the 12-bit shift register is latched and is output to the corresponding Q0 to Q11. CLOCK DATA Q11 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note 1) indicates unstable output. Note 2) Pull-up resistance is connected to the output pin. Fig.3 Operation timing chart 8 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs For the BU2092 / F / FV The content of the 12-bit shift register is stored in the 12-bit storage register at the rising edge of LCK, and is output to the corresponding Q0 to Q11. When OE is HIGH, regardless of the content of the storage register, the output FET turns OFF and enters a HIGH (discontinuous) state. CLOCK DATA D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LCK OE Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note 1) indicates unstable output. Note 2) Pull-up resistance is connected to the output pin. Fig.4 Operation timing chart 9 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs Application example •BU2090 / F / FS VDD LED power supply CLOCK DATA GND (VSS) GND (VSS) Latch 12-bit shift register Output buffer (open drain) Control circuit Fig.5 BU2092 / F / (FV) VDD GND DATA (VSS) LED power supply GND (VSS) CLOCK OE 12-bit shift register Output buffer (open drain) 12-bit storage register Control circuit LCK Fig.6 10 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs •Electrical characteristic curves DIP18 (Unmounted) DIP16 (Unmounted) 1000 800 mounted on a 90mm × 50mm × 1.6mm SSOP16 (when glass epoxy board) 600 SSOP16 (Unmounted) SOP16 (when mounted on a 50mm × 50mm × 1.6mm glass epoxy board) 400 SOP16 (Unmounted) 200 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta (°C) Fig.7 BU2090 / F / FS thermal derating characteristics 800 SSOP-B20 (When mounted on a 70mm × 70mm × 1.6mm glass epoxy board) 600 SOP18 (when mounted on a 50mm × 50mm × 1.6mm glass epoxy board) SOP18 (Unmounted) 400 SSOP-B20 (Unmounted) 200 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta (°C) Fig.8 BU2092 / F / FV thermal derating characteristics OUTPUT CURRENT "LOW" LEVEL: IOL (mA) 1000 30 1200 POWER DISSIPATION: Pd (mW) POWER DISSIPATION: Pd (mW) 1200 25 VDD = 5V VDD = 3V 20 15 10 5 0 0.5 1.0 1.5 2.0 2.5 OUTPUT VOLTAGE "LOW" LEVEL: VOL (V) Fig.9 Output current vs.output low level voltage 11 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV Standard ICs •External dimensions (Units: mm) BU2090 BU2092 22.9 ± 0.3 19.4 ± 0.3 1 8 10 1 9 6.5 ± 0.3 9 0.51Min. 3.2 ± 0.2 4.25 ± 0.3 0.51Min. 6.5 ± 0.3 16 18 7.62 7.62 0.3 ± 0.1 0.3 ± 0.1 3.29 ± 0.2 0.5 ± 0.1 2.54 0° ~ 15° 0.5 ± 0.1 2.54 DIP16 DIP18 BU2090F BU2092F 11.2 ± 0.2 0.4 ± 0.1 0.3Min. 1 9 1.27 0.4 ± 0.1 0.15 ± 0.1 0.15 ± 0.1 1.5 ± 0.1 0.11 1.27 10 5.4 ± 0.2 8 1.8 ± 0.1 1 18 0.11 9 4.4 ± 0.2 16 7.8 ± 0.3 10.0 ± 0.2 6.2 ± 0.3 0° ~ 15° 0.3Min. 0.15 0.15 SOP16 SOP18 BU2090FS BU2092FV 0.8 0.3Min. 11 1 10 0.65 0.15 ± 0.1 0.15 ± 0.1 0.36 ± 0.1 20 4.4 ± 0.2 8 1.15 ± 0.1 1 0.1 9 6.4 ± 0.3 6.5 ± 0.2 16 4.4 ± 0.2 0.11 1.5 ± 0.1 6.2 ± 0.3 6.6 ± 0.2 0.22 ± 0.1 0.3Min. 0.1 0.15 SSOP-A16 12 SSOP-B20