General Information

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Vishay
Axial and Radial Leaded Multilayer
Ceramic Capacitors for Automotive Applications
Class 1 and Class 2, 50 VDC, 100 VDC and 200 VDC
DESIGNING
For more than 20 years Vishay Vitramon has supported the automotive industry with robust, highly reliable MLCC’s that have
made it a leader in this segment. All Vishay Vitramon MLCC’s are manufactured in “Precious Metal Technology” (PMT/NME)
with a wet build process. They are qualified according to AEC-Q200 with PPAP available on request.
These chip inserts are the basis of the automotive graded axial and radial series made from Vishay BCComponents. They
feature coppery steel wire lead terminations with 100 % tin plate matte finish. The epoxy coating provides mechanical strength
for assembly extended-life environmental protection.
CONSTRUCTION AND ORDERING INFORMATION
INTERNAL CONSTRUCTION
Multilayer ceramic capacitors consist of electrodes, the RoHS interleaved ceramic dielectric and the external terminal
connectors.
The capacitance is given by the description:
A * n * 0 * r 
C = ----------------------------------d
A = Electrode area
Termination
n = Number of active layers
d = Distance between electrodes
Electrodes
r = Dielectric relative
Dielectric
(Ceramic)
0 = Dielectric constant
Whilst the values “A * n” and “d” are respectively determined by the production process, the dielectric constant is a function of
the ceramic material used.
LEAD CONFIGURATION
Axial Size 15 and 20
Base material: FeCu
Plating: Electrolytic, tinned
Radial Size 15 and 20
Base material: FeCu
Plating: Matte electrolytic, tinned
ØD
Lb
52.4 ± 1.5
Revision: 26-Aug-13
Document Number: 45214
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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ORDERING CODE INFORMATION
K
104
K
15
X7R
F
5
3
H
5
V
1
234
5
67
8 9 10
11
12
13
14
15
16
TC
Code
Rated
Voltage
Product
Type
K = Radial
leaded MLCC
Capacitance Capacitance Size
(pF)
Tolerance
Code
The first two
digits are the
significant
figures of
capacitance
and the last
digit is a
multiplier as
follows:
1 = * 10
2 = * 100
3 = * 1000
4 = * 10 000
5 = * 100 000
Lead
Packaging/
Diameter Lead Length
Please F = 50 V 5 = 0.50 mm 3 = Bulk
J=±5%
Please
K = ± 10 % refer to refer to H = 100 V ± 0.05 mm T = Tape
and reel
M = ± 20 % relevant relevant K = 200 V
U = Ammo
datasheet datasheet
Lead
AEC-Q200
Spacing Qualified
Lead Style
V=
H = Flat bent 2 = 2.5 mm
L = Straight 5 = 5.0 mm AEC-Q200
qualified
K = Outside
kink
H an L
are preferred
A = Axial
For example:
leaded MLCC 104 = 100 000 pF
TAA = Reel
UAA = Ammo
ELECTRICAL DATA AND DIELECTRIC CHARACTERISTICS
DIELECTRIC CHARACTERISTICS
Dielectric according to EIA
According to CECC
C0G (NP0)
X7R
X8R
CG
2C1 (2X1)
2R1
100 pF to 1 nF
-
-
1.2 nF to 10 nF
330 pF to 1 μF
Capacitance Range:
at 1 MHz, 1 V
at 1 kHz, 1 V
Tolerance on the Capacitance
± 5 % (J); ± 10 % (K)
Rated DC Voltage
Dielectric Strength
(This is the maximum voltage the capacitors are
tested for a 1 s to 5 s period and the charge/
discharge current does not exceed 50 mA)
Insulation Resistance (IR at 25 °C ± 3 °C)
Temperature Coefficient of the Capacitance
Maximum Capacitance Change with
Respect to Capacitance at 25 °C
470 pF to 330 nF
± 10 % (K); ± 20 % (M)
50 V; 100 V, 200 V
50 V
When rated voltage is 50 V and 100 V, 250 % of rated voltage
250 % of rated voltage
When rated voltage is 200 V, 200 % rated voltage
100 G or 1000 F whichever is less at rated voltage within 2 min of charging
± 30 ppm/K
± 15 % (- 55 °C to + 125 °C);
+ 15 %/- 50 %
(- 55 °C to + 175 °C)
± 15 % (- 55 °C to + 150 °C);
+ 15 %/- 50 %
(- 55 °C to + 175 °C)
Refer to diagram
± 15 %
 0.1 %
 2.5 %
Dissipation Factor (DF)
at 1 MHz, 1 V; where C  1000 pF
at 1 kHz, 1 V; where C > 1000 pF
Operating Temperature Range
- 55 °C to + 160 °C (50 % rated voltage above 150 °C to 160 °C)
Storage Temperature Range
Aging
25 °C ± 15 °C
Refer to diagram
Typical 1 % per time decade
Note
• The capacitors meet the essential requirements of “EIA 198”.
Unless stated otherwise all electrical values apply at an ambient temperature of 25 °C ± 3 °C, at barometric pressures 650 mm to 800 mm
of mercury, and relative humidity not to exceed 75 %.
Revision: 26-Aug-13
Document Number: 45214
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TEMPERATURE COEFFICIENT OF CAPACITANCE (Typical)
15
CAPACITANCE CHANGE (%)
CAPACITANCE CHANGE (%)
0.6
0.4
0.2
0.0
- 0.2
- 0.4
- 0.6
10
5
0
-5
- 10
- 15
- 20
- 25
- 30
- 50
0
50
100
150
- 75 - 50 - 25
TEMPERATURE (°C)
0
25
50
75 100 125 150 175
TEMPERATURE (°C)
C0G (NP0)/(CG)
X7R/(2C1) or (2X1)
% CAPACITANCE CHANGE
15
10
5
0
-5
- 10
- 15
- 20
- 75 - 50 - 25 0
25
50
75 100 125 150 175
TEMPERATURE °C
X8R/(2R1)
TEMPERATURE COEFFICIENT OF MINIMUM ISOLATION RESISTANCE (Typical)
10 000
INSULATION RESISTANCE (ΩF)
INSULATION RESISTANCE (ΩF)
10 000
1000
100
10
1000
100
10
10
25
50
TEMPERATURE (°C)
C0G (NP0)/(CG)
Revision: 26-Aug-13
100
150
20
40
60
80
100
120
140
160
180
TEMPERATURE (°C)
X7R/(2C1) or (2X1)
Document Number: 45214
3
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INSULATION RESISTANCE (ΩF)
10 000
1000
100
10
10
25
100
150
TEMPERATURE (°C)
X8R/(2R1)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5.0
DISSIPATION FACTOR (%)
DISSIPATION FACTOR (%)
TEMPERATURE COEFFICIENT OF DISSIPATION FACTOR (Typical)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
- 75 - 50 - 25
0
25
50
75 100 125 150 175
- 75 - 50 - 25
TEMPERATURE (°C)
0
25
50 75 100 125 150 175
TEMPERATURE (°C)
X7R/(2C1) or (2X1)
X8R/(2R1)
CHANGE OF CAPACITANCE FACTOR WITH FREQUENCY (Typical)
0
% CAPACITANCE CHANGE
CAPACITANCE CHANGE (%)
2
1
0
-1
-2
1 kHz
10 kHz
100 kHz
FREQUENCY
C0G (NP0)/(CG)
Revision: 26-Aug-13
1 MHz
- 10
- 20
1 kHz
10 kHz
100 kHz
1 MHz
FREQUENCY
X7R/(2C1) or (2X1)
Document Number: 45214
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CHANGE OF DISSIPATION FACTOR WITH FREQUENCY (Typical)
20
DISSIPATION FACTOR (%)
DISSIPATION FACTOR
0.001
0.0005
0.00025
1 kHz
10 kHz
100 kHz
15
10
5
0
1 kHz
1 MHz
10 kHz
FREQUENCY
100 kHz
1 MHz
FREQUENCY
C0G (NP0)/(CG)
X7R/(2C1) or (2X1)
DISSIPATION FACTOR (%)
10
8
6
4
2
0
1 kHz
10 kHz
100 kHz
1 MHz
FREQUENCY
X8R/(2R1)
VOLTAGE COEFFICIENT OF CAPACITANCE (Typical)
10
CAPACITANCE CHANGE (%)
CAPACITANCE CHANGE (%)
0.2
0.1
0
- 0.1
- 0.2
0
- 10
- 20
50 V
rated
- 30
100 V
rated
- 40
200 V
rated
- 50
- 60
0
20
40
60
80
100 120 140 160 180 200
VDC APPLIED
C0G (NP0)/(CG)
Revision: 26-Aug-13
0
20
40
60
80
100 120 140 160 180 200
VDC APPLIED
X7R/(2C1) or (2X1)
Document Number: 45214
5
For technical questions, contact: [email protected]
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OTHER INFORMATION
STORAGE
The capacitors must not be stored in a corrosive atmosphere where sulfide or chloride gas, acid, alkali, or salt are present.
Moisture exposure should also be avoided.
The solderability of the leads is not affected by storage of up to 24 months. Temperature + 10 °C to + 35 °C, relative humidity
up to 60 %.
With reference to class 2 ceramic dielectric capacitors, see section “Capacitance “Aging” of Ceramic Capacitors” this page.
SOLDERING
SOLDERING SPECIFICATIONS
Soldering test for capacitors with wire leads: (According to IEC 60068-2-20, solder bath method)
SOLDERABILITY
RESISTANCE TO SOLDERING HEAT
Soldering temperature
235 °C ± 5 °C
260 °C ± 5 °C
Soldering duration
2 s ± 0.5 s
10 s ± 1 s
Distance from component body
 2 mm
 5 mm
SOLDERING RECOMMENDATIONS
Soldering of the component should be achieved using a Sn96.5/Ag3.0/Cu0.5, a Sn60/40 type or a silver-bearing type solder.
As ceramic capacitors are very sensitive to rapid changes in temperature (thermal shock), the solder heat resistance
specification (see above Soldering Specifications table) should not be exceeded.
Subjecting the capacitor to excessive heat may result in thermal shocks that can crack the ceramic body and melt the internal
solder junction.
CLEANING
The components should be cleaned with vapor degreasers immediately following the soldering operation.
SOLVENT RESISTANCE
The coating and marking of the capacitors are resistant to the following test method: IEC 60068-2-45 (Method XA). The epoxy
material is approved according to UL 94 V-0.
MOUNTING
We do not recommend modifying the lead terminals, e.g. bending or cropping as this action could break the coating or crack
the ceramic insert. However, if the lead must be modified in such a way, we recommend supporting the lead with a clamping
fixture next to 2 mm of the coating.
CAPACITANCE “AGING” OF CERAMIC CAPACITORS
Following the final heat treatment, all class 2 ceramic capacitors reduce their capacitance value. According to logarithmic law,
this is due to their special crystalline construction. This change is called “aging”. If the capacitors are heat treated (for example
when soldering), the capacitance increases again to a higher value deaging, and the aging process begins again.
100 *  C 11 - C 12 
K = ---------------------------------------------C 11 * log 10  t 2 /t 1 
C 12 = C 11 *  1 - K/100 * log10  t 2 /t 1  
t1, t2 = Measuring time point (h)
C11, C12 = Capacitance values for the times t1, t2
K = Aging constant (%)
REFERENCE MEASUREMENT
Due to aging, it is necessary to quote an age for reference measurements which can be related to the capacitance with fixed
tolerance. According to EN 130700, this time period is 1000 h.
If the shelf-life of the capacitor is known, the capacitance for t = 1000 h can be calculated with the aging constant.
In order to avoid the influence of aging, it is important to deage the capacitors before stress-testing. The following procedure is
adopted (see also EN 130700):
• Deaging at 125 °C
• One hour storage for 24 h at normal climate temperature
• Initial measurement
• Stress
• Deaging at 125 °C, 1 h
• Storage for 24 h at normal climate temperature
• Final measurement
Revision: 26-Aug-13
Document Number: 45214
6
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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CAUTION
1. OPERATING VOLTAGE AND FREQUENCY CHARACTERISTIC
When sinusiodal or ripple voltage applied to DC ceramic disc capacitors, be sure to maintain the peak-to-peak value or the peak
value of the sum of both AC and DC within the rated voltage.
When start or stop applying the voltage, resonance may generate irregular voltage.
When rectangular or pulse wave voltage is applied to DC ceramic disc capacitors, the self-heating generated by the capacitor
is higher than the sinusoidal application with the same frequency. The allowable voltage rating for the rectangular or pulse wave
corresponds approximately with the allowable voltage of a sinusoidal wave with the double fundamental frequency.
The allowable voltage varies, depending on the voltage and the waveform.
Diagrams of the limiting values are available for each capacitor series on request.
VOLTAGE
WAVEFORM FIGURE
DC
V0-p
DC AND AC
Vp-p
V0-p
0
AC
0
0
2. OPERATING TEMPERATURE AND SELF-GENERATED HEAT
The surface temperature of the capacitors must not exceed the upper limit of its rated operating temperature.
During operation in a high-frequency circuit or a pulse signal circuit, the capacitor itself generates heat due to dielectric losses.
Applied voltage should be the load such as self-generated heat is within 20 °C on the condition of environmental temperature
25 °C.
Note, that excessive heat may lead to deterioration of the capacitor’s characteristics.
Revision: 26-Aug-13
Document Number: 45214
7
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000