The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. ! " #$ #( ) # # + " +( # ,( - ) ) % % %& )* ' % * % * %& &% % + ) % * # ., . ) " ) " )% &%/ %" 0 ) / ) * % * & * & " , ) , 5 % ' 3 * 4 Designer’s 1 intent 2 %& %& ' 1 2 % % %& 6 3 , 3 ' 1 2 ) ( % * & ) ) % %" & % #7 / * Arch. ) &% Overflow interrupt 5/0= Divide by zero interrupt #( ) ., *) .( % .! * . ) -( -( ) ) 0 && ) *" & * " ) " % ) & & * ) 80 %9:6! * 80 %9 6, *) $ % ) ;8 0 ;8< % & ) ' 80 % 9=6 ) ) ( ) & ) % %& # ) & .8 . 80 # && * ) .> . % ) ? ;) ) When does ‘add’ instruction set the CR bit to zero ? % @ 3,( 4AAB • Based on a static set of testcases • Covering several ad-hoc coverage models ( % #+ % % * & .( .( # %& * * % % ) / & ) .( #8 & *) " * % * % . ) .8 & % % " ) ) % ) # & . *% ., . ) % ) ) % #( .( .8 # ,) ?@ *@ & )%C * % / & % D) ) &% / * % %* / B + " +( ( ) !8 * * ,&& F ;< , ) , FX Arithmetic 5% ) 7 # 8 ) (, * ;< % * E * % ) ) &% + " +( * 7 &% Features defined as processes => Flowchart models Features not defined as processes => Cross-Product models Instruction crand crxor cror crnand Operand1 Operand2 0 1 0 1 ( * #; ) * ) . %" ) @ *@;< # & % . & ) @ *@<8 @ !5 <8 @ (, #( %" . & - & ) ) ) ) * % E & % % & &E . 8&* 2 & ) . 7 %> & 2 # ,&& & % <8 @ !5 & & * ) ) @; & & )% * ? % &* B ) ! %" ;%" sets OV = false sets OV = true 32 OV=1 = OV=0 c 64 =1 OV 64_ OV=0 0 V= _O 4 6 e pr = ec pr OV =1 V=0 O _ 32 1 V= O 32_ ( C+ &) ( ! 22222222222 ! :6" # ! 9: 6" : * 222222222222 6 : & D) % # 9 ) ) &% " ) ) : ,% % $ :<$ ) :< & < ) :< < < &: < " CG CG $ + " +( ( % ;%" ) 7 &% ( C + &) :=J ) := % = % %* % >) >) &* J=H : : >) H = & :HHI :: I J H J HJ HI &% Averages per flowchart: - Edges 14 - Nodes 10 - Fan-in/out:1.6/2.3 edges Compliance bugs were found ! ,( ) * ) PowerPC Coverage Models % Test Specification Generator Test Specification PowerPC Design Specific Architectural Architectural Knowledge knowledge Base Base Knowledge Base Design Specific Architectural PowerPC Reference Model Reference ReferenceModel Model Architectural Model-based Generator Test Generator Compliance Test Cases % & # ) %% . % . 7/ #, #> %* % & ) *% % % % ) * ) ' ) %* & %* % ) % %* % &% ' % ) % F % % %" 7 % ,( PowerPC Coverage Models PowerPC Architecture Decisions 1) fsel implemented yes 2) External control facility yes 3) Memory size … 2^52 ACS Defs Generator Test Specification Architectural Knowledge Base Architectural Reference Model Generator Model-based Test Generator Compliance Test Cases &) # ,( %K * %& " + " +( , . , ((4 7 -= ) % . +,C && & - JH 4 +,J7 6 ) #7 & %& #( * %0 + " +( * " * & % * % % * . () . % &% C % ) & # ,( % .( . ,) ) % ) & ) % %* )* * ) * * & &% & * && ) % )