DATA SHEET SKY73208-11: 350-5000 MHz Wideband Receive Mixer with Integrated Integer-N PLL and VCO Applications Description Cellular base station systems: GSM/EDGE, CDMA2000, WCDMA, TD-SCDMA Other wireless communication systems The Skyworks SKY73208-11 is a fully integrated wideband receive downconverter that includes a high-linearity mixer and a complete voltage-controlled oscillator (VCO), synthesizer, and local oscillator (LO) chain. A low-loss RF balun has also been included to reduce design complications and to lower system cost. Features RF frequency range: 350 to 5000 MHz IF frequency range: 50 to 500 MHz Conversion gain: 6 dB IIP3: +26 dBm; OIP3: +32 dBm Noise figure: 14 dB Integrated RF balun Integer-N frequency synthesizer Low phase-noise VCO Low RF output comparison spurs Programmable 18-bit N-counter and 11-bit R-counter Wide range of reference frequencies Programmable charge pump currents Flexible configuration that allows connection to an external VCO or PLL Digital lock detector Power supply for mixer: 5 V; power supply for synthesizer: 3.3 V Small, low-cost MCM (36-pin, 6 x 6 mm) SMT package (MSL3, 260 C per JEDEC J-STD-020) The SKY73208-11 features a third order input intercept point (IIP3) of +26 dBm and a noise figure (NF) of 14 dB, which make the device an ideal solution for high dynamic range systems such as 2G/3G base station receivers. The SKY73208-11 also includes a fully integrated wideband VCO/Integer-N frequency synthesizer. The device includes four differential VCOs that cover the output frequency range from 2.8 GHz to 6.0 GHz. By applying internal VCO division, the output LO frequency can be set to the desired value while minimizing the phase noise. The direct, non-divided internal VCO frequency can also be monitored at the bidirectional VCO pins. The flexible SKY73208-11 LO configuration allows the loop to be locked by an external VCO or external phase locked loop (PLL), or the device can use the divider chain only. The SKY73208-11 is controlled by a serial peripheral interface (SPI). The SKY73208-11 is manufactured using a robust silicon BiCMOS process and has been designed for optimum long-term reliability. It is manufactured in a compact, 36-pin 6 x 6 mm Multi-Chip Module (MCM). A functional block diagram is shown in Figure 1. The pin configuration and package are shown in Figure 2. Signal pin assignments and functional pin descriptions are provided in Table 1. Skyworks Green™ products are compliant with all applicable legislation and are halogen-free. For additional information, refer to Skyworks Definition of Green™, document number SQ04-0074. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 1 RF_IN DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO LD_OUT Lock Detect CP_OUT Charge Pump IF_OUTN IF_OUTP REF_CLK Phase Detector N-Divider R-Divider PLL Buffer LO Buffer OUTBUFP LO Output Network OUTBUFN VCO Calibration SPI EXT_VCO_INP EXT_VCO_INN DATA LE CLK S1929 ICP VDD_CP VDD_PLL VCTRL VDD_DIV VDD_MIX LO_RES RF_IN VDD_MIXBIAS Figure 1. SKY73208-11 Block Diagram 36 35 34 33 32 31 30 29 28 LD VDD_DIG VDD_CLK REF_CLK EXT_VCO_INP EXT_VCO_INN LE DATA CLK 1 27 2 26 3 25 4 24 5 23 6 22 7 21 8 20 9 19 MIX_RES EXT_PD VDD_IF IF_OUTP IF_OUTN VDD_LO GND OUT_BUFP OUT_BUFN N/C N/C N/C N/C N/C GND VDD_VCO VCO_RES VDD_OBUF 10 11 12 13 14 15 16 17 18 S2034 Figure 2. SKY73208-11 Pinout (Top View) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 2 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F DATA SHEET • SKY73208-11 MIXER WITH PLL AND VCO Table 1. SKY73208-11 Signal Descriptions Pin Name Description Pin Name Description 1 LD Lock detect output 19 OUT_BUFN LO negative output 2 VDD_DIG +3.3 V supply for digital blocks 20 OUT_BUFP LO positive output 3 VDD_CLK +3.3 V supply for reference buffer 21 GND Ground 4 REF_CLK Reference clock input 22 VDD_LO +5 V supply for mixer LO buffer 5 EXT_VCO_INP External VCO positive input 23 IF_OUTN Negative IF output 6 EXT_VCO_INN External VCO negative input 24 IF_OUTP Positive IF output 7 LE Latch enable input for SPI 25 VDD_IF +5 V supply for mixer output 8 DATA Data input for SPI 26 EXT_PD Power-down control pin for mixer 9 CLK Clock input for SPI 27 MIX_RES External bias resistor for mixer 10 N/C No connection 28 VDD_MIXBIAS +5 V supply for mixer bias 11 N/C No connection 29 RF_IN RF mixer input 12 N/C No connection 30 LO_RES External bias resistor for LO chain 13 N/C No connection 31 VDD_MIX +5 V supply for mixer 14 N/C No connection 32 VDD_DIV +3.3 V supply for LO dividers 15 GND Ground 33 VCTRL Tuning voltage for VCO 16 VDD_VCO +3.3 V supply for VCO 34 VDD_PLL +3.3 V supply for PLL 17 VCO_RES External 15 kΩ resistor to set VCO bias 35 VDD_CP +3.3 V supply for charge pump 18 VDD_OBUF +3.3 V supply for output LO buffer 36 ICP Charge pump output Functional Description R-Divider The SKY73208-11 is comprised of four main functional blocks: RF mixer The 11-bit programmable R-divider divides the reference input frequency and generates the reference input for the phase detector. The R-divider range varies from 1 to 211 –1 (= 2047). Synthesizer N-Divider VCO VCO dividers and LO chain The N-divider consists of a selectable 16/17 or 32/33 prescaler, 13-bit main counter, and 5-bit swallow counter. The 18-bit Ndivider ratio is calculated as: RF Mixer N=P×M+S The high linearity SKY73208-11 integrates an active, double balanced mixer that provides good noise performance and an excellent third order input intercept point (IIP3). Where: P = Prescaler value M = Main counter value S = Swallow counter value The balanced nature of the mixer also provides for high port-toport isolation. A wideband match to 50 Ω is provided internally, which eliminates the need for any external matching components except for a coupling capacitor. The N-divider range is from P2 to 218 – 1. For a 32/33 prescaler, the N-divider range varies from 1024 to 262143. The IF outputs are designed for a 200 Ω differential impedance and require off-chip matching. Synthesizer The frequency synthesizer is composed of the R-divider, Ndivider, phase detector, charge pump, and lock detector. Phase Detector The phase detector is an edge-controlled digital circuit. The circuit has two inputs: the reference signal (Ref) and the N-divider output. There are two digital outputs (Up and Dn) that drive the charge pump. When the input phase difference is positive, the Up output is pulled up to VDD. When the input phase difference is negative, the Dn output is pulled down to ground. This type of phase detector acts only on the positive edges of the input signals. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 3 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Charge Pump The charge pump is used to convert the logic levels of the Up and Dn pulses, carrying the phase error between the reference and the divided signal into analog quantities/current pulses. The output of the SKY73208-11 charge pump is programmable and varies between 1.2 mA and 7.2 mA. Additional adjustment of the charge pump current can be accomplished by changing the value of the external PLL bias resistor. Lock Detector The lock detector circuit is activated when the phase difference between the Up and Dn phase detector signals for a given number of comparison cycles is shorter than a fixed delay. The CMOS output is active high when the loop is locked. The lock detector can be monitored from pin 1 (LD). If single-ended input is required, one of the pins can be grounded or an external balun can be used. The register settings to enable this mode of operation are detailed in the Skyworks document, Wideband, Integer-N Phase-Locked Loop Programming Guide, document #201322. LO Output It is possible to monitor the LO signal (either the internally generated LO or an externally applied LO) or route the signal to another device that requires the same LO frequency. The differential LO output is available at pins 19 and 20 (OUTBUFN and OUTBUFP, respectively) using external coupling capacitors. If single-ended output is desired, use pin 19 or an external balun. This feature does not require any specific register bit setting and these pins can be left floating if not used. VCO Digital Interface The VCO is designed to generate the LO signal with the tuning function controlled by the synthesizer. A three-wire SPI provides mode and bias control, and control of the PLL. The serial interface consists of three signals: the bus clock (CLK), latch enable (LE), and the serial data line (DATA). VCO Dividers and LO Chain A write data stream consists of 25 bits: The divider chain consists of dividers and LO drivers. Bits[15:0] provide the 16-bit data block. The direct, non-divided VCO output can be monitored at the bidirectional internal/external VCO pins 5 and 6 (EXT_VCO_INP and EXT_VCO_INN, respectively). The divider chain and the internal PLL can be locked by an external VCO. Bits[20:16] provide the register address. Bits[24:21] provide the device address (the SKY73208-11 is 0110b). A timing diagram for the SPI write cycle is shown in Figure 3. External LO The SKY73208-11 can accept an external LO signal and disable the internal synthesizer. The high impedance differential injection port is at pins 5 and 6 (EXT_VCO_INP and EXT_VCO_INN, respectively). CLK DATA A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A8 A7 LE S1930 Figure 3. SPI Write Cycles Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 4 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F DATA SHEET • SKY73208-11 MIXER WITH PLL AND VCO Table 2. SPI Timing Requirements Timing Minimum Time (ns) Description tperiod Clock period 25 thigh Clock high time 10 tsu Data setup to clock rise 5 thld Data hold from clock rise 5 telch Enable low to clock rise 10 twidth Enable high width 10 tefeh Clock fall to enable high 20 CLK tperiod thigh DATA tsu thld LE telch tcfeh twidth S2434 Figure 4. SPI Input Timing Diagram Serial Bus Timing The SPI bus speed is programmable. Timing requirements for the CLK, DATA, and LE signals are provided in Table 2. A serial data input timing diagram is shown in Figure 4. PLL Control Registers (R-Divider and N-Divider) There are three digital PLL control registers that are used to store the R-divider and N-divider values: R_DIV, N_DIV1, and N_DIV2. By default, all registers are 25 bits wide. Bits[20:16] are the address bits of the registers. The 16 least significant bits (LSBs) represent the data bits. Three values are needed to calculate the three PLL dividers: the desired frequency (FRF), the VCO divider (D), and the frequency step size (FSTEP). The VCO frequency (FVCO) has a range of 2.8 GHz to 6.0 GHz, and is defined by the product of the desired frequency (FRF) and the VCO divider, D: FVCO FRF D (1) The VCO divider (equal to 1, 2, 4, or 8) is chosen so that the product of FRF × D is within the specified VCO range. The frequency step size (FSTEP) is a user-defined value. Given FSTEP and D, the comparison frequency (FCOMP) can be calculated by: FCOMP FSTEP D (2) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 5 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Additional programming information is provided in the document, Skyworks Wideband, Integer-N Phase-Locked Loop Programming Guide, document number 201322. The R_DIV register stores the value of the 11-bit R-divider that produces the desired comparison frequency (FCOMP) for the RF PLL according to the following equation: R FREF FCOMP Example: (3) A desired RF output frequency of 1800 MHz is required using a reference frequency of 76.8 MHz and a desired frequency step size of 400 kHz. If the VCO divider is equal to 2, the VCO frequency is 3600 MHz from Equation 1 and the comparison frequency is equal to 800 kHz from Equation 2. Where FREF is the reference frequency provided to the device. The N_DIV1 and N_DIV2 registers store the value of the N-divider according to the following equation: N FVCO R FREF From Equations 3 and 4, the R and N values become: (4) R = 96 = 1100000b Bits[1:0] of the N_DIV2 register are the most significant bits (MSBs) of the 18-bit representation of the N number. N = 4500 = 1000110010100b Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary representation of the N number. Figure 5 represents the bits of the R_DIV register with the value of R = 96. Figures 6 and 7 represent the bits of the N_DIV1 and N_DIV2 registers, respectively, with the value of N = 4500. These values would be programmed through the SPI interface. The calculated R-divider and N-divider values are programmed into the SKY73208-11 using the SPI interface. 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 0 0 1 0 0 x x x x x 0 0 0 0 1 1 0 0 0 0 0 4-Bit Device Address 5-Bit Register Address 11-Bit R-Divider Value Note: Value of bits [15:11] can vary. Refer to the Skyworks Wideband, Integer-N Phase-Locked Loop Programming Guide, document number 201322. S1847b Figure 5. R_DIV Register Showing an R-Divider Value of 96 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 1 0 0 4-Bit Device Address 5-Bit Register Address LSBs of 18-Bit N-Divider Value S1849b Figure 6. N_DIV1 Register Showing an N-Divider Value of 4500 (LSBs) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 6 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 0 0 0 1 1 x x x x x x x x x x x x x x 0 0 4-Bit Device Address MSBs of 18-Bit N-Divider Value 5-Bit Register Address Note: Value of bits [15:2] can vary. Refer to the Skyworks Wideband, Integer-N Phase-Locked Loop Programming Guide, document number 201322. S1848b Figure 7. N_DIV2 Register Showing an N-Divider Value of 4500 (MSBs) Electrical and Mechanical Specifications The absolute maximum ratings of the SKY73208-11 are provided in Table 3. The recommended operating conditions are specified in Table 4 and electrical specifications are provided in Table 5. Table 3. SKY73208-11 Absolute Maximum Ratings (Note 1) Parameter Symbol Mixer supply voltage (VDD_LO, VDD_IF, VDD_MIXBIAS, and VDD_MIX = +5 V) VDD_MIX Synthesizer supply voltage (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, VDD_DIV, VDD_CP, and VDD_DIG = +3.3 V) VDD_SYNTH Mixer supply current (VDD_LO, VDD_IF, VDD_MIXBIAS, and VDD_MIX = +5 V) IDD_MIX Synthesizer supply current (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, VDD_DIV, VDD_CP, and VDD_DIG = +3.3 V) IDD_SYNTH RF input power PIN Operating case temperature TC Junction temperature TJ Storage case temperature TSTG Minimum –40 –40 Typical Maximum Units 5.5 V 3.6 V 200 mA 150 mA +10 dBm +85 C +150 C +125 C Notes: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device. CAUTION: Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This device must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 7 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Table 4. SKY73208-11 Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Units 4.75 5.00 5.25 V 3.0 3.3 Mixer supply voltage (VDD_LO, VDD_IF, VDD_MIXBIAS, and VDD_MIX pins) VDD_MIX Synthesizer supply voltage (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, VDD_DIV, VDD_CP, and VDD_DIG pins) VDD_SYNTH 3.6 V RF frequency range fRF 350 5000 MHz IF frequency range fIF 50 500 MHz Mixer supply current (VDD_LO, VDD_IF, VDD_MIXBIAS, and VDD_MIX pins) IDD_MIX Synthesizer supply current (VDD_VCO, VDD_OBUF, VDD_PLL, VDD_CLK, VDD_DIV, VDD_CP, and VDD_DIG pins) IDD_SYNTH Operating case temperature TC –40 +85 C SPI logic levels (CLK, DATA, LE): Low High VIL VIH 0.8 × VDD_3.3V 0.2 × VDD_3.3V V V External LO input level (Note 1) 135 mA 120 mA 500 mVp-p, diff. Note 1: Input signal level that maintains the mixer performance described in Table 5. Table 5. SKY73208-11 Electrical Specifications (1 of 2) (Note 1) (VDD_MIX = +5 V, VDD_SYNTH = +3.3 V, TC = +25 C, RF Frequency = 700 to 2700 MHz, IF Frequency = 100 MHz, LO Frequency = 800 to 2800 MHz High-Side Injection or 600 to 2600 MHz Low-Side Injection, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical 6.0 5.5 4.5 6.5 6.0 5.0 Max Units Mixer Conversion gain G fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz Noise figure NF fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz Third order input intercept point IIP3 fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz Gain variation over temperature dB dB dB ±0.5 14.5 14.0 15.5 +21.5 +21.5 +20.0 IIP3 variation over temperature +27.0 +26.0 +24.0 dB 15.5 15.5 16.0 +24.5 +25.5 +23.0 dBm dBm dBm ±1.2 dB +31.0 +31.5 +28.0 dBm dBm dBm Third order output intercept point OIP3 fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz 2RF to 2LO 2x2 fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz –66.5 –73.5 –62.0 –50.0 –50.0 –50.0 dBc dBc dBc 3RF to 3LO 3x3 fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz –79.0 –72.5 –72.5 –60.0 –60.0 –60.0 dBc dBc dBc 1 dB input compression point IP1dB fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz +4.0 +4.0 +6.0 +5.0 +5.5 +6.5 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 8 dB November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F dBm dBm dBm DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Table 5. SKY73208-11 Electrical Specifications (2 of 2) (Note 1) (VDD_MIX = +5 V, VDD_SYNTH = +3.3 V, TC = +25 C, RF Frequency = 700 to 2700 MHz, IF Frequency = 100 MHz, LO Frequency = 800 to 2800 MHz High-Side Injection or 600 to 2600 MHz Low-Side Injection, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical +9.0 +9.0 +9.0 +10.5 +10.5 +10.5 Max Units Mixer (continued) 1 dB output compression point OP1dB fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz dBm dBm dBm RF-to-IF isolation (Note 2) fRF = 1980 MHz –30 dBc LO leakage @ RF port fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz –30 –30 –30 dBm dBm dBm –19 –14 –13 –14 –12 –11 dB dB dB 10.0 153.6 200.0 0.2 1.5 1.2 4.8 RF port input return loss ZIN_RF No matching: fRF = 915 MHz fRF = 1980 MHz fRF = 2700 MHz Synthesizer Reference input frequency fREF Reference input sensitivity Charge pump current ICP LO output power –6 Comparison spurs Locking time MHz Vp-p 7.2 mA –2 dBm –65 dBc 1 ms Phase noise @ 1015 MHz @ 10 kHz offset @ 100 kHz offset @ 1 MHz offset @ 10 MHz offset –87 –100 –134 –148 –83 –94 –132 –145 dBc/Hz dBc/Hz dBc/Hz dBc/Hz Phase noise @ 2080 MHz @ 10 kHz offset @ 100 kHz offset @ 1 MHz offset @ 10 MHz offset –86.0 –102.0 –134.0 –150.0 –81.5 –94.0 –131.0 –146.5 dBc/Hz dBc/Hz dBc/Hz dBc/Hz Phase noise @ 2800 MHz @ 10 kHz offset @ 100 kHz offset @ 1 MHz offset @ 10 MHz offset –84.0 –99.5 –131.5 –148.0 –78.0 –90.0 –128.0 –146.0 dBc/Hz dBc/Hz dBc/Hz dBc/Hz RMS phase error @ 1015 MHz 1 kHz to 10 MHz integrated bandwidth 0.75 1.10 deg 1 kHz to 10 MHz integrated bandwidth 0.85 1.10 deg 1 kHz to 10 MHz integrated bandwidth 1.0 1.2 deg RMS phase error @ 2080 MHz RMS phase error @ 2800 MHz Note 1: Performance is guaranteed only under the conditions listed in this table. Note 2: Under fully symmetric load conditions. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 9 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Evaluation Board Description Package Dimensions The SKY73208-11 Evaluation Board is used to test the performance of the SKY73208-11 module. An Evaluation Board schematic diagram is provided in Figure 8. An assembly drawing for the Evaluation Board is shown in Figure 9 and the layer detail is provided in Figure 10. The PCB layout footprint for the SKY73208-11 is provided in Figure 11. Figure 12 shows the package dimensions, and Figure 13 provides the tape and reel dimensions. Package and Handling Information Circuit Design Configurations The following design considerations are general in nature and must be followed regardless of final use or configuration: Paths to ground should be made as short as possible. The ground pad of the SKY73208-11 has special electrical and thermal grounding requirements. This pad is the main thermal conduit for heat dissipation. Since the circuit board acts as the heat sink, it must shunt as much heat as possible from the device. Therefore, design the connection to the ground pad to dissipate the maximum wattage produced by the circuit board. Skyworks recommends including external bypass capacitors on the VDD voltage inputs of the device. Since the device package is sensitive to moisture absorption, it is baked and vacuum packed before shipping. Instructions on the shipping container label regarding exposure to moisture after the container seal is broken must be followed. Otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. The SKY73208-11 is rated to Moisture Sensitivity Level 3 (MSL3) at 260 C. It can be used for lead or lead-free soldering. For additional information, refer to the Skyworks Application Note, PCB Design & SMT Assembly/Rework Guidelines for MCM-L Packages, document number 101752. Care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. Production quantities of this product are shipped in a standard tape and reel format. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 10 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 J6 SMA 1 C44 DNI C13 DNI 7 50 Ω trace C48 DNI 4Y 1Y 2Y 3Y C42 DNI R55 10 kΩ R39 DNI R38 DNI R36 DNI Pull-Down Resistors 3 2 1 DNI 6 BAL– 5 GND5 BAL+ 4 50 Ω trace C39 0.1 μF R24 0Ω VCC VCO R54 DNI R53 DNI R34 DNI R30 DNI R33 0Ω R27 DNI R29 0Ω 1 VCO, 3.3 V Component R8 is a positive Temperature Coefficient of Resistance (TCR) thermistor rated at 1500 ppm/°C. R35 DNI R31 0Ω C15 DNI VDD Dig + C27 4.7 μF 1 PLL, 3.3 V R50 1Ω R48 1Ω R45 1Ω R43 1Ω R42 1Ω R40 1Ω R32 1Ω C69 1 μF C67 1 μF C65 1 μF C60 1 μF C56 1 μF C51 1 μF C43 1 μF Power Supply Filters + C18 1 μF VDD CP C24 4.7 μF C34 100 pF VCC 0 Buf, 3.3 V VCC Ref VCC Dig VCC CP VCC PLL VCC Div VCC VCO Clock Data Latch Enable Reference Clock C19 33 pF VDD Ref J7 CON1 LOCK DETECT VDD PLL Single-Ended Operation DNI 0 Ohm 0 Ohm 22 pF DNI DNI DNI, ground Pin 4 L1 DNI L7 DNI L12 DNI CLK, PC DATA, PC LE, PC DATA C16 DNI C50 DNI Differential Operation 0 Ohm 0 Ohm DNI DNI 0 Ohm 0 Ohm N/A GND3 GND2 UNBAL U4 Mixer Power Down Latch Enable Clock Data C38 1 μF 2 1A 2A 5 3A 9 12 4A 10E 1 4 20E 10 30E 13 40E VCC3p 0 V VCC 14 External LO Connection C42 C44 C48 C50 R53 R54 U4 External VCO R28 2 kΩ R26 2 kΩ 3 6 8 11 Note: Some component labels may be different than the corresponding component symbol shown here. Component values, however, are accurate as of the date of this Data Sheet. R25 DNI R20 2 kΩ GND R22 0Ω 2 36 × C5 1 μF × 11 VDD Supply VDD 3.0V 10 × 12 DATA 8 CLK LE 7 9 EXT_VCO_INN EXT_VCO_INP REF_CLK 34 33 C22 1 μF R15 2.2 kΩ 6 5 4 VDD_CLK VDD_DIG 2 3 LD 35 1 C29 1 μF C25 100 nF VDD Div R18 10 kΩ C33 2.2 nF ICP N/C MC74LCX125D 32 31 C32 100 pF × 13 × R56 1Ω R59 1Ω R58 1Ω R57 1Ω L22 0Ω L20 DNI 14 C81 1 μF C68 1 μF C66 1 μF C61 1 μF C49 1 μF C45 DNI R8 15 kΩ 15 VDD_PLL N/C R16 2 kΩ VCTRL N/C Data Latch Enable VCC3p 0 V VDD_CP N/C J13 VDD_DIV N/C DATA_READ 30 R17 0Ω 29 16 C23 1 μF 1 J8 VDD_IF OUT_BUFP GND VDD_LO IF_OUTN IF_OUTP VCC LO VCC IF VCC Mix VCC Bias 19 20 21 22 23 24 25 26 VCC 4 J3 SMA 3 C75 1 μF C74 33 pF L3 DNI L2 DNI 1 R52 DNI +5 V Supply +3 V Supply VCC Supply +3 V Supply VCC Supply C58 4.7 μF L24 Ferrite C46 4.7 μF L21 0 nH C36 4.7 μF L19 0 nH VCC OBUF 3.3 V 3 2 1 + + + SEC SEC CT SEC DOT U3 3 2 1 × ADT4-6T 3 2 1 3 2 1 VOUT BYPASS U10 DNI ON/OFF GND VIN R37 0Ω VOUT BYPASS U9 DNI ON/OFF GND VIN R23 0Ω VOUT BYPASS U6 ON/OFF GND VIN LP2985IM5-3.0 C59 1000 pF C47 DNI C37 DNI 3 2 1 4 5 4 5 4 5 6 5 4 3 2 J2 6 5 4 3 2 1 6 5 C80 0Ω C28 0Ω OUT– 4 CT R49 0Ω C57 1 μF C41 1 μF C35 1 μF + + + × J5 SMA C54 4.7 μF C40 4.7 μF C31 4.7 μF 1 C62 0 pF C85 DNI 6 HEADER OUT+ 50 Ω trace C76 DNI IN– N/C IN+ U11 C83 33 pF J1 1 6 HEADER Voltage Regulators DNI 6 PRIM 5 N/C PRIM DOT 4 50 Ω trace VDD IF VCC OBUF 3.3 V C53 R62 DNI 0 Ω C84 DNI C82 1 μF Reference Clock Mixer Power Down VCC IF C3 DNI C55 R61 DNI 0 Ω RF Input R3 10 Ω R51 C79 DNI 0Ω L14 DNI L13 390 nH L11 DNI 1 J9 SMA TCXO Out C77 33 pF VDD IF C4 1 μF C2 DNI VDD LO C75 1 μF VDD Bias C26 0 pF OUT C70 DNI DNI R11 27 2.7 kΩ C6 1 μF OUT_BUFN VCC3p 0 V GND VCON C71 1 μF C30 100 pF EXT_PD VCC TCXO 2 1 VCC TCXO VDD Mix MIX_RES C72 33 pF VDD OBuf 3.3V 17 18 28 R2 DNI R1 DNI VTUNE 50 Ω trace C17 1.8 kΩ LO_RES VDD_VCO VCC3p 0V RF_IN VCO_RES Clock VDD_MIX GND C1 DNI VDD_MIXBIAS VDD_OBUF Serial I/O Interface J10 SMA R64 0Ω R63 0Ω R60 0Ω PLL 3.3 V VCO 3.3 V S2081 VCC 3.0 V IF Out LO Out 1 VCC IF DATA_PC CLK_PC LE_PC DATA_READ Mixer Power Down +5 V Supply +3 V Supply VCC Supply DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Figure 8. SKY73208-11 Evaluation Board Schematic Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 11 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO J5 J6 J10 J9 J3 S2080 Figure 9. SKY73208-11 Evaluation Board Assembly Drawing Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 12 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Layer 1: Top – Metal Layer 2: Ground Layer 3: Ground Layer 4: Power S2082 Figure 10. SKY73208-11 Evaluation Board Layer Detail Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 13 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Pin 36 Pin 1 Indicator 0.2 X 0.2 Stencil aperture size of 80% to 100% of the module/package solder mask openings. 6.3 36X 0.75 Pin 1 36X 0.25 6.3 9X 0.875 Exposed Center Pad 9X 0.875 0.125 Typ. Component Outline 0.5 Pitch Stencil Aperture Top View Thermal via array ø0.3 mm on 0.6 mm pitch will improve thermal performance. NOTE: thermal vias should be resinfilled and capped according to IPC-4761 Type VII vias. 30-35 μm Cu thickness recommended. Pin 36 6.3 Pin 1 Indicator 0.2 X 0.2 0.6 Pitch Pin 1 Pin 36 34X 0.75 6.4 36X 0.85 Pin 1 36X 0.35 34X 0.25 Opening size of 60% to 100% of exposed center opening shown. 0.6 Pitch 6.3 6.4 2X 1.4375 0.25 Typ. Component Outline Component Outline 0.5 Pitch 0.5 Pitch 2X 1.4375 Metallization Top View Solder Mask Opening Top View All measurements are in millimeters S2106 Figure 11. SKY73208-11 PCB Layout Footprint Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 14 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Pin 1 0 B Pin 36 10X 1 4X 2 6 See Detail C C Pin 1 4X 2 10X 1 4X 0.5 6 0 A 4X 1.5 36X SMT Pad 0.1 M A B C 0.1 0.15 A B C Top View 4X 0.5 4X 1.5 A 1.35 ± 0.1 Solder Mask Opening See Detail B 0.2 A B C Bottom View Side View 0.5 ± 0.1 (0.1) 0.875 0.875 0.2 x 0.2 0.4 ± 0.05 0.25 ± 0.05 0.875 0.875 Metal Pad Edge 4X R0.05 Max 5X R0.05 Max Detail A Detail B Detail C Pad Scale: 2X SMT Pad Scale: 2X 8X SMT Pad Scale: 2X 9X This rotation 9X Rotated 180° 9X Rotated 90° CW 9X Rotated 90° CCW All dimensions are in millimeters Dimensioning and tolerancing according to ASME Y14.5M-1994 S2033a Figure 12. SKY73208-11 Package Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 15 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO B Pin 1 6.45 ± 0.10 (Bo) 4.00 ± 0.10 1.75 ± 0.10 A A 12.00 ± 0.30 0.30 ±0.05 (T) 8.00 ± 0.10 ± 0.10 5.50 ± 0.05 Ø1.50 7° Max 1.70 ± 0.10 (Ko) B Ø1.50 Section B Min 6.45 ± 0.10 (Ao) 8° Max Section A Notes: 1. Carrier tape must meet all requirements of Skyworks GP01-D233 procurement spec for tape and reel shipping. 2. Carrier tape: black conductive polycarbonate or polystyrene. 3. Cover tape material: transparent antistatic polyester film. 4. ESD-surface resistivity shall be ≤ 1 x 106 Ω/square per EIA, JEDEC TNR Specification. 5. All dimensions are in millimeters. Figure 13. SKY73208-11 Tape and Reel Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 16 November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F Y2565 DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO Ordering Information Model Name SKY73208-11: 350 to 5000 MHz Receive Mixer with PLL and VCO Manufacturing Part Number SKY73208-11 Evaluation Board Part Number TW18-D245-003 Copyright © 2010, 2011, 2012, 2013 Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. (“Skyworks”) products or services. These materials, including the information contained herein, are provided by Skyworks as a service to its customers and may be used for informational purposes only by the customer. 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Skyworks products are not intended for use in medical, lifesaving or life-sustaining applications, or other equipment in which the failure of the Skyworks products could lead to personal injury, death, physical or environmental damage. Skyworks customers using or selling Skyworks products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. Customers are responsible for their products and applications using Skyworks products, which may deviate from published specifications as a result of design defects, errors, or operation of products outside of published parameters or design specifications. Customers should include design and operating safeguards to minimize these and other risks. Skyworks assumes no liability for applications assistance, customer product design, or damage to any equipment resulting from the use of Skyworks products outside of stated published specifications or parameters. Skyworks, the Skyworks symbol, and “Breakthrough Simplicity” are trademarks or registered trademarks of Skyworks Solutions, Inc., in the United States and other countries. Third-party brands and names are for identification purposes only, and are the property of their respective owners. Additional information, including relevant terms and conditions, posted at www.skyworksinc.com, are incorporated by reference. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201317F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 5, 2015 17