PRELIMINARY DATA SHEET SKY73134: Wideband PLL Frequency Synthesizer Applications Description x Cellular base station systems: GSM/EDGE, CDMA2000, WCDMA, TD-SCDMA, LTE x Other wireless communication systems The SKY73134 is a wideband integer-N frequency synthesizer with an approximately 6 GHz locking range. N/C N/C N/C N/C N/C N/C N/C 32 31 30 29 28 27 26 VCC_VCO 1 25 CLK VCC_CAP 2 24 DATA VCO_RES 3 23 LE OUT_BUFP 4 22 EXT_VCON OUT_BUFN 5 21 EXT_VCOP VCC_OBUF 6 20 PLL_RES DIV_CAP 7 19 REF_CLK DIV_RES 8 18 GND_REF VCC_DIV 9 11 12 13 14 15 16 LF_CTRL LD_OUT VCC_DIG 17 VCC_REF 10 CP_OUT Skyworks offers lead (Pb)-free, RoHS (Restriction of Hazardous Substances) compliant packaging. The SKY73134 frequency synthesizer is manufactured with a BiCMOS 0.18 μm SiGe process and provided in a compact, 32-pin RF Land Grid Array (RFLGA). The pin configuration and package are shown in Figure 1. A functional block diagram is shown in Figure 2. Signal pin assignments and functional pin descriptions are provided in Table 1. VCO_CP x Small, RFLGA (32-pin, 5 x 5 mm) package (MSL3, 260 qC per JEDEC J-STD-020) The direct, non-divided internal VCO frequency can also be monitored at the bidirectional VCO pins. The VCO selection can be automatic based on the target RF output. The flexible SKY74134 configuration allows the loop to be locked by an external VCO or external Phase Locked Loop (PLL), or the device can use the divider chain only. The SKY73134 is controlled by a bidirectional read/write serial to parallel interface. VCTRL x Output frequency range: 0.375 to 5.6 GHz x Integer-N frequency synthesizer x Low phase noise VCO x Four integrated VCOs with automatic digital frequency calibration x Automatic VCO selection based on the target RF output x Programmable VCO division by 1, 2, 3, 4, or 8 x VCO divide-by-three with 50% duty cycle x Integrated input/output RF buffer x Device provides both divided and direct VCO outputs x Programmable RF output power levels x Low RF output comparison spurs x Programmable 18-bit N-counter and 11-bit R-counter x Dual modulus 7 GHz prescaler (64/65) x Programmable charge pump current x Flexible configuration allows connection to external VCO or PLL x Bidirectional read/write three-wire serial to parallel interface x Digital lock detect x Digital output used as a loop filter component switch x Optional adjustment of the core, divider, and charge pump current by external resistor x Power supply: 3.3 V VCC_PLL Features The device includes four differential Voltage Controlled Oscillators (VCOs), which cover the output frequency range from 2.8 GHz to 5.6 GHz. By applying internal VCO division by 1, 2, 3, 4, or 8, the output frequency range can be increased from 0.375 GHz to 5.6 GHz, monitored at the RF output. S1839 Figure 1. SKY73134 Pinout – 32-Pin RFLGA (Top View) Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 1 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER CLK VCO 1 VCO 2 VCO 3 VCO 4 Read/Write SPI DATA LE ÷1 OUT_BUFP OUT_BUFN VCO Out VCO Buffer ÷2 Output Buffer EXT_VCON EXT_VCOP ÷3 ÷4 PLL Buffer VCO In ÷8 N-Divider R-Divider REF_CLK Ref Buffer Digital Frequency Control VCO Calibration Charge Pump Lock Detect CP_OUT LD_OUT VCTRL Phase Detector S1838 Figure 2. SKY73134 Block Diagram Table 1. SKY73134 Signal Descriptions Pin # Name Description Pin # Name Description 1 VCC_VCO Supply for VCO 17 VCC_REF Supply for reference buffer 2 VCC_CAP External capacitor for VCO bias connected to VCC_VCO pin 18 GND_REF Reference buffer ground 3 VCO_RES External 15 kΩ resistor to set VCO bias 19 REF_CLK Reference clock input 4 OUT_BUFP Positive LO output 20 PLL_RES External 24 kΩ resistor for the PLL/charge pump bias 5 OUT_BUFN Negative LO output 21 EXT_VCOP Positive, external VCO input 6 VCC_OBUF Supply for output buffer 22 EXT_VCON Negative, external VCO input 7 DIV_CAP External capacitor for the divider bias connected to the VCC_DIV pin 23 LE Latch enable input for the SPI 8 DIV_RES External 60 kΩ resistor to set the divider bias 24 DATA Data input for the SPI 9 VCC_DIV Supply for dividers 25 CLK Clock input for the SPI 10 VCTRL VCO tuning voltage 26 N/C No connection 11 VCC_PLL PLL supply 27 N/C No connection 12 VCC_CP Supply for charge pump 28 N/C No connection 13 CP_OUT Charge pump output 29 N/C No connection 14 LF_CTRL Loop filter component switch control 30 N/C No connection 15 LD_OUT Lock detect output 31 N/C No connection 16 VCC_DIG Supply for digital blocks 32 N/C No connection Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 2 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Functional Description Charge Pump The SKY73134 is comprised of seven main functional blocks: The charge pump is used to convert the logic levels of the Up and Dn pulses, carrying the phase error between the reference and the divided signal into analog quantities/current pulses. 1. N-divider 2. R-divider 3. Phase detector 4. Charge pump 5. VCO and digital frequency VCO calibration 6. VCO dividers The output of the SKY73134 charge pump is programmable and varies between 0.9 mA and 5.4 mA. Additional adjustment of the charge pump current can be accomplished by changing the value of the external PLL bias resistor. VCO and Digital Frequency VCO Calibration 7. Lock detect The SKY73134 incorporates four VCOs. Each VCO covers a different frequency range between 2.7 and 6.0 GHz: N-Divider The N-divider consists of a 64/65 prescaler, 12-bit main counter, and 6-bit swallow counter. The 18 bit N-divider ratio is calculated as: x VCO 1: 2.7 to 3.4 GHz N=P×M–S x VCO 4: 4.7 to 6.0 GHz Where: P = Prescaler value M = Main counter value S = Swallow counter value The N-divider range is from P2 – P to 218, or it can vary from 4096 to 262144. For the 4 GHz VCO output, the minimum and maximum comparison frequency are defined as: FCOMP_MIN = VCO/NMAX = 4/218 ≈ 15 kHz FCOMP_MAX = VCO/NMIN = 4/4096 ≈ 977 kHz R-Divider The 11-bit programmable R-divider divides the reference input frequency and generates the reference input for the phase detector. The R-divider range varies from 1 to 211 (2048). Since FCOMP= FREF/R-divider for a comparison frequency of 100 kHz, the maximum reference frequency could be 204.8 MHz. x VCO 2: 3.3 to 4.2 GHz x VCO 3: 3.8 to 4.8 GHz The VCOs are designed to generate the LO signal with the tuning function controlled by the synthesizer. Each VCO uses a switch capacitor array and an analog varactor for digital tuning. The digital auto-tuning loop provides the proper 7-bit coarse tuning setting for the VCO switch capacitors. This sets the oscillation frequency as close to target as possible before starting fine analog tuning. When VCO auto-tuning is enabled, the PLL performs a seven-step successive approximation process to digitally tune the VCO close to the final programmed frequency. Once that is complete, analog tuning is enabled to lock the VCO to the programmed frequency. The auto-tuning loop is designed to compensate process variation so that the VCO fine tuning range can be reduced to cover temperature variation only. It significantly reduces VCO gain (Kv), which reduces the VCO phase noise. This ensures that the PLL is always locked. VCO Dividers Phase Detector The phase detector is an edge-controlled digital circuit. The circuit has two inputs: the reference signal (Ref) and the N-divider output. There are two digital outputs (Up and Dn) that drive the charge pump. When the input phase difference is positive, the Up output is pulled up to VDD. When the input phase difference is negative, the Dn output is pulled down to ground. This type of phase detector acts only on the positive edges of the input signals. The divider chain consists of dividers and LO drivers. Any VCO can be divided by 2, 3, 4, or 8, which improves the LO phase noise by 6 dB, 9.5 dB, 12 dB, and 18 dB, respectively. Using frequency division, the overall VCO range of the device is widened from 0.34 to 6.0 GHz. The output RF buffer has a programmable current that provides variation in the output RF level from –4 to +4 dBm. The direct non-divided VCO output can be monitored at the additional bidirectional internal/external VCO pins. The divider chain and the internal PLL can be locked by an external VCO. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 3 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Lock Detect The lock detect circuit is activated when the phase difference between the Up and Dn phase detector signals for a given number of comparison cycles is shorter than a fixed delay. The CMOS output is active high when the loop is locked. Bidirectional Digital Interface A three-wire Serial Programmable Interface (SPI) with read/write capability provides mode and bias control, and control of the PLL. The serial interface consists of three signals: the bus clock (CLK), latch enable (LE), and the serial, bidirectional data line (DATA). line and the addressed device on the bus can activate its data output driver. When the baseband addresses a device connected to the serial bus, the bus enable signal (LE) goes low half a clock cycle before the CLK signal becomes active. Data on the DATA line is clocked into the SKY73134 on the rising edge of the clock. Data from the SKY73134 to the baseband is clocked at the falling edge of the clock. The enable line goes high at the end of the data transfer. The clock becomes inactive one clock pulse after the enable signal goes high. The CLK signal is always disabled for at least one equivalent cycle between subsequent accesses. A timing diagram for the SPI read/write cycle is shown in Figure 3. Write Mode. A write data stream consists of 25 bits: Bits[15:0] provide the 16-bit data block. Bits[20:16] provide the register address. Serial Bus Timing Bit[21] is the read/write bit (0 = read, 1 = write). The SPI bus speed is programmable. Timing requirements for the CLK, DATA, and LE signals are provided in Table 2. A serial data input timing diagram is shown in Figure 4. Bits[24:22] provide the device address (the SKY73134 is 011b). Read Mode. The read data stream is almost identical to the write data stream. Following the 5-bit register address, a “turn around” cycle is inserted so the baseband can disable its drive of the data CLK DATA A7 A6 A5 R/W A4 A3 A2 A1 A0 A4 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A7 A6 A7 A6 Write LE CLK DATA A7 A6 A5 R/W Read LE D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 TurnAround S348 Figure 3. Read/Write SPI Cycles Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 4 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Table 2. SPI Timing Requirements Parameter Description Minimum Time (ns) tperiod Clock period 25 thigh Clock high time 10 tsu Data setup to clock rise 5 thld Data hold from clock rise 5 tes(a) Clock rise to enable high 10 tes(b) Enable high to clock high 10 tel(a) Enable to clock rise 10 twidth Enable high width 20 tes(c) Clock fall to enable high 0 tel(b) Clock rise to enable low 10 CLK tperiod thigh DATA tsu thld twidth tes (a) LE tel (a) tes (c) tes (b) tel (a) S293a Figure 4. SPI Timing Diagram Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 5 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Bits[1:0] of the N_DIV2 register are the most significant bits (MSBs) of the 18-bit representation of the N number. PLL Control Registers (R-Divider and N-Divider) Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary representation of the N number. There are three digital PLL control registers that are used to store the R-divider and N-divider values: R_DIV, N_DIV1, and N_DIV2. By default, all registers are 25 bits wide. Bit[21] is the read/write bit, cleared when writing to the device. Bits[20:16] are the address bits of the registers. The 16 least significant bits (LSBs) represent the data bits. The calculated R-divider and N-divider values are programmed into the SKY73134 using the SPI interface. Additional programming information is provided in the Skyworks document, SKY73134 Frequency Synthesizer Programming Guide, document number *** TBD ***. Three values are needed to calculate the three PLL dividers, R_DIV, N_DIV1 and N_DIV2: the desired frequency (FRF), the VCO divider (D), and the frequency step size (FSTEP). Example: A desired RF output frequency of 2000 MHz is required using a reference frequency of 38.4 MHz and a desired frequency step size of 100 kHz. If the VCO divider is equal to 2, the VCO frequency is 4000 MHz from Equation 1 and the comparison frequency is equal to 200 kHz from Equation 2. The VCO frequency (FVCO) has a range of 2.8 GHz to 5.6 GHz, and is defined by the product of the desired frequency (FRF) and the VCO divider, D: FVCO FRF u D (1) The VCO divider (equal to 1, 2, 3, 4, or 8) is chosen so that the product of FRF × D is within the specified VCO range. From Equations 3 and 4, the R and N values become: The frequency step size (FSTEP) is a user defined value. Given FSTEP and D, the comparison frequency (FCOMP) can be calculated by: N = 20000 = 100111000100000b FCOMP FSTEP u D R = 192 = 11000000b These values would be programmed through the SPI interface. (2) Figure 5 represents the bits of the R_DIV register with the value of R = 192. Figures 6 and 7 represent the bits of the N_DIV1 and N_DIV2 registers, respectively, with the value of N = 20000. The R_DIV register stores the value of the 16-bit R-divider that produces the desired comparison frequency (FCOMP) for the RF PLL according to the following equation: R FREF FCOMP Electrical and Mechanical Specifications (3) The absolute maximum ratings of the SKY73134 are provided in Table 3. The recommended operating conditions are specified in Table 4 and electrical specifications are provided in Tables 5 through 7. Where FREF is the reference frequency provided to the device. The N_DIV1 and N_DIV2 registers store the value of the N-divider according to the following equation: FVCO uR FREF N (4) 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 3-Bit Device Address 5-Bit Register Address 1-Bit Read/Write Flag 16-Bit R-Divider Value S1847 Figure 5. R_DIV Register Showing an R-Divider Value of 192 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 6 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 0 0 0 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 0 3-Bit Device Address 5-Bit Register Address 1-Bit Read/Write Flag LSBs of 18-Bit N-Divider Value S1849 Figure 6. N_DIV1 Register Showing an N-Divider Value of 20000 (LSBs) 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3-Bit Device Address MSBs of 18-Bit N-Divider Value 5-Bit Register Address 1-Bit Read/Write Flag S1848 Figure 7. N_DIV2 Register Showing an N-Divider Value of 20000 (MSBs) Table 3. SKY73134 Absolute Maximum Ratings Parameter Symbol Minimum Typical Maximum Units Supply voltage (VCC_VCO, VCC_OBUF, VCC_DIV, VCC_PLL, VCC_CP, VCC_DIG, and VCC_REF pins) VCC 3.6 V Supply current ICC 150 mA Operating case temperature TC +85 qC Junction temperature TJ Storage case temperature TSTG –40 –40 +150 qC +125 qC Notes: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device. CAUTION: Although this device is designed to be as robust as possible, Electrostatic Discharge (ESD) can damage this device. This device must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times. Table 4. SKY73134 Recommended Operating Conditions Parameter Symbol Supply voltage (VCC_VCO, VCC_OBUF, VCC_DIV, VCC_PLL, VCC_CP, VCC_DIG, and VCC_REF pins) VCC Supply current ICC Operating case temperature TC Minimum Typical Maximum Units 3.0 3.3 3.6 V 120 130 mA +85 qC –40 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 7 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Table 5. Electrical Specifications: Reference Input and Charge Pump (Note 1) (TC = 25 qC, Unless Otherwise Noted) Parameter Reference input frequency Symbol Test Conditions FREF Min Typ 10 Reference input sensitivity Max 200 200 900 Units MHz mVp-p Comparison frequency FCOMP 20 × D (Note 2) 200 × D (Note 2) 800 × D (Note 2) kHz Frequency step FSTEP 20 200 800 kHz Charge pump current ICP 0.9 2.7 Step size = 0.6 mA Output voltage compliance range 0.4 Comparison spurs –70 Locking time 5.4 mA VDD – 0.4 V –65 dBc 1 ms Max Units 20 kHz bandwidth, 1 ppm frequency error Note 1: Performance is guaranteed only under the conditions listed in this Table. Note 2: D is the VCO divider (1, 2, 3, 4, or 8). Table 6. SKY73134 Electrical Specifications: VCO and RF Output Characteristics (Note 1) (TC = +25 qC, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical VCO 1 frequency 2.7 3.4 GHz VCO 2 frequency 3.3 4.2 GHz VCO 3 frequency 3.8 4.8 GHz VCO 4 frequency 4.7 VCO sensitivity KVCO 12 VCO pushing VCO control voltage VCTRL 6.0 GHz 20 38 MHz/V 5 10 MHz/V 0.4 RF power –2 VDD – 0.4 V +2 +4 dBm Typical Max Units Note 1: Performance is guaranteed only under the conditions listed in this Table. Table 7. SKY73134 Electrical Specifications: Phase Noise Performance (1 of 3) (Note 1) (TC = +25 qC, Unless Otherwise Noted) Parameter Symbol Test Condition Min In-Band Phase Noise, Closed Loop Normalized in-band phase noise floor ICP = 3.6 mA, PLL bandwidth = 30 kHz –211 dBc/Hz In-band phase noise floor divide-by-1 ICP = 3.6 mA, PLL bandwidth = 30 kHz –211 + 20 × logN + 10log(FCOMP) dBc/Hz In-band phase noise floor divide-by-2 ICP = 3.6 mA, PLL bandwidth = 30 kHz –217 + 20 ×logN + 10log(FCOMP) dBc/Hz In-band phase noise floor divide-by-3 ICP = 3.6 mA, PLL bandwidth = 30 kHz –220 + 20 ×logN + 10log(FCOMP) dBc/Hz In-band phase noise floor divide-by-4 ICP = 3.6 mA, PLL bandwidth = 30 kHz –223 + 20 ×logN + 10log(FCOMP) dBc/Hz In-band phase noise floor divide-by-8 ICP = 3.6 mA, PLL bandwidth = 30 kHz –229 + 20 ×logN + 10log(FCOMP) dBc/Hz Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 8 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Table 7. SKY73134 Electrical Specifications: Phase Noise Performance (2 of 3) (Note 1) (TC = +25 qC, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical Max Units PLL Integrated Phase Noise Integrated phase noise (1 kHz to 10 MHz) PLL bandwidth = 30 kHz, RF output = 1 GHz, FSTEP = 200 kHz –43 dBc –48 –79 –109 –133 –143 –152 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz –46 –77 –106 –128 –138 –147 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz –44 –76 –105 –128 –138 –148 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz –43 –74 –104 –128 –137 –148 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz VCO – 6 VCO – 6 VCO – 6 VCO – 6 dBc/Hz dBc/Hz dBc/Hz dBc/Hz VCO – 9.5 VCO – 9.5 VCO – 9.5 VCO – 9.5 dBc/Hz dBc/Hz dBc/Hz dBc/Hz VCO 1 Open Loop Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz @ 3 MHz @ 10 MHz VCO 2 Open Loop Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz @ 3 MHz @ 10 MHz VCO 3 Open Loop Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz @ 3 MHz @ 10 MHz VCO 4 Open Loop Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz @ 3 MHz @ 10 MHz VCO Divided by 2 Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz VCO Divided by 3 Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 9 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Table 7. SKY73134 Electrical Specifications: Phase Noise Performance (3 of 3) (Note 1) (TC = +25 qC, Unless Otherwise Noted) Parameter Symbol Test Condition Min Typical Max Units VCO Divided by 4 Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz @ 1 MHz VCO – 12 VCO – 12 VCO – 12 VCO – 12 dBc/Hz dBc/Hz dBc/Hz dBc/Hz VCO – 18 VCO – 18 VCO – 18 dBc/Hz dBc/Hz dBc/Hz VCO Divided by 8 Phase noise: @ 1 kHz @ 10 kHz @ 100 kHz Note 1: Performance is guaranteed only under the conditions listed in this Table. Evaluation Board Description Package Dimensions The SKY73134 Evaluation Board is used to test the performance of the SKY73134 frequency synthesizer. An assembly drawing for the Evaluation Board is shown in Figure 8 and the layer detail is provided in Figure 9. A schematic diagram of the SKY73134 Evaluation Board is shown in Figure 10. The PCB layout footprint for the SKY73134 is provided in Figure 11. Figure 12 shows the package dimensions for the 25-pin LGA and Figure 13 provides the tape and reel dimensions. Package and Handling Information Circuit Design Configurations The following design considerations are general in nature and must be followed regardless of final use or configuration: 1. Paths to ground should be made as short as possible. 2. The ground pad of the SKY73134 has special electrical and thermal grounding requirements. This pad is the main thermal conduit for heat dissipation. Since the circuit board acts as the heat sink, it must shunt as much heat as possible from the device. Therefore, design the connection to the ground pad to dissipate the maximum wattage produced by the circuit board. 3. Skyworks recommends including external bypass capacitors on the VCC voltage inputs of the device. *** add’l info TBD *** Since the device package is sensitive to moisture absorption, it is baked and vacuum packed before shipping. Instructions on the shipping container label regarding exposure to moisture after the container seal is broken must be followed. Otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. THE SKY73134 is rated to Moisture Sensitivity Level 3 (MSL3) at 260 qC. It can be used for lead or lead-free soldering. For additional information, refer to the Skyworks Application Note, PCB Design & SMT Assembly/Rework Guidelines for RFLGA Packages, document number 103147. Care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. Production quantities of this product are shipped in a standard tape and reel format. For packaging details, refer to the Skyworks Application Note, Tape and Reel Information – RF Modules, document number 101568. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 10 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER S1851 Figure 8. SKY73134 Evaluation Board Assembly Diagram Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 11 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Layer 1: Top – Metal Layer 2: Ground Layer 3: Power Plane Layer 4: Solid Ground Plane S1852 Figure 9. SKY73134 Evaluation Board Layer Detail Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 12 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER *** TBD *** Figure 10. SKY73134 Evaluation Board Schematic Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 13 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER *** TBD *** Figure 11. PCB Layout Footprint for the SKY73134 5 x 5 mm RFLGA Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 14 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER B 5.04 18X 2.47 (2.35) (2.2) C Pin 1 Indicator (∅0.15) Metal Pad, Pin 1 16X 0.5 (2.35) 5.04 32x SMT Pad 14X 2.47 0.05 M A B C 0.025 M A A A 0.05 1 ± 0.075 A B C 12X 0.5 0.025 C Top View ∅2 ± 0.05 Solder Mask Opening 0.05 A B C 0.08 Side View Bottom View (2X R0.05) 0.38 ± 0.025 (0.37) (0.05) Pad to Pkg Edge (0.04) Solder Mask to Pkg Edge 0.3 ± 0.025 0.4 ± 0.025 Detail A All measurements are in millimeters Dimensioning and tolerancing according to ASME Y14.5M-1994 SMT Pad Scale: 3X 7X This Rotation 7X Rotated 180° 9X Rotated 90° CW 9X Rotated 90° CCW S1841 Figure 12. SKY73134 32-Pin RFLGA Package Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 15 PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER *** TBD *** Figure 13. SKY73134 Tape and Reel Dimensions Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 16 December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER Ordering Information Model Name SKY73134 Frequency Synthesizer Manufacturing Part Number SKY73134-xx (Pb-free package) Evaluation Kit Part Number TW18-D170 Copyright © 2009 Skyworks Solutions, Inc. All Rights Reserved. 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Skyworks assumes no liability for any materials, products or information provided hereunder, including the sale, distribution, reproduction or use of Skyworks products, information or materials, except as may be provided in Skyworks Terms and Conditions of Sale. THE MATERIALS, PRODUCTS AND INFORMATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, INCLUDING FITNESS FOR A PARTICULAR PURPOSE OR USE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHT; ALL SUCH WARRANTIES ARE HEREBY EXPRESSLY DISCLAIMED. SKYWORKS DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY DAMAGES, INCLUDING BUT NOT LIMITED TO ANY SPECIAL, INDIRECT, INCIDENTAL, STATUTORY, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS THAT MAY RESULT FROM THE USE OF THE MATERIALS OR INFORMATION, WHETHER OR NOT THE RECIPIENT OF MATERIALS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Skyworks products are not intended for use in medical, lifesaving or life-sustaining applications, or other equipment in which the failure of the Skyworks products could lead to personal injury, death, physical or environmental damage. Skyworks customers using or selling Skyworks products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. Customers are responsible for their products and applications using Skyworks products, which may deviate from published specifications as a result of design defects, errors, or operation of products outside of published parameters or design specifications. Customers should include design and operating safeguards to minimize these and other risks. Skyworks assumes no liability for applications assistance, customer product design, or damage to any equipment resulting from the use of Skyworks products outside of stated published specifications or parameters. Skyworks, the Skyworks symbol, and “Breakthrough Simplicity” are trademarks or registered trademarks of Skyworks Solutions, Inc., in the United States and other countries. Third-party brands and names are for identification purposes only, and are the property of their respective owners. Additional information, including relevant terms and conditions, posted at www.skyworksinc.com, are incorporated by reference. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201199A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 15, 2009 17