APL3537C Ultra-Low On-Resistance, Power Load Switch with Soft Start Features • Gereral Description Ultra-Low On-Resistance: The APL3537C is an ultra-low on-resistance, power-distribution switch with internal soft start control. The device -RDS(ON)=10.5mΩ at VIN=5V is a N-channel MOSFET which needs only one input voltage from 0.95V to 5.5V. Built in internal charge pump func- -RDS(ON)=12mΩ at VIN=3.6V -RDS(ON)=12.5mΩ at VIN=1.8V • tion biases the N-MOS switch to achieve a minimum switch on-resistance. The APL3537C can be enabled by -RDS(ON)=17.5mΩ at VIN=1V Ultra-Low Quiescent Current: VIN=1V Condition, other power system. Pulling and holding the EN pin below 0.4V shuts off the output. 10µA (Max.) • • • 2A Maximum Continuous Output Current The device is available in lead free WLCSP 0.9x1.4-6 package. Supply Voltage Range from 0.95V to 5.5V Built in Internal Charge Pump Function for Internal Gate Driver • Built in Internal Soft-Start Function: VIN = 3.6V Pin Configuration Condition, 800µs (Typ.) • • Built in Enable/Shutdown Control Built in Turn On Time: VIN = 3.6V Condition, C 860µs (Typ.) • • • Built in Reverse Current Block Function EN GND VIN VOUT VIN VOUT 2 1 B Tiny small WLCSP 0.9x1.4-6 Package A Lead Free and Green Devices Available (RoHS Compliant) WLCSP 0.9x1.4-6 (Top View) Applications • • • • • Notebooks Simplified Application Circuit AIO PC Tablet PCs VIN GPS Devices VOUT VIN VOUT Smartphones APL3537C GPIO EN GND ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 1 www.anpec.com.tw APL3537C Ordering and Marking Information APL3537C Assembly Material Handling Code Temperature Range Package Code APL3537C HA: Package Code HA : WLCSP0.9x1.4-6 Operating Junction Temperature I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device X - Date Code CX Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). WLCSP 0.9x1.4-6 Marking (Top View) 2 2 CX 1 A B 1 C VIN VIN VOUT VOUT A EN GND B C Absolute Maximum Ratings Symbol VIN (Note 1) Parameter Rating Unit VIN to GND Voltage -0.3 ~ 6 V VOUT VOUT to GND Voltage -0.3 ~ 6 V VEN EN to GND Voltage -0.3 ~ 6 V o PD Maximum Power Dissipation, TA<25 C TJ Maximum Junction Temperature (Note 2) 1 TSTG Storage Temperature TSDR Maximum Lead Soldering Temperature (10 Seconds) W -40 ~ 150 o -65 ~ 150 o 260 o C C C Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note2: Refer to the thermal consideration on page 8. Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 2 www.anpec.com.tw APL3537C Thermal Characteristics Symbol θJA Parameter Typical Value Junction-to-Ambient Thermal Resistance in free air (Note 3) θJC Junction-to-Case Thermal Resistance in free air Unit 125 o 18 o (Note 3) C/W C/W Note 3: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 4) Sym bol Param eter VIN VIN Inp ut Voltage I OUT OUT Output Cu rrent I PEAK Maximum Peak Curren t, 100µs plu se with 2% du ty cycle Range Unit 0.9 5 ~ 5.5 V 0~2 A Maximum Power Dissi pation, TA<25oC (Note 2) PD o (Note 2) o (Note 2) Maximum Power Dissi pation, TA<50 C Maximum Power Dissi pation, TA<85 C 4 A 0.8 W 0.6 W 0.32 W VIH EN Log ic High Inpu t Volta ge 0.9 ~ 5.5 V V IL EN Log ic Lo w Input Vo lta ge 0 ~ 0.4 V 0 .1 ~ 1 µF C OUT Ou tp ut Capacitor TA Amb ient Tempe rature TJ Junction Tempera tu re -4 0 ~ 85 o -40 ~ 12 5 o C C Note 4: Please refer to the typical application circuit. Electrical Characteristics Unless otherwise specified, these specifications apply over VIN= 1~5V, VEN =3.6V and TA= -40~85oC. Typical values are at TA=25oC. Sym bol Param eter APL35 37C Test Conditions Unit Min Typ Max No lo ad, V IN =5V – 50 90 µA No lo ad, V IN =3.6V – 25 45 µA No lo ad, V IN =1.8V – 10 20 µA No lo ad, V IN =1.2V – 7 15 µA No lo ad, V IN =1V – 5 10 µA No lo ad, V IN =5V, VEN =0V – – 7 µA No lo ad, V IN =3.6V, VEN=0V – – 5 µA No lo ad, V IN =1V, VEN =0V – – 3 µA No lo ad, V IN =5V, VEN =0V – – 3 µA No lo ad, V IN =3.6V, VEN=0V – – 3 µA No lo ad, V IN =1V, VEN =0V – µA – 7 µA V EN=0V, V IN=GND, VOU T=3.6V – 5 µA V EN=0V, V IN=GND, VOU T=1V – – – – – 3 V EN=0V, V IN=GND, VOU T=5.5V 3 µA SUP PLY CURRENT V IN Sup ply Cur rent V IN Sup ply Cur rent at Sh utd own V OUT L eakage Curre nt Reverse Le akage Curre nt Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 3 www.anpec.com.tw APL3537C Electrical Characteristics Unless otherwise specified, these specifications apply over VIN= 1~5V, VEN =3.6V and TA= -40~85oC. Typical values are at TA=25oC. Sym bol Param eter APL35 37C Test Conditions Min Typ Unit Max POW ER SW ITCH o VIN=5V, I OU T=200 mA , T J=2 5 C o VIN=5V, I OU T=200 mA , T J=-4 0~1 25 C o VIN=3 .6V, I OU T=200mA, T J=25 C o mΩ mΩ VIN=1 .8V, I OU T=200mA, T J=-40 ~12 5oC – – 22 .5 mΩ – 16 19 mΩ – – 26 mΩ – 17.5 21 mΩ VIN=1 .0V, I OU T=200mA, T J=25 C o tOFF Turn On Tim e (N ote 5) Turn Off Time (Note 5) mΩ 16 .5 o tON 16 21 .5 o V OUT Fall Time 12 – VIN=1 .2V, I OU T=200mA, T J=-40 ~12 5 C tF mΩ – 12.5 VIN=1 .2V, I OU T=200mA, T J=25 C (Note 5) mΩ 19 – o S oft-Start Time (N ote 5) 14 – – o tSS 10.5 VIN=1 .8V, I OU T=200mA, T J=25 C VIN=3 .6V, I OU T=200mA, T J=-40 ~12 5 C RDS(ON) P ower Switch O n Re sistance – – VIN=1 .0V, I OU T=200mA, T J=-40 ~12 5 C – – 28 .5 mΩ V IN =5V, R L=10Ω , C OUT =0.1µF – 950 – µs V IN =3.6V, R L=10Ω, COUT =0.1 µF – 1 065 – µs V IN =1.8 R L=10Ω, COUT =0 .1 µF – 730 – µs V IN =1.2 R L=10Ω, COUT =0 .1 µF – 1 020 – µs V IN =1V, R L=10Ω , C OUT =0.1µF – 1 270 – µs V IN =5V, R L=10Ω , C OUT =0.1µF – 1.5 – µs V IN =3.6V, R L=10Ω, COUT =0.1 µF – 1.5 – µs V IN =1V, R L=10Ω , C OUT =0.1µF – 2 – µs V IN =5V, R L=10Ω , C OUT =0.1µF – 850 – µs V IN =3.6V, R L=10Ω, COUT =0.1 µF – 1 080 – µs V IN =1.8 R L=10Ω, COUT =0 .1 µF – 840 – µs V IN =1.2 R L=10Ω, COUT =0 .1 µF – 1 260 – µs V IN =1V, R L=10Ω , C OUT =0.1µF – 1 600 – µs V IN =5V, R L=10Ω , C OUT =0.1µF – 1 – µs V IN =3.6V, R L=10Ω, COUT =0.1 µF – 1 – µs V IN =1V, R L=10Ω , C OUT =0.1µF – 3 – µs EN INPUT PIN VIH E N Input Logic High 0.9 – – V VI L E N Input Logic Low – – 0.4 V E N Input Curren t V EN=5 .5 V, V IN=0V – – 1 µA E N Le akage Curren t V EN=0 V, V IN =5.5V – – 1 µA Note 5: Refer to the Timing Chart (See Figure 1). Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 4 www.anpec.com.tw APL3537C Timing Chart 50% 50% tSS VEN tON tF tOFF 90% 50% 90% 50% VOUT VOUT 10% 10% Note 6: Rise and fall times of the control signal is 100ns. Figure 1. ton/tOFF, tSS/tF Waveforms Pin Description PIN Function NO. NAME C1 GND C2 EN A1, B1 VOUT A2, B2 VIN Ground pin of the circuitry. All voltage levels are measured with respect to this pin. Enable input of switch. Logic high turns on switch. The EN pin cannot be left floating. Switch output. Power supply Input of switch. Connect this pin to an external DC supply. Block Diagram Bulk Select VIN VOUT Charge Pump Control Logic GND EN Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 Delay 5 www.anpec.com.tw APL3537C Typical Application Circuit VIN A2, B2 VIN CIN 1µF GPIO Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 VOUT COUT 1µF APL3537C C2 GND EN 6 VOUT A1, B1 CL RLoad C1 www.anpec.com.tw APL3537C Function Description Soft-Start The APL3537C Provides a soft-start circuitry to control rise rate of the output voltage during start-up. Enable Control The APL3537C has a dedicated enable pin (EN). Pulling EN above 0.9V will enable the device, and pulling the EN below 0.4V will disable the device. Following a shutdown, a logic high signal re-enables the output through initiation of a new soft-start cycle. The enable input is compatible with standard GPIO logic threshold. (It can be used with any microcontroller with 1.2V, 1.8V, 2.5V, 3.3V GPIOs.) The EN pin cannot be left floating. Reverse Current Blocking Circuit The APL3537C has a built-in reverse current blocking circuit to prevent a reverse current flowing through the body diode of power switch from the VOUT back VIN pin when power switch disabled. Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 7 www.anpec.com.tw APL3537C Application Information Power Sequencing Thermal Consideration The power up/down sequence where VIN is already in The APL3537C maximum power dissipation depends on the differences of the thermal resistance and tem- steady state condition, and EN pin is asserted high or low to prevent wrong logic controis. perature between junction and ambient air. The power dissipation PD across the device is: VIN PD=(TJ -TA) / θJA VEN Where the (TJ-TA) is the temperature difference between the junction and ambient air. θJA is the thermal resistance between junction and ambient air. Assuming the TA=25oC VOUT and maximum TJ=150 oC, the maximum power dissipation is calculated as: VEN PD(max)=(150-25) / 125 VOUT =1 (W) VIN ------- for TA < 25oC For normal operation, do not exceed the maximum operating junction temperature of TJ = 125oC. The calculated power dissipation should be less than: Figure 1. APL3537C Power Sequencing Diagram PD=(125-25) / 125 Input Capacitor =0.8(W) The APL3537C requires proper input capacitance to supply current surge during stepping load transients to pre- ------- for TA < 25oC PD=(125-85) / 125 vent the input voltage rail from dropping. Because the parasitic inductor from the voltage sources or other bulk =0.32(W) capacitors to the VIN pin limit the slew rate of the surge currents, more parasitic inductance needs more input ------- for TA < 85oC Layout Consideration The PCB layout should be carefully performed to maxi- capacitance. A 1µF or higher ceramic input capacitor from VIN to GND, mize thermal dissipation and to minimize voltage drop, droop and EMI. The following guidelines must be located near the APL3537C, is strongly recommended to suppress the ringing during load transient event. Without considered: 1. Please place the input capacitors near the VIN pin as the input capacitor, the load transient may cause sufficient ringing on the input (from supply lead inductance) to close as possible. 2. Output decoupling capacitors for load must be placed damage internal control circuitry. Additional input capacitance may be needed on the input near the load as close as possible for decoupling high frequency ripples. to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during load transient 3. Locate APL3537C and output capacitors near the load to reduce parasitic resistance and inductance for excel- conditions. lent load transient performance. 4. The negative pins of the input and output capacitors and the GND pin must be connected to the ground plane of the load. 5. Keep VIN and VOUT traces as wide and short as possible. Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 8 www.anpec.com.tw APL3537C Package Information WLCSP0.9x1.4-6 E b D PIN 1 A1 A NX aaa C e SEATING PLANE e S Y M B O L WLCSP0.9x1.4-6 MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.38 0.47 0.015 0.019 A1 0.13 0.17 0.005 0.007 b 0.20 0.24 0.008 0.009 D 1.46 1.54 0.057 0.061 E 0.96 1.04 0.038 0.041 e aaa Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 0.50 BSC 0.020 BSC 0.08 0.003 9 www.anpec.com.tw APL3537C Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application WLCSP0.9X1.4 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 1.10±0.10 1.60±0.10 0.56±0.10 4.0±0.10 4.0±0.10 (mm) Devices Per Unit Package Type Unit Quantity WLCSP0.9x1.4 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 10 www.anpec.com.tw APL3537C Taping Direction Information WLCSP 0.9x1.4-6 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 11 www.anpec.com.tw APL3537C Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 12 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APL3537C Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.1 - Dec., 2015 13 www.anpec.com.tw