HD74HC592 8-bit Register/Binary Counter REJ03D0633-0200 (Previous ADE-205-513) Rev.2.00 Mar 30, 2006 Description The HD74HC592 consists of a parallel input, 8-bit storage register feeding an 8-bit binary counter. Both the register and the counter have individual positive edge-triggered clocks. In addition, the counter has direct load and clear functions. Expansion is easily accomplished by connecting RCO of the first stage to the count enable of the second stage, etc. Features • High Speed Operation: tpd (CCK to RCO) = 24 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type HD74HC592FPEL SOP-16 pin (JEITA) Package Code (Previous Code) Package Abbreviation PRSP0016DH-B (FP-16DAV) FP Taping Abbreviation (Quantity) EL (2,000 pcs/reel) Function Table RCK CLoad Inputs CCLR CCKEN CCK X X L H H L X X X X Register data loaded into counter Counter clear H H H H X X X X Input data A to H stored into register No change in register X X H H H H L L X H H H RCO = QA’•QB’•QC’•QD’•QE’•QF’•QG’•QH’• (CCKEN) (QA’ to QH’: Output of Internal Counter) Rev.2.00 Mar 30, 2006 page 1 of 8 Function Count up No count X No cont HD74HC592 Pin Arrangement B 1 16 VCC C 2 15 A D 3 14 C Load E 4 13 RCK F 5 12 CCKEN G 6 11 CCK H 7 10 CCLR 9 RCO GND 8 (Top view) Rev.2.00 Mar 30, 2006 page 2 of 8 CLOAD CCLR RCK RCK RCK D D D E D F D G D H D CCK Rev.2.00 Mar 30, 2006 page 3 of 8 T T T T RCK CCKEN LD CLR CCK CCK LD CLR CCK CCK D LD CLR CCK CCK LD CLR CCK CCK D Q T LD CLR CCK CCK RCK Q T D Q T LD CLR CCK CCK RCK D D Q T LD CLR CCK CCK D LD CLR CCK CCK D LD CLR CCK CCK D RCK C RCK RCK D RCK RCK B RCK RCK D RCK RCK A RCK RCK HD74HC592 Logic Diagram Q Q Q Q RCO HD74HC592 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC VIN, VOUT –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IOUT ±20 ±25 mA mA ICC or IGND PT ±50 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Symbol VCC Ratings 2 to 6 Unit V Input / Output voltage Operating temperature VIN, VOUT Ta 0 to VCC –40 to 85 V °C tr , tf 0 to 1000 0 to 500 Input rise / fall time Note: *1 ns 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Electrical Characteristics Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Input current Quiescent supply current Iin ICC Min Ta = 25°C Typ Max Ta = –40 to+85°C Unit Min Max 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 1.5 3.15 4.2 — — — 1.9 4.4 5.9 — — — — — — 2.0 4.5 6.0 — — — 0.5 1.35 1.8 — — — 1.5 3.15 4.2 — — — 1.9 4.4 5.9 — — — 0.5 1.35 1.8 — — — 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 4.18 5.68 — — — — — — — — — 0.0 0.0 0.0 — — — — — — 0.1 0.1 0.1 0.26 0.26 ±0.1 4.0 4.13 5.63 — — — — — — — — — 0.1 0.1 0.1 0.33 0.33 ±1.0 40 Rev.2.00 Mar 30, 2006 page 4 of 8 Test Conditions V V V V Vin = VIH or VIL IOH = –20 µA Vin = VIH or VIL IOH = –4 mA IOH = –5.2 mA IOL = 20 µA IOH = 4 mA IOH = 5.2 mA µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA HD74HC592 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Maximum clock frequency fmax Propagation delay time tPLH tPHL tPLH tPHL tPLH tPLH tPHL Pulse width Removal time Setup time tw trem tsu Ta = –40 to +85°C 2.0 Min — Typ — Max 5 Min — Max 4 4.5 6.0 — — — — 25 29 — — 20 24 2.0 4.5 — — — 24 200 40 — — 250 50 6.0 2.0 — — — — 34 200 — — 43 250 4.5 6.0 — — 27 — 40 34 — — 50 43 2.0 4.5 — — — 26 200 40 — — 250 50 6.0 2.0 — — — — 34 300 — — 43 375 4.5 6.0 — — 29 — 60 51 — — 75 64 2.0 4.5 80 16 — 8 — – 100 20 — — 6.0 2.0 14 100 — — — — 17 125 — — 4.5 6.0 20 17 12 — — — 25 21 — — 2.0 4.5 100 20 — 0 — — 125 25 — — 6.0 2.0 17 200 — — — — 21 250 — — 4.5 6.0 40 34 14 — — — 50 43 — — Output rise/fall time tTLH tTHL 2.0 4.5 — — — 5 75 15 — — 95 19 Input capacitance Cin 6.0 — — — — 5 13 10 — — 16 10 Unit Test Conditions MHz ns CCK to RCO ns C Load to RCO ns CCLR to RCO ns RCK to RCO ns ns CCLR to CCK ns CCKEN to CCK ns CCK to RCK ns pF Test Circuit VCC VCC CLoad Pulse Generator Zout = 50 Ω Input Pulse Generator Zout = 50 Ω See Function Table Input RCK Output CCKEN CCK RCO CCLR A to H Note : 1. CL includes probe and jig capacitance. Rev.2.00 Mar 30, 2006 page 5 of 8 CL = 50 pF HD74HC592 Waveforms • Waveform – 1 (CCK, RCK to RCO) tf tr Input CCK RCK VCC 90 % 50 % 50 % 10 % 50 % tw(H) 0V tw(L) t PHL t PHL 90 % Output RCO 50 % 10 % VOH 90 % 50 % 10 % 50 % 10 % t TLH VOL t THL Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 2 (CLoad to RCO) tf Input CLoad tr 90 % 90 % 50 % VCC 50 % 10 % 10 % 0V tW t PLH 90 % 50 % 10 % Output RCO VOH VOL t TLH t PHL VOH 90 % Output RCO 50 % 10 % t THL Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 6 of 8 VOL HD74HC592 • Waveform – 3 (CCLR to RCO, CCLR to CCK) tf tr 90 % Input CCLR VCC 90 % 50 % 50 % 10 % 10 % 0V tW t rem VCC 90 % Input CCK 50 % 10 % 0V tr t PLH VOH 90 % Output RCO 50 % 10 % VOL t TLH Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 4 (CCKEN, RCK to CCK) tr Input CCKEN RCK tf 90 % VCC 90 % 50 % 50 % 50 % 10 % 10 % t su th t su 0V th VCC 90 % Input CCK 50 % 10 % 50 % 10 % tr 50 % 0V tf Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 5 (Data to RCK) tr tf 90 % Input Data VCC 90 % 50 % 50 % 10 % 50 % 10 % t su th t su 0V th VCC 90 % Input RCK 50 % 10 % 50 % 10 % tr tf Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 7 of 8 0V HD74HC592 Package Dimensions JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV MASS[Typ.] 0.24g D F 16 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 9 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 8 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 8 of 8 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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