AWC6323 HELP3ETM Dual-band Cellular & PCS CDMA 3.4 V Linear Power Amplifier Module Data Sheet - Rev 2.1 FEATURES • InGaP HBT Technology • High Efficiency (Cell Band): • 37.5 % @ POUT = +27.6 dBm • 23 % @ POUT = +16 dBm • 11.5 % @ POUT = +10 dBm AW C 632 • Low Quiescent Current: 3.5 mA 3 • Internal Voltage Regulation • Built-in Directional Coupler • Common VMODE Control Line • Simplified VCC Bus PCB routing • Reduced External Component Count • Low Profile Surface Mount Package: 1 mm • RoHS Compliant Package, 260 oC MSL-3 M47 Package 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module APPLICATIONS • Cell & PCS Dual-band Wireless Handsets and Data Devices for CDMA/EVDO networks. PRODUCT DESCRIPTION AWC6323 addresses the demand for increased integration in dual-band handsets for CDMA networks. The small footprint 3 mm x 5 mm x 1 mm surfacemount RoHS compliant package contains independent RF PA paths to ensure optimal performance in both frequency bands, while achieving a 25% PCB space savings compared with solutions requiring two single-band PAs. The package pinout was chosen to enable handset manufacturers to easily route bias to both power amplifiers and simplify control with common mode pins. The device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and ruggedness. The AWC6323 is part of ANADIGICS’ High-Efficiency-at-Low-Power (HELP™) family of CDMA power amplifiers, which deliver low quiescent currents and significantly greater efficiency without the need of an external DC-DC converter. Through selectable bias modes, the AWC6323 achieves optimal efficiency, specifically at low- and mid-range power levels where the PA typically operates, thereby dramatically increasing handset talk-time. Its built-in voltage regulator eliminates the need for external switches. This PA has built-in directional couplers for each band, with a common coupler output port CPL_OUT. The 3 mm x 5 mm x 1 mm surface mount package incorporates matching networks optimized for output power, efficiency and linearity in a 50 Ω system. 05/2011 VEN_CELL 1 14 GND Bias Control Voltage Regulation RFIN_CELL CPL 2 13 RFOUT_CELL VMODE1 3 12 VCC VBATT 4 11 VCCA VMODE2 5 10 CPLOUT RFIN_PCS 6 VEN_PCS 7 CPL Bias Control Voltage Regulation GND at Slug (pad) Figure 1: Block Diagram 9 GND 8 RFOUT_PCS AWC6323 VMODE1 CPLOUT VMODE2 Figure 2: Pinout Table 1: Pin Description 2 PIN NAME DESCRIPTION 1 VEN_CELL Enable Voltage for Cell Band 2 RFIN_CELL RF Input for Cell Band 3 VMODE1 Mode Control Voltage 1 4 VBATT Battery Voltage 5 VMODE2 Mode Control Voltage 2 6 RFIN_PCS RF Input for PCS Band 7 VEN_PCS Enable Voltage for PCS Band 8 RFOUT_PCS RF Output for PCS Band 9 GND 10 CPLOUT 11 VCCA 12 VCC 13 RFOUT_CELL 14 GND Ground Coupler Output Port Battery Voltage A Supply Voltage RF Output for Cell Band Ground Data Sheet - Rev 2.1 05/2011 AWC6323 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PARAMETER MIN MAX UNIT Supply Voltage (VBATT, VCC, VCCA) 0 +5 V Mode Control Voltage (VMODE1, VMODE2) 0 +3.5 V Enable Voltage (VEN_CELL, VEN_PCS) 0 +3.5 V RF Input Power (PIN) - +10 dBm -40 +150 °C Storage Temperature (TSTG) Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Table 3: Operating Ranges PARAMETER MIN TYP MAX UNIT Operating Frequency (f) 824 1850 - 849 1910 MHz Supply Voltage (VCC and VBATT) +3.2 +3.4 +4.2 V Enable Voltage (VEN) +1.35 0 +1.8 - +3.1 +0.5 V PA "on" PA "shut down" Mode Control Voltage (VMODE1, VMODE2) +1.35 0 +1.8 - +3.1 +0.5 V High State Voltage Low State Voltage Cellular RF Output Power (POUT) CDMA, HPM CDMA, MPM CDMA, LPM +27.1 (1) - 27.6 16 10 - dBm CDMA 2000, RC-1 PCS RF Output Power (POUT) CDMA, HPM CDMA, MPM CDMA, LPM +27.4 (1) - +27.9 16 10 - dBm CDMA 2000, RC-1 -30 - +90 Case Temperature (TC) COMMENTS Cellular PCS °C The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: (1)For operation at VCC = +3.2 V, POUT is derated by 0.5 dB. Data Sheet - Rev 2.1 05/2011 3 AWC6323 Table 4a: Electrical Specifications - Cellular Band (BC 0) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_CELL = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) PARAMETER COMMENTS MIN TYP MAX UNIT 25 14 8 27 17 11.5 30 19 14 dB 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.6 dBm +16 dBm +10 dBm Adjacent Channel Power at 885 kHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz - -51 -52 -50 -46.5 -46.5 -46.5 dBc 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.6 dBm +16 dBm +10 dBm Adjacent Channel Power at 1.98 MHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz - -61 -63 <-68 -57 -57 -57 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.6 dBm +16 dBm +10 dBm 34 18 8 37.5 23 11.5 - % 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.6 dBm +16 dBm +10 dBm Quiescent Current (Icq) - 3.5 6 mA through VCC pins, VMODE1 = 0/1.8 V, VMODE2 = 0 V Mode Control Current - <0.05 0.1 mA through VMODE pins, VMODE1= 0/1.8 V, VMODE2 = 0 V Battery Current - 1 2 mA through VBATT pin, VMODE1 = 0/1.8 V, VMODE2 = 0 V Enable Current - <0.1 0.15 mA through VEN_CELL pin Noise in Receive Band(2) - -133 -138 -131 -135 dBm/Hz Harmonics 2fo 3fo, 4fo - -43 -50 -30 -30 dBc Input Impedance - - 2:1 VSWR Coupling Factor - 22 - dB Gain Power-Added Efficiency (1) 4 dBc Data Sheet - Rev 2.1 05/2011 VMODE1 VMODE2 POUT VMODE1 = 0 V, VMODE2 = 1.8 V, VMODE1 = VMODE2 = 1.8 V POUT < +27.6 dBm AWC6323 Table 4b: Electrical Specifications - Cellular Band (BC 0) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_CELL = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) PARAMETER Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure MIN TYP MAX UNIT - - -65 dBc 8:1 - - VSWR COMMENTS VMODE1 VMODE2 POUT POUT < +27.6 dBm In-band Load VSWR < 5:1 Out-of-band Load VSWR < 10:1 Applies over all operating conditions Applies over full operating conditions Notes: (1) PAE and ACP measured at 836.5 MHz. (2) 869 MHz to 894 MHz. Data Sheet - Rev 2.1 05/2011 5 AWC6323 Table 5a: Electrical Specifications - PCS Band (BC 1) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_PCS = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) COMMENTS PARAMETER MIN TYP MAX UNIT Gain 24.5 10 7 26.5 13.5 10 30 16 13 dB 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.9 dBm +16 dBm +10 dBm Adjacent Channel Power at 1.25 MHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz - -51 -52 -52 -46.5 -46.5 -46.5 dBc 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.9 dBm +16 dBm +10 dBm Adjacent Channel Power at 1.98 MHz offset (1) Primary Channel BW = 1.23 MHZ Adjacent Channel BW = 30 kHz - -56 -59 -63 -54 -54 -54 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.9 dBm +16 dBm +10 dBm 33 18 8 36.5 21 11 - % 0V 1.8 V 0/1.8 V 1.8 V 1.8 V 0V +27.9 dBm +16 dBm +10 dBm Quiescent Current (Icq) - 3.5 6 mA through VBATT and VCC pins, VMODE1 = 0/1.8 V, VMODE2 = 0 V Mode Control Current - 0.05 0.1 mA tthrough VMODE pins, VMODE1 = 0/1.8 V, VMODE2 = 0 V Battery Current - 1 2 mA through VBATT pin, VMODE1 = 0/1.8 V, VMODE2 = 0 V Enable Current - <0.1 0.15 mA through VEN_CELL pin Total Decoder Current on VBATT (in Shutdown mode) - 7 16 A VBATT = +4.2 V, VCC = +4.2 V, VEN_CELL = 0 V, VMODE1 = 0 V, VMODE2 = 0 V Total PA Leakage Current on VCC (in Shutdown mode) - 1 5 A VBATT = +4.2 V, VCC = +4.2 V, VEN_CELL = 0 V, VMODE1 = 0 V, VMODE2 = 0 V Noise in Receive Band(2) - -133 -137 -131 -134 dBm/Hz VMODE1 = 0 V, VMODE2 = 1.8 V VMODE1 = VMODE2 = 1.8 V Harmonics 2fo 3fo, 4fo - -41 -50 -30 -30 dBc Input Impedance - - 2:1 VSWR Coupling Factor - 22 - dB Power-Added Efficiency (1) 6 Data Sheet - Rev 2.1 05/2011 dBc VMODE1 VMODE2 POUT < +27.9 dBm POUT AWC6323 Table 5b: Electrical Specifications - PCS Band (BC 1) (TC = +25 °C, VBATT = VCC = +3.4 V, VEN_PCS = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform) PARAMETER Spurious Output Level (all spurious outputs) Load mismatch stress with no permanent degradation or failure MIN TYP MAX UNIT - - -65 dBc 8:1 - - VSWR COMMENTS VMODE1 VMODE2 POUT POUT < +27.9 dBm In-band Load VSWR < 5:1 Out-of-band Load VSWR < 10:1 Applies over all operating conditions Applies over full operating conditions Notes: (1) ACPRs and Efficiency measured at 1880 MHz. (2) 1930 MHz to 1990 MHz. Data Sheet - Rev 2.1 05/2011 7 AWC6323 APPLICATION INFORMATION To ensure proper performance, refer to all related Application Notes on the ANADIGICS web site: http://www.anadigics.com Shutdown Mode The power amplifier may be placed in a shutdown mode by applying logic low levels (see Operating Ranges table) to the VENABLE and VMODE voltages. Bias Modes The power amplifier may be placed in Low, Medium or High Bias modes by applying the appropriate logic level (see Operating Ranges table) to the VMODE1, and VMODE2 pins. The Bias Control table lists the recommended modes of operation for various applications. Table 6: Bias Control POUT LEVELS BIAS MODE VEN VMODE1 VMODE2 VCC VBATT CDMA - low power (Low Bias Mode) < +10 dBm Low +1.8 V - 0V 3.2 - 4.2 V > 3.2 V CDMA - med power (Medium Bias Mode) > 8 dBm < +16 dBm Med +1.8 V +1.8 V +1.8 V 3.2 - 4.2 V > 3.2 V CDMA - high power (High Bias Mode) > +16 dBm High +1.8 V 0V +1.8 V 3.2 - 4.2 V > 3.2 V - Shutdown 0V 0V 0V 3.2 - 4.2 V > 3.2 V APPLICATION Shutdown VEN_CELL 1 14 Bias Control Voltage Regulation RFIN_CELL (1) CPL 2 13 68 pF 12 3 VMODE1 RFOUT_CELL VCC 1000 pF VBATT 2.2 F VMODE2 RFIN_PCS (1) VEN_PCS 68pF 4 11 1000 pF 5 10 CPL 6 7 Bias Control Voltage Regulation GND at Slug (pad) Figure 3: Application Circuit Note: (1) Add blocking cap if DC voltage is present on input pin. 8 Data Sheet - Rev 2.1 05/2011 2.2 F CPLOUT 9 8 33 pF RFOUT_PCS AWC6323 PACKAGE OUTLINE Figure 4: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module Pin 1 Identifier Date Code YY= Year WW= Work Week 6323R LLLLNN CC YYWW Part Number Lot Number Country Code Figure 5: Branding Specification Data Sheet - Rev 2.1 05/2011 9 AWC6323 ORDERING INFORMATION ORDER NUMBER TEMPERATURE RANGE PACKAGE DESCRIPTION COMPONENT PACKAGING AWC6323RM47Q7 -30 °C to +90 °C RoHS Compliant 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module Tape and Reel, 2500 pieces per Reel AWC6323RM47P9 -30 °C to +90 °C RoHS Compliant 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module Partial Tape and Reel ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. warning ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 10 Data Sheet - Rev 2.1 05/2011