ROHM BD4153FV_10

Power Management Switch ICs for PCs and Digital Consumer Products
Power Switch ICs
for ExpressCardTM
BD4153FV,BD4153EFV
No.10029EBT08
●Description
TM
BD4153FV/EFV is a power management switch IC for the next generation PC card (ExpressCard ) that PCMCIA recommends.
TM
TM
TM
Conforms to PCMCIA’s ExpressCard Standard, ExpressCard Compliance Checklist, and ExpressCard Implementation
Guideline, and obtains the world first Compliance ID “EC100001” from PCMCIA. Offers various functions such as adjustable
soft-starter, overcurrent detector (OC function), card detector, and system condition detector, which are ideally suited for
laptop and desktop computers.
●Features
TM
1) Incorporates three low on-resistance FETs for ExpressCard .
2) Incorporates an FET for output discharge.
3) Incorporates an enabler.
4) I Incorporates an undervoltage lockout (UVLO)
5) I Employs SSOP-B24 package.
6) I Employs HTSSOP-B24 package.
7) Incorporates a thermal shutdown protector (TSD).
8) Incorporates a soft-starter.
9) Incorporates an overcurrent protector (OCP).
10) Incorporates an overcurrent flag output (OC).
11) Conforms to ExpressCardTM Standard.
TM
12) Conforms to ExpressCard Compliance Checklist.
13) Conforms to ExpressCardTM Implementation Guideline.
●Use
Laptop and desktop computers, and other digital devices equipped with ExpressCard.
●Lineup
Parameter
Package
BD4153FV
SSOP-B24
BD4153EFV
HTSSOP-B24
“ExpressCardTM” is a trademark registered by PCMCIA(Personal Computer Memory Card International Association).
●Absolute Maximum Ratings
◎BD4153FV/BD4153EFV
Parameter
Power Supply Voltage
Logic Input Voltage
Logic Output Voltage 1
Logic Output Voltage 2
Input Voltage 1
Input Voltage 2
Output Voltage
Output current 1
Output current 2
Power Dissipation 1
Power Dissipation 2
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Symbol
VCC
EN,CPPE#,CPUSB#,SYSR,PERST_IN#
OC
PERST#
V3_IN, V15_IN
V3AUX_IN
V3,V3AUX,V15
IOV3, IOV15
IOV3AUX
Pd1
Pd2
Topr
Tstg
Tjmax
BD4153FV
5.0 *1
5.0 *1
5.0 *1
VCC *1
5.0 *1
VCC *1
5.0 *1
2.0
1.0
787 *2
1025 *3
-40~+100
-55~+150
+150
BD4153EFV
5.0 *1
5.0 *1
5.0 *1
VCC *1
5.0 *1
VCC *1
5.0 *1
2.0
1.0
1100 *4
-40~+100
-55~+150
+150
Unit
V
V
V
V
V
V
V
A
A
mW
mW
℃
℃
℃
*1 However, not exceeding Pd.
*2 Pd derating at 6.3mW/℃ for temperature above Ta=25℃
*3 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.2 mW/°C.
*4 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.8 mW/°C.
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1/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Recommended Operating Conditions
◎BD4153FV/BD4153EFV
Parameter
Power Supply Voltage
Logic Input Voltage 1
Logic Input Voltage 2
Logic Output Voltage 1
Logic Output Voltage 2
Input Voltage 1
Input Voltage 2
Input Voltage 3
Soft Start Setup Capacitor 1
Soft Start Setup Capacitor 2
Symbol
MIN
MAX
Unit
VCC
EN
CPPE#,CPUSB#,SYSR,PERST_IN#
OC
PERST#
V3_IN
V3AUX_IN
V15_IN
CSS_V3, CSS_V15
CSS_V3AUX
3.0
-0.2
-0.2
3.0
3.0
1.35
0.001
0.001
3.6
3.6
VCC
3.6
VCC
3.6
VCC
1.65
1.0
0.1
V
V
V
V
V
V
V
V
μF
μF
* This product is designed for protection against radioactive rays.
●Electrical Characteristics
(unless otherwise noted, Ta=25℃ VCC=3.3V VEN=3.3V V3_IN=V3AUX_IN=3.3V,V15_IN=1.5V)
Standard Value
Parameter
Symbol
Unit
MIN
TYP
MAX
Condition
Standby current
IST
-
35
70
μA
VEN=0V
Bias current 1
Icc1
-
0.25
0.50
mA
VSYSR=0V
Bias current 2
Icc2
-
1.0
2.0
mA
VSYSR=3.3V
High Level Enable Input Voltage
VENHI
2.3
-
5.5
V
Low Level Enable Input Voltage
VENLOW
-0.2
-
0.8
V
IEN
-
3
10
μA
High Level Logic Input Voltage
VLHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VLLOW
-0.2
-
0.8
V
IL
-1
0
1
μA
[Enable]
Enable Pin Input current
VEN=3V
[Logic (CPPE#,CPUSB#)]
Logic Pin Input current
VCPPE#=3.3V or VCPUSB#=3.3V
[Logic (SYSR)]
High Level Logic Input Voltage
VSYSRHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VSYSRLOW
-0.2
-
0.8
V
ISYSR
6
11
18
μA
High Level Logic Input Voltage
VPSTHI
2.3
-
VCC
V
Low Level Logic Input Voltage
VPSTLOW
-0.2
-
0.8
V
IPST
-18
-11
-6
μA
Logic Pin Input current
VSYSR=3.3V
[Logic (PERST_IN#)]
Logic Pin Input current
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© 2010 ROHM Co., Ltd. All rights reserved.
2/17
VPERST_IN#=0V
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Electrical Characteristics – Continued
(unless otherwise noted, Ta=25℃ VCC=3.3V VEN=3.3V V3_IN=V3AUX_IN=3.3V,V15_IN=1.5V)
Standard Value
Parameter
Symbol
Unit
MIN
TYP
MAX
Condition
[Switch V3]
On Resistance
Discharge On Resistance
RV3
-
35
73
mΩ
RV3Dis
-
60
150
Ω
RV3AUX
-
100
210
mΩ
RV3AUXDis
-
60
150
Ω
RV15
-
42
85
mΩ
RV15Dis
-
60
150
Ω
Ichr
1.0
2.0
3.0
μA
Tj=-10~100℃ *
[Switch V3AUX]
On Resistance
Discharge On Resistance
Tj=-10~100℃ *
[Switch V15]
On Resistance
Discharge On Resistance
Tj=-10~100℃ *
[Soft Start]
Charge current
SS_V3 High Voltage
SS_V3high
V3+4
V3+5
V3+6
V
SS_V15 High Voltage
SS_V15high
V15+4
V15+5
V15+6
V
SS_V3AUX High Voltage
SS_AUXhigh
1.5
1.8
2.1
V
IDis
0.3
1.0
-
mA
SSLOW
-
-
50
mV
OCPV3_S
1.0
-
-
A
Discharge current
Low Voltage
Vss=1V
[Over Current Protection]
OC Flag V3
V3 Over current
OCPV3
2.0
-
-
A
OC Flag V3AUX
OCPV3AUX_S
0.25
-
-
A
V3AUX Over current
OCPV3AUX
0.50
-
-
A
OC Flag V15
OCPV15_S
0.50
-
-
A
OCPV15
1.20
-
-
A
OC_Delay Charge current
IOCP_Delaych
1.0
2.0
3.0
μA
OC_Delay Discharge current
IOCP_Delaydis
1.0
2.0
-
mA
OC_Delay Standby Voltage
VOCP_Delayst
-
-
50
mV
OC_Delay Threshold Voltage
V15 Over current
VOC_DELAY=1V
VOCP_Delayth
0.6
0.7
0.8
V
OC Low Voltage
VOCP
-
0.1
0.2
V
IOC=0.5mA
OC Leak current
IOCP
-
-
1
μA
VOC=3.65V
VUVLOV3_IN
2.80
2.90
3.00
V
sweep up
[Under Voltage Lockout]
V3_IN UVLO OFF Voltage
V3_IN Hysteresis Voltage
⊿VUVLOV3_IN
80
160
240
mV
V3AUX_IN UVLO OFF Voltage
VUVLOV3AUX_IN
2.80
2.90
3.00
V
V3AUX_IN Hysteresis Voltage
⊿VUVLOV3AUX_IN
80
160
240
mV
V15 UVLO OFF Voltage
VUVLOV15
1.25
1.30
1.35
V
V15 Hysteresis Voltage
⊿VUVLO15
50
100
150
mV
VCC UVLO OFF Voltage
VUVLOVCC
2.80
2.90
3.00
V
VCC Hysteresis Voltage
⊿VUVLOVCC
80
160
240
mV
sweep down
sweep up
sweep down
sweep up
sweep down
sweep up
sweep down
* Design Guarantee
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© 2010 ROHM Co., Ltd. All rights reserved.
3/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Reference data
V3AUX
V3AUX
V3AUX
V3
V3
V3
CP#
CP#
CP#
SYSR
SYSR
SYSR
Fig.1 System Stand-by→Active
(Card)
Fig.2 System Active⇔Stand-by
(Card)
Fig. System Stand-by⇔Active
(No Card)
V3AUX
V3AUX
CPUSB#
V3
V3
V3
CP#
CP#
SYSR
SYSR
V3AUX
PERST#
Fig.4 PCI Card Assert/DeAssert
(Stand-by)
Fig.5 Card Assert/DeAssert
(Active)
V3 RISETIME
V3 rise propagation delay TIME
Fig.6 USB Card Assert/ DeAssert
(Active)
10000
PERST#
10000
1000
Delay Time (ms)
Rise Time (ms)
1000
100
100
10
1
SS_V3
1
Logic Input(SYSR)
0.1
0.1
0.01
V3
10
1.00E-10
1.00E-09
1.00E-08
1.00E-07 1.00E-06
CSS_V3 (F)
Fig.7 V3 RISETIME
0.01
1.00E-10
1.00E-09
1.00E-08
1.00E-07 1.00E-06
CSS_V3 (F)
Fig.8 V3 rise
Propagation delay TIME
Fig.9 V3 Start up
(Stand-by→Active)
V3AUX RISE TIME
10000
V3
V3
1000
)
PERST#
Delay Time (ms)
PERST#
(
SS_V3
SS_V3
Logic Input(CP#)
100
10
1
0.1
Logic Input(EN)
1.00E-10
0.01
1.00E-09
1.00E-08
1.00E-07
CSS_V3AUX (F)
Fig.10 V3 Start up
(Card Assert)
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© 2010 ROHM Co., Ltd. All rights reserved.
Fig.11 V3 Wave Form
(Shut down→Active)
4/17
Fig.12 V3AUX
RISE TIME
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
V3AUX rise propagation delay
10000
PERST#
PERST#
V3AUX
V3AUX
Delay Time (ms)
1000
100
10
SS_V3AUX
SS_V3AUX
1
Logic Input(SYSR)
Logic Input(CP#)
0.1
1.00E-10
1.00E-09
1.00E-08
1.00E-07
CSS_V3AUX (F)
0.01
Fig.14 V3AUX Start up
(Stand-by→Active)
Fig.13 V3AUX
rise propagation delay
Fig.15 V3AUX Start up
(Card Assert)
V15 RISE TIME
V15
10000
10000
PERST#
1000
Logic Input(EN)
Delay Time (ms)
SS_V3AUX
Delay Time (ms)
1000
V3AUX
100
10
1
100
10
1
1
0.1
0.1
1.00E-10
1.00E-09
1.00E-08
1.00E-07
CSS_V15 (F)
0.01
Fig.16 V3AUX Start up
(Shut down→Active)
rise propagation delay time
Fig.17 V15 RISE TIME
1.00E-10
0.01
1.00E-07
CSS_V15 (F)
Fig.18 V15
rise propagation delay time
PERST#
PERST#
PERST#
V15
V15
V15
SS_V15
SS_V15
SS_V15
Logic Input(CP#)
Logic Input(SYSR)
Fig.19 V15 Start up
(Stand-by→Active)
1.00E-08
1.00E-09
Fig.20 V15 Start up
(Card Assert)
Logic Input(EN)
Fig.21 V15 Start up
(Shut down→Active)
Ishort(500mA/div)
OCP_DELAY
PERST#
PERST#
PERST#_DELAY
OCP_FLAG
PERST#_DELAY
SYSR
V3AUX
Fig.22 V3AUX Short Circuit
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© 2010 ROHM Co., Ltd. All rights reserved.
SYSR
Fig.23 PERST#
L→H Wave Form
5/17
Fig.24 PERST#
H→L Wave Form
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Block Diagram
V3_IN1
3.3V
V3-1
21
3
VD
22
4
V3_IN2
SS_V3
V3AUX_IN
3.3V/1.30A
V3-2
TSD,CL,UVLO
2
3.3V AUX/275mA
20
5
V3AUX_IN
V3AUX
3.3V
SS_V3AUX
TSD,CL,UVLO_AUX
6
V15_IN1
V15_IN2
1.5V
17
8
18
CPUSB#
SYSR
SS_V15
12
1.5V/625mA
9
V15-2
VD
CPPE# 11
V15-1
Input
logic
Power
good
10
19
TSD,CL,UVLO
16
PERST#
VCC
7
EN,SYSR,CPUSB#,CPPE#
PERST_IN#
13
Thermal
protection
VCC
24
TSD
PERST#_DELAY
V3_IN,V3AUX_IN,V15
CL
V3,V3AUX,V15
EN
23
Reference
Block
V3_IN
V3AUX_IN
Charge
Pump
VD
V15_IN
VCC
15
Under
UVLO
OC
voltage
lock out
14
UVLO_AUX
OC_DELAY
1
GND
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© 2010 ROHM Co., Ltd. All rights reserved.
6/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Pin Configration
GND 1
24 VCC
SS_V3 2
23 EN
V3_1 3
22 V3_IN2
V3_2 4
21 V3_IN1
V3AUX 5
20 V3AUX_IN
SS_V3AUX 6
19 PERST#
PERST_IN# 7
(SysReset#)
18 V15_IN2
V15_1 8
17 V15_IN1
V15_2 9
16 SS_V15
SYSR 10
15 OC
CPPE#
CPUSB#
11
14 OC_DELAY
12
13 PERST#_DELAY
SSOP-B24 Package
●Pin Function
PIN No
PIN NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
SS_V3
V3_1
V3_2
V3AUX
SS_V3AUX
PERST_IN#
V15_1
V15_2
SYSR
CPPE#
CPUSB#
PERST#_DELAY
OC_DELAY
OC
SS_V15
V15_IN1
V15_IN2
PERST#
V3AUX_IN
V3_IN1
V3_IN2
EN
VCC
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© 2010 ROHM Co., Ltd. All rights reserved.
PIN FUNCTION
GND pin
V3 soft start pin
V3 output pin 1
V3 output pin 2
V3AUX output pin
V3AUX soft start pin
PERST# control input pin (SysReset#)
V15 output pin 1
V15 output pin 2
Logic input pin
Logic input pin
Logic input pin
PERST# delay time setting pin
OCP delay time setting pin
over current protect signal output pin
V15 soft start pin
V15 input pin 1
V15 input pin 2
Logic output pin
V3AUX input pin 1
V3 input pin 1
V3 input pin 2
Enable input pin
Input voltage
7/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Description of operations
VCC
BD4153FV/EFV has an independent power input pin for an internal circuit operation in order to activate UVLO, Input logic,
and charge pump, the maximum current through which is rated to 2 mA. It is recommended to connect a bypass capacitor
of 0.1 μF or so to VCC pin.
EN
With an input of 2.3 volts or higher, this terminal turns to “High” level to activate the circuit, while it turns to “Low” level to
deactivate the circuit (with the standby circuit current of 35 μA), discharges each output and lowers output voltage If the input
is lowered to 0.8 volts or less.
V3_IN, V15_IN, and V3AUX_IN
These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which
should be short-circuited on the pc board with a thick conductor. And V3AUX IN terminal should be short-circuited to VCC
terminal. Through these three terminals, a big current runs (V3_IN: 1.35A, V3AUX_IN: 0.275 A, and V15_IN: 0.625 A). In
order to lower the output impedance of the power supply to be connected, it is recommended to provide ceramic capacitors
(of B-characteristics or better) between these terminals and ground; 1 μF or so between V3_IN and GND and between
V15_IN and GND, and 0.1 μF or so between V3AUX_IN and GND.
V3, V15, and V3AUX
These are the output terminals for each switch. V3 and V15 terminals have two pins each, which should be short-circuited
on the pc board and connected to an ExpressCard connector with a thick conductor as shortest as possible. In order to
stabilize the output, it is recommended to provide ceramic capacitors (of B-characteristics or better) between these terminals
and ground; 10 μF or so between V3 and GND and between V15 and GND, and 1 μF or so between V3AUX and GND.
CPPE#
The pin used to find whether a PCI-Express signal compatible card is provided or not. Turns to “High” level with an input of
2.3 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or
less, which means that a card is provided. Controls turning ON/OFF of the switch according to the status of the system.
CPUSB#
The pin used to find whether a USB2.0 signal compatible card is provided or not. Turns to “High” level with an input of 2.3
volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or
less, which means that a card is provided. Controls turning ON/OFF of the switch according to the system status.
SYSR
The pin used to detect the system status. Turns to “High” level with an input of 2.3 volts or higher, which means that the
system is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is
on standby.
PERST_IN#
The pin used to control a reset signal to a card (PERST#) from the system side. (Also referred to as “SysReset#” by
PCMCIA.) Turns to “High” level with an input of 2.3 volts or higher, and turns PERST# to “High” level AND with a “Power
Good” output. Turns to “Low” level and turns PERST# to “Low” level when the input is lowered to 0.8 volts or less.
PERST#
The pin used to provide a reset signal to a PCI-Express compatible card. The status is determined by each output,
PERST#_IN, CPPE# system status, and EN on/off status. Turns to “High” level and activates the PCI-Express compatible
card only if each output is within the “Power Good” threshold with the card kept inserted and with PERST_IN# turned to
“High” level.
PERST#_DELAY
Delay during which the level at PERST# pin turns from Low to High may be set with a capacitor externally applied. The
delay time is determined by the regulated current (2 μA), the reference voltage (0.7 volts) inside the IC and the capacitance
of the capacitor externally applied. The delay time is specified as “at least 1 ms” in “ExpressCard Standard”. It does not
synchronize with PERST_IN#, and it synchronizes only with a “Power Good” output inside the IC. Turns to “Low” level
when SW is turned OFF.
OC
Turns its output to “Low” level if an overcurrent condition is detected. This open drain output may be pulled up to 3.6 volts
power supply via resistor.
OC-Delay
Delay during which the level at OC pin turns from High to Low may be set with a capacitor externally applied. The delay
time is determined by the regulated current (2 μA), the reference voltage (0.7 volts) inside the IC and the capacitance of the
capacitor externally applied. May be used to control with the OC status fed back to the system. If fed back to EN terminal
of this IC, it may be used to turn OFF the output that is provided when an overcurrent condition is detected.
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8/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Timing Chart
Power ON/OFF Status of ExpressCardTM
System Status
Primary
Auxiliary
OFF
OFF
ON
ON
ON
Power Switch Status
ExpressCARDTM Module Status
ON
Primary
Auxiliary(3.3V Aux)
Don’t Care
OFF
OFF
De-asserted
OFF
OFF
Asserted
ON
ON
De-asserted
OFF
OFF
Asserted Before This System Status
OFF
ON
Asserted After This System Status
OFF
OFF
ExpressCardTM States Transition Diagram
SYSR=L
CP#=L→H
SYSR=H⇔L
CP#=H
SYSR=H
CP#=H→L
SYSR=L
CP#=H⇔L
V3AUX=OFF
V15=V3=OFF
SYSR=L→H
CP#=L
V3AUX=ON
V15=V3=ON
SYSR=H→L
CP#=L
SYSR=H
CP#=L→H
SYSR=L→H
CP#=L
V3AUX=ON
V15=V3=OFF
SYSR=H→L
CP#=L
SYSR=L
CP#=L
⇔
SYSR=H
CP#=H
System Status
Card Status
Stand-by Status
:SYSR=L
CardAsserted Status
:CP#=L
ON Status
:SYSR=H
Card De-asserted Status
:CP#=H
From ON to Stand-by Status
:SYSR=H→L
From De-asserted to Asserted Status
:CP#=H→L
From Stand-by to ON Status
:SYSR=L→H
From Asserted to De-asserted Status
:CP#=L→H
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© 2010 ROHM Co., Ltd. All rights reserved.
9/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
■ BD4153FV Evaluation Board Circuit
U1
TP16 TP15
1
C2
TP1
4
TP2
5
C6a
6
C6
C3
TP21
VCC
R7
V3_AUXIN
C5
2
TP17
3
7
S2
R7a
TP4
TP18
C7
C8
R10a
TP6
S4
TP7
R11a
TP8
S5
R12a
TP3
8
9
10
11
12
S6
BD4153FV
24
VCAC
GND
V3_1
V3_IN2
V3_2
V3 IN1
V3AUX
SS_V3AUX
PERST#
PERST_IN#
V15 IN2
V15_1
V15 IN1
V15_2
SS_V15
SYSR
OC
CPUSB#
C24
R20
C23a
C21
TP11
C20
TP10
18
TP19
17
C17
16
C16
TP9
15
PERST#_DELAY
TP20
TP12
19
OC DELAY
CPPE#
S1
21
TP22
20
V3_AUXIN
C23
R23
23
TP13
22
EN
SS_V3
VCC
TP14
R24
14
13
C14
VCC
C13
R18 R15
VCC
R10 R11 R12
C10 C11 C12
■ BD4153FV Evaluation Board Application Components
Part No
Value
Company
Parts Name
Part No
Value
Company
Parts Name
U1
-
ROHM
BD4153FV
C6a
-
-
-
R7
10kΩ
ROHM
MCR03series
C7
-
-
-
R10
10kΩ
ROHM
MCR03series
C8
10μF
murata
GRM21 series
R10a
0Ω
ROHM
MCR03series
C10
-
-
-
R11
120kΩ
ROHM
MCR03series
C11
-
-
-
R11a
0Ω
ROHM
MCR03series
C12
-
-
-
R12
120kΩ
ROHM
MCR03series
C13
0.033μF
murata
GRM18 series
R12a
0Ω
ROHM
MCR03series
C14
0.22μF
murata
GRM21 series
R15
10kΩ
ROHM
MCR03series
C16
2200pF
murata
GRM18 series
R18
-
-
C17
1μF
murata
GRM21 series
R20
0Ω
ROHM
MCR03series
C20
0.1μF
murata
GRM18 series
R23
0Ω
ROHM
MCR03series
C21
1μF
murata
GRM21 series
R24
10Ω
ROHM
MCR03series
C23
0.1μF
murata
GRM18 series
C2
2200pF
murata
GRM18 series
C23a
-
-
-
C3
10μF
murata
GRM21 series
C24
0.1μF
murata
GRM18 series
C5
1μF
murata
GRM21 series
C6
0.01μF
murata
GRM18 series
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© 2010 ROHM Co., Ltd. All rights reserved.
10/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
■ BD4153FV Evaluation Board Layout
Silk Screen
TOP Layer
Mid Layer 1
Mid Layer 2
Bottom Layer
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© 2010 ROHM Co., Ltd. All rights reserved.
11/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Apprication Circuit (Circuit for ExpressCardTM Compliance Checklist)
BD4153FV
CPPE#(1)
CPUSB#(2)
3.3V(3)
3.3Vaux(4)
1.5V(5)
PERST#(6)
VCC(24pin)
CPPE#(11pin)
CPUSB#(12pin)
V3_IN(21,22pin)
3.3V(7)
V3(3,4pin)
V3AUX_IN(20pin)
3.3Vaux(8)
V3AUX(5pin)
V15_IN(17,18pin)
1.5V(9)
V15(8,9pin)
PERST_IN#(7pin)
PERST#(19pin)
SysReset#(10)
EN(23pin)
VCC
OC(15pin)
OC_Delay(14pin)
SYSR(10pin)
SS_V3(2pin)
SS_V3AUX(6pin)
PERST#_Delay(13pin)
SS_V15(16pin)
GND(1pin)
●About heat loss
In designing heat, operate the apparatus within the following conditions.
(Because the following temperatures are warranted temperature, be sure to take margin, etc. into account.)
1. Ambient temperature Ta shall be not more than 125°C.
2. Chip junction temperature Tj shall be not more than 150°C.
Chip junction temperature Tj can be considered under the following two cases.
①Chip junction temperature Tj is found from IC surface temperature TC under actual application conditions:Tj=TC+θj-c×W
<Reference value>
θj-c:SSOP-B24
33℃/W
HTSSOP-B24
36℃/W
②Chip junction temperature Tj is found from ambient temperature Ta:Tj=TC+θj-a×W
<Reference value>
θj-a:SSOP-B24
243.9℃/W (IC only)
147.1℃/W Single-layer substrate
(substrate surface copper foil area: less 3%)
θj-a:HTSSOP-B24 113.6℃/W Single-layer substrate
(substrate surface copper foil area: less 3%)
73.5℃/W Double-layer substrate
2
(substrate surface copper foil area:15×15mm )
44.6℃/W Double-layer substrate
2
(substrate surface copper foil area: 70×70mm )
31.3℃/W Fourth-layer substrate
2
(substrate surface copper foil area: 70×70mm )
Most of heat loss in BD4153FV occurs at the output switch. The power lost is determined by multiplying the on-resistance
by the square of output current of each switch. As BD4153EFV employs the power PKG, the thermal derating
characteristics significantly depends on the pc board conditions. When designing, care must be taken to the size of a pc
board to be used.
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© 2010 ROHM Co., Ltd. All rights reserved.
12/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Equivalent Circuit
2pin<SS_V3>
3,4pin<V3_1,V3_2>
VD
5pin<V3AUX>
V3_IN
SS_V3
6pin<SS_V3AUX>
V3AUX_IN SS_V3AUX
V3_IN
V3AUX
VCC
V3AUX_IN
7pin<PERST_IN#>
8,9pin<V15_1,V15_2>
VCC VCC
10pin<SYSR>
SS_V15
V15_IN
V15_IN
VCC
VCC
VCC
12pin<CPUSB#>
VCC
13pin<PERST#_DELAY>
VCC
VCC
16pin<SS_V15>
14pin<OC_DELAY>
VCC
VCC
17,18pin<V15_IN1,V15_IN2>
11pin<CPPE#>
VCC
VCC
15pin<OC>
VCC
19pin<PERST#>
20pin<V3AUX_IN>
VCC
VCC
V15
21,22pin<V3_IN1,V3_IN2>
23pin<EN >
VCC
V3AUX
24pin<VCC>
V3
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© 2010 ROHM Co., Ltd. All rights reserved.
13/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Note For Use
1.Absolute maximum ratings
For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working
temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed. Because
it is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the absolute
maximum rating, physical safety measures are requested to be taken, such as fuses, etc.
2.GND potential
Bring the GND terminal potential to the minimum potential in any operating condition.
3.Thermal design
Consider allowable loss (Pd) under actual working condition and carry out thermal design with sufficient margin provided.
4.Terminal-to-terminal short-circuit and erroneous mounting
When the present IC is mounted to a printed circuit board, take utmost care to direction of IC and displacement. In the
event that the IC is mounted erroneously, IC may be destroyed. In the event of short-circuit caused by foreign matter that
enters in a clearance between outputs or output and power-GND, the IC may be destroyed.
5.Operation in strong electromagnetic field
The use of the present IC in the strong electromagnetic field may result in maloperation, to which care must be taken.
6.Built-in thermal shutdown protection circuit
The present IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C
(standard value) and has a -15°C (standard value) hysteresis width. When the IC chip temperature rises and the TSD
circuit operates, the output terminal is brought to the OFF state. The built-in thermal shutdown protection circuit (TSD
circuit) is first and foremost intended for interrupt IC from thermal runaway, and is not intended to protect and warrant the
IC. Consequently, never attempt to continuously use the IC after this circuit is activated or to use the circuit with the
activation of the circuit premised.
7.Capacitor across output and GND
In the event a large capacitor is connected across output and GND, when Vcc and VIN are short-circuited with 0V or GND
for some kind of reasons, current charged in the capacitor flows into the output and may destroy the IC. Use a capacitor
smaller than 1000 μF between output and GND.
8.Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a
fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic
measures, provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore,
when the set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig
and be sure to turn OFF power supply to remove the jig.
9.IC terminal input
+
The present IC is a monolithic IC and has a P substrate and P isolation between elements.
With this P layer and N layer of each element, PN junction is formed, and when the potential relation is
GND>terminal A>terminal B, PN junction works as a diode, and
terminal B>GND terminal A, PN junction operates as a parasitic transistor.
The parasitic element is inevitably formed because of the IC construction. The operation of the parasitic element gives
rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take
utmost care not to use the IC to operate the parasitic element such as applying voltage lower than GND (P substrate) to
the input terminal.
Resistor
NPN Transistor Structure (NPN)
(PIN A)
(PIN B)
B
E
C
Parasitic diode
GND
N
P+
P+
P
P
P+
N
GND
(PIN B)
P+
N
N
N
P substrate
(PIN A)
N
Parasitic diode
GND
C
N
B
E
P substrate
Parasitic diode
GND
GND
Nearby other device
Parasitic diode
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© 2010 ROHM Co., Ltd. All rights reserved.
14/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
10. GND wiring pattern
If there are a small signal GND and a high current GND, it is recommended to separate the patterns for the high current
GND and the small signal GND and provide a proper grounding to the reference point of the set not to affect the voltage at
the small signal GND with the change in voltage due to resistance component of pattern wiring and high current. Also for
GND wiring pattern of component externally connected, pay special attention not to cause undesirable change to it.
11. Electrical characteristics
The electrical characteristics in the Specifications may vary depending on ambient temperature, power supply voltage,
circuit(s) externally applied, and/or other conditions. It is therefore requested to carefully check them including transient
characteristics.
12. Capacitors to be applied to the input terminals
The capacitors to be applied to the input terminals (VCC, V3_IN, V3AUX_IN and V15_IN) are used to lower the output
impedance of the power supply to be connected. An increase in the output impedance of the power supply may result in
destabilization of input voltages (VCC, V3_IN, V3AUX_IN and V15_IN). It is recommended to use a low ESR capacitor
with less temperature coefficient (change in capacitance vs. change in temperature), 0.1 μF more or less for VCC and
V3AUX_IN while 1 μF more or less for V3_IN and V15_IN, but it must be thoroughly checked at the temperature and with
the load of the range expected to use because it significantly depends on the characteristics of the input power supply to
be used and the conductor pattern of the pc board.
13. Capacitors to be applied to the output terminals
To the output terminals (V3, V3_AUX, and V15), the output capacitors should be connected between the respective output
terminal and GND. It is recommended to use a low ESR capacitor with less temperature coefficient, 1 μF more or less for
V3 and V15 terminals while 1μF more or less for V3_AUX, but it must be thoroughly checked at the temperature and with
the load of the range expected to use because it significantly depends on the temperature and the load conditions.
14. Not of a radiation-resistant design.
15. .Allowable loss Pd
With respect to the allowable loss, the thermal derating characteristics are shown in the Exhibit, which we hope would be
used as a good-rule-of-thumb. Should the IC be used in such a manner to exceed the allowable loss, reduction of current
capacity due to chip temperature rise, and other degraded properties inherent to the IC would result. You are strongly
urged to use the IC within the allowable loss.
16. In the event that load containing a large inductance component is connected to the output terminal, and generation of
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.
OUTPUT PIN
17. Operating ranges
If it is within the operating ranges, certain circuit functions and operations are warranted in the working ambient
temperature range. With respect to characteristic values, it is unable to warrant standard values of electric
characteristics but there are no sudden variations in characteristic values within these ranges.
18. We are certain that examples of applied circuit diagrams are recommendable, but you are requested to thoroughly confirm
the characteristics before using the IC.In addition, when the IC is used with the external circuit changed, decide the IC with
sufficient margin providedwhile consideration is being given not only to static characteristics but also variations of external
parts and our IC including transient
19. Wiring to the input terminals (V3 IN, V3AUX IN, and V15 IN) and output terminals (V3, V3AUX and V15) of built-in FET
should be carried out with special care. Unnecessarily long and/or thin conductors used in wiring may result in
degradation of characteristics including decrease in output voltage.
20. Heatsink
Heatsink is connected to SUB, which should be short-circuited to GND. Solder the heatsink to a pc board properly, which
offers lower thermal resistance.
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© 2010 ROHM Co., Ltd. All rights reserved.
15/17
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Power Dissipation
◎BD4153FV
◎BD4153EFV
[W]
[W]
1.4
5
Mounted on board
70mm×70mm×1.6mm Glass-epoxy PCB
θj-a=122.0℃/W
1.2
measure:TH-156(Kuwano-Denki)
measure condition:Rohm Standard Board
PCB size:70mm×70mm×1.6mmt
(PCB with Thermal Via)
④4.0W
4
1.025W
PCB①:Single-layer substrate
(substrate surface copper foil area:0mm×0mm)
PCB②:Double-layer substrate
(substrate surface copper foil area:15mm×15mm)
PCB③:Double-layer substrate
(substrate surface copper foil area:70mm×70mm)
PCB④:Fourth-layer substrate
(substrate surface copper foil area:70mm×70mm)
Without heat sink.
θj-a=158.7℃/W
0.787W
0.8
Power Dissipation (Pd)
Power Dissipation (Pd)
1.0
0.6
100℃
0.4
0.2
3
③2.8W
2
PCB①:θja=113.6℃/W
PCB②:θja=43.5℃/W
PCB③:θja=44.6℃/W
PCB④:θja=31.3℃/W
②1.7W
①1.1W
1
0
0
25
50
75
100
125
Ambient Temperature (Ta)
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© 2010 ROHM Co., Ltd. All rights reserved.
150
[℃]
0
25
50
75
100
125
Ambient Temperature (Ta)
16/17
150
[℃]
2010.04 - Rev.B
BD4153FV,BD4153EFV
Technical Note
●Ordering part number
B
D
4
Part Number
1
5
3
F
Part Number
V
-
Package
FV : SSOP-B24
EFV : HTSSOP-B24
E
2
Packaging and forming specification
E2: Embossed tape and reel
(SSOP-B24/ HTSSOP-B24)
SSOP-B24
<Tape and Reel information>
7.8 ± 0.2
(MAX 8.15 include BURR)
13
Tape
Embossed carrier tape
Quantity
2000pcs
Direction
of feed
0.3Min.
5.6 ± 0.2
7.6 ± 0.3
24
1
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
12
0.1
1.15 ± 0.1
0.15 ± 0.1
0.1
0.65
0.22 ± 0.1
1pin
Reel
(Unit : mm)
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
HTSSOP-B24
<Tape and Reel information>
7.8±0.1
(MAX 8.15 include BURR)
(5.0)
0.325
1.0±0.2
0.53±0.15
(3.4)
1
Tape
Embossed carrier tape (with dry pack)
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
12
1PIN MARK
+0.05
0.17 -0.03
S
0.08±0.05
0.85±0.05
1.0MAX
13
5.6±0.1
7.6±0.2
24
+6°
4° −4°
0.65
0.08 S
+0.05
0.24 -0.04
0.08
1pin
M
Reel
(Unit : mm)
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© 2010 ROHM Co., Ltd. All rights reserved.
17/17
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2010.04 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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© 2010 ROHM Co., Ltd. All rights reserved.
R1010A