ISL55016 ® Data Sheet June 24, 2008 FN6526.1 MMIC Silicon Bipolar Differential Amplifier Features The ISL55016 is a high performance gain block which can match a 75Ω single-ended source to a 100Ω differential load. This feature makes the ISL55016 ideal for a wide range of general-purpose applications such as Satellite TV. The ISL55016 can be used as single-ended to differential converter and eliminates the need for an external balun structure. • Input Impedance of 75Ω Single-Ended PART MARKING ISL55016IRTZ-T7* M9 • Noise Figure of 5.4dB • OIP3 of 26dBm • Input Return Loss of 27dB • Pb-Free (RoHS Compliant) Ordering Information PART NUMBER (Note) • Output Impedance of 100Ω Differential TEMP. RANGE (°C) Applications PACKAGE (Pb-Free) PKG. DWG. # -40 to +85 6 Ld TDFN L6.1.6x1.6B *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. • Active Balun Function • LNB and LNB-T (HDTV) Amplifiers • IF Gain Blocks for Satellite and Terrestrial STBs • PA Driver Amplifier • Wireless Data, Satellite • Bluetooth/WiFi • Satellite Locator and Signal Strength Meters Typical Application Circuit Pinout +5V ISL55016 (6 LD TDFN) TOP VIEW VSM 1 VINM 2 27Ω 6 VSP GND 5 VOM 0.1µF 100nH 100pF VINP 3 4 VOP 2 Pin Descriptions 100pF 100pF PIN NUMBER PIN NAME 1 VSM Ground 2 VINM Single-Ended Input. VINM should be AC-Coupled. 3 VINP AC Ground 4, 5 6 27Ω 3 6 5 1 4 100nH 100pF 100pF DESCRIPTION VOP, VOM Differential outputs. VOP and VOM should be AC-Coupled. Differential Impedance 100Ω. VSP Power supply. +5V 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL55016 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VSP to GND . . . . . . . . . . . . . . . . . . . . . . 5.75V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to GND -0.3V ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V Thermal Resistance (Typical, Note 1) θJA (°C/W) 6 Ld TDFN Package. . . . . . . . . . . . . . . . . . . . . . . . . 125 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. Electrical Specifications PARAMETER VSP = +5V, ZRSC = 50Ω single-ended connected to VINM, ZLOAD = 100Ω differential across VOM and VOP, VINP AC-grounded, TA = +25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT VSP Supply Voltage 4.5 5.0 5.5 V I_VSP Operating Current 91 104 117 mA Sds21_diff Small Signal Gain, Differential Ssd12_diff Sss11_SE Sdd22_diff S21_SE S31_SE P1dB_diff OIP3_4_SE OIP3_5_SE Reverse Isolation, Differential Input Return Loss, Single-Ended Output Return Loss, Differential Gain of Pin VOP, Single-Ended Gain of Pin VOM, Single-Ended 50MHz ZRSC = 75Ω, ZLOAD = 100Ω 17.5 dB 1.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 17.1 dB 2.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 15.5 dB 50MHz ZRSC = 75Ω, ZLOAD = 100Ω 28.4 dB 1.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 30.2 dB 2.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 36.3 dB 50MHz ZRSC = 75Ω, ZLOAD = 100Ω 27.1 dB 1.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 15.1 dB 2.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 6.9 dB 50MHz ZRSC = 75Ω, ZLOAD = 100Ω 17.4 dB 1.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 10.6 dB 2.0GHz ZRSC = 75Ω, ZLOAD = 100Ω 5.6 dB 50MHz 13.2 14.5 15.7 dB 1.0GHz 12.9 14.0 15.4 dB 2.0GHz 12.0 12.9 14.5 dB 50MHz 12.9 14.1 15.4 dB 1.0GHz 12.4 13.5 14.9 dB 2.0GHz 11.3 12.1 13.8 dB Output Power at 1dB Compression Point, 50MHz, (Note 2) Differential 1.0GHz, (Note 2) 15 17.2 19 dBm 13.9 15.8 17.9 dBm 2.0GHz, (Note 2) 10.4 12.0 14.4 dBm f1 = 50MHz, f2 = 55MHz 22.7 27.5 32.7 dBm f1 = 1.0GHz, f2 = 1.1GHz 22.1 24.2 29.1 dBm f1 = 2.0GHz, f2 = 2.1GHz 16.2 18.1 22.2 dBm f1 = 50MHz, f2 = 55MHz 22.6 26.6 32.6 dBm f1 = 1.0GHz, f2 = 1.1GHz 21.9 23.6 27.9 dBm f1 = 2.0GHz, f2 = 2.1GHz 14.9 17.3 21.4 dBm Output Third Order Intercept Point at VOP Pin, Single-Ended Output Third Order Intercept Point at VOM Pin, Single-Ended 2 FN6526.1 June 24, 2008 ISL55016 Electrical Specifications PARAMETER OIP3_diff OIP2_diff VSP = +5V, ZRSC = 50Ω single-ended connected to VINM, ZLOAD = 100Ω differential across VOM and VOP, VINP AC-grounded, TA = +25°C, unless otherwise specified. (Continued) DESCRIPTION Output Third Order Intercept Point, Differential Output Second Order Intercept Point, Differential CONDITIONS MIN TYP MAX UNIT f1 = 50MHz, f2 = 55MHz 29.1 dBm f1 = 1.0GHz, f2 = 1.1GHz 26.2 dBm f1 = 2.0GHz, f2 = 2.1GHz 20.2 dBm f1 = 50MHz, f2 = 55MHz, IM2 @105MHz 54.5 dBm f1 = 1.0GHz, f2 = 1.1GHz, IM2 @ 2.1GHz 58.6 dBm f1 = 2.0GHz, f2 = 2.1GHz, IM2 @ 4.1GHz 61.7 dBm BW_diff 3dB Bandwidth, Differential 3dB below Gain @ 50MHz 2.2 GHz NF_diff Noise Figure, Differential 1.0GHz 5.4 dB FREQ Frequency Range 0.05 3 GHz NOTE: 2. The numbers are derived from the single-ended results. 3 FN6526.1 June 24, 2008 ISL55016 ZRSC = 75Ω, ZLOAD = 100Ω Differential, ZLOAD = 25Ω. Common 18 0 17 -2 16 -4 15 -6 dB dB Typical Performance (I) 14 -8 13 -10 12 -12 11 -14 10 0 0.5G 1.0G 1.5G 2.0G 2.5G -16 0 3.0G 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 2. |Scs21| vs FREQUENCY FIGURE 1. |Sds21| vs FREQUENCY 0 0 -2 -5 -4 -6 -10 dB dB -8 -15 -10 -12 -20 -14 -16 -25 -18 -30 0 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) -20 0 0.5G 1.0G 1.5G 2.0G FREQUENCY (Hz) 2.5G 3.0G FIGURE 4. |Sdd22| vs INPUT POWER FIGURE 3. |S11| vs FREQUENCY -20 -25 Ssc12 dB -30 -35 Sdd22 -40 S11 Ssd12 -45 0 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) FIGURE 5. |Ssd12| AND |Ssc12| vs FREQUENCY 4 FIGURE 6. SMITH CHART OF S11 AND Sdd22 FN6526.1 June 24, 2008 ISL55016 Typical Performance (II) 50Ω Environment, ZRSC = 50Ω, ZLOAD Port 2 = 50Ω, ZLOAD Port 3 = 50Ω; Measured on Probe Station. 15 14 14 13 13 dB dB 15 12 12 11 11 10 10 0 0.5G 2.0G 1.0G 1.5G FREQUENCY (Hz) 2.5G 3.0G 0 0.5G 1.0G 1.5G 2.0G FREQUENCY (Hz) 2.5G 3.0G FIGURE 8. |S31| vs FREQUENCY FIGURE 7. |S21| vs FREQUENCY 0 -2 dB -4 -6 -8 -10 -12 -14 0 0.5G 1.0G 1.5G 2.0G FREQUENCY (Hz) 2.5G 3.0G FIGURE 9. |S11| vs FREQUENCY FIGURE 10. SMITH CHART OF S11 0 -2 -4 dB -6 -8 -10 -12 -14 -16 -18 0 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) FIGURE 11. |S22| vs FREQUENCY 5 FIGURE 12. SMITH CHART OF S22 FN6526.1 June 24, 2008 ISL55016 Typical Performance (III) 50Ω Environment, ZRSC = 50Ω, ZLOAD Port 2 = 50Ω, ZLOAD Port 3 = 50Ω, Measured on Probe Station 0 -2 dB -4 -6 -8 -10 -12 0 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) FIGURE 14. SMITH CHART OF S33 FIGURE 13. |S33| vs FREQUENCY 16 10 14 0 12 PIN 4 PIN 5 -20 8 6 -30 -40 4 IM3 (900MHz) -50 2 0 FUNDAMENTAL (1GHz AND 1.1GHz) -10 dBm dBm 10 0 500M 1G FREQUENCY (Hz) 1.5G -60 -16 2.0G -15 -14 IM3 (1.2GHz) -13 -12 -11 -10 INPUT POWER (dBm) -8 FIGURE 16. IM3 OF PIN 4 vs INPUT POWER FIGURE 15. 1dB COMPRESSION POINT vs FREQUENCY 10 30 0 25 FUNDAMENTAL (1GHz AND 1.1GHz) PIN 4 -10 20 -20 dBm dBm -9 -30 -40 PIN 5 15 10 IM3 (900MHz) IM3 (1.2GHz) -50 5 -60 -16 -15 -14 -13 -12 -11 INPUT POWER (dBm) -10 -9 FIGURE 17. IM3 OF PIN 5 vs INPUT POWER 6 -8 0 0 500M 1G FREQUENCY (Hz) 1.5G 2.0G FIGURE 18. OIP3 vs FREQUENCY FN6526.1 June 24, 2008 ISL55016 Typical Performance (IV) 50Ω Environment, ZRSC = 50Ω, ZLOAD Port 2 = 50Ω, ZLOAD Port 3 = 50Ω, Measured on Probe Station 10 10 0 0 FUNDAMENTAL (1GHz AND 1.1GHz) dBm dBm FUNDAMENTAL (1GHz AND 1.1GHz) -10 -10 -20 -30 -20 -30 -40 IM2 (2.1GHz) IM2 (2.1GHz) -40 -50 -50 -16 -15 -14 -13 -12 -11 INPUT POWER (dBm) -10 -9 -60 -16 -8 -15 -14 -13 -12 -11 INPUT POWER (dBm) -10 -9 -8 FIGURE 20. IM2 OF PIN 5 vs INPUT POWER FIGURE 19. IM2 OF PIN 4 vs INPUT POWER 60 70 PIN 5 60 50 40 PIN 4 dBm dBm PIN 5 50 30 40 PIN 4 30 20 20 VPIN 4 = +4V 10 VPIN 4 = +5V 10 VPIN 5 = +4V 0 0 500M 1G FREQUENCY (Hz) 1.5G 0 2.0G VPIN 5 = +5V 0 FIGURE 21. OIP2 vs FREQUENCY 500M 1G FREQUENCY (Hz) 1.5G 2.0G FIGURE 22. OIP2 vs FREQUENCY Typical Performance (V) 50Ω Environment, ZRSC = 50Ω, ZLOAD Port 2 = 50Ω, ZLOAD Port 3 = 50Ω, Measured on Evaluation Board. 18 -26 17 -28 0Ω 16 -30 27Ω 14 dB dB 15 27Ω -34 13 12 -36 11 -38 10 0Ω -32 0 500M 1G FREQUENCY (Hz) 1.5G FIGURE 23. |Sds21| vs FREQUENCY 7 2.0G -40 0 500M 1G FREQUENCY (Hz) 1.5G 2.0G FIGURE 24. |Sds12| vs FREQUENCY FN6526.1 June 24, 2008 ISL55016 Typical Performance (V) 50Ω Environment, ZRSC = 50Ω, ZLOAD Port 2 = 50Ω, ZLOAD Port 3 = 50Ω, Measured on Evaluation Board. (Continued) 70 18 0Ω 16 60 14 50 27Ω 12 27Ω dBm 10 dBm 0Ω 8 6 40 30 20 4 10 2 0 0 0 500M 1G FREQUENCY (Hz) 1.5G 2.0G FIGURE 25. DIFFERENTIAL P1dB vs FREQUENCY 12 35 10 30 1G FREQUENCY (Hz) 1.5G 2.0G 0Ω 25 dBm 6 20 10 2 5 0 0 500M 1G 1.5G 2.0G FREQUENCY (Hz) 2.5G 3.0G FIGURE 27. NOISE FIGURE vs FREQUENCY Applications Information Product Description 27Ω 15 4 0 500M FIGURE 26. DIFFERENTIAL OIP2 vs FREQUENCY 8 dB 0 0 500M 1G FREQUENCY (Hz) The ISL55016 can be used as differential-in and differentialout as well since pin 2 and pin 3 are equivalent, balanced inputs. +5V C6 C3 1 Typical Application Circuit The ISL55016 can configured so that it is driven with a single-ended input. If either pin 2 or pin 3 is used as a single-ended input, the other needs to be connected to an AC ground. The input is internally matched to 75Ω single-ended and the output is matched to 50Ω single-ended or 100Ω differential. 8 2.0G FIGURE 28. DIFFERENTIAL OIP3 vs FREQUENCY The ISL55016 Silicon Bipolar amplifier can match a 75Ω single-ended source to a 100Ω differential load. This feature makes the ISL55016 ideal for a wide range of general purpose applications, such as Satellite TV. ISL55016 is a true differential amplifier. Figure 29 shows the Typical Application Circuit of ISL55016. Pins 2 and 3 are equivalent. 1.5G 6 R2 R1 RF IN 1 ISL55016 2 RF Out 2 L2 5 C5 C1 L1 RF IN 2 3 C2 RF Out 1 4 C4 FIGURE 29. APPLICATION CIRCUIT Balun Function In many applications of ISL55012, the amplifier will be followed with a Balun structure to transfer the single-ended signal to a differential tuner. The ISL55016 will eliminate the need for an external balun structure and provide significant savings in BOM cost and PCB real-estate (see Figure 30). FN6526.1 June 24, 2008 ISL55016 GND L L RF IN C C ISL55012 C C C DIFFERENTIAL OUT C R C L BALUN C VDD C VDD VDD C L GND RF IN R DIFFERENTIAL OUT C C C C ISL55016 L R VDD FIGURE 30. COMPARISON OF ISL55012 WITH A BALUN AND ISL55016 (RELATIVE SIZE) VDD Ω 100ٛ ٛ 50Ω RF OUT C3 Ω 100ٛ L2 C2 L1 Ω 100ٛ C1 50Ω ٛ 75ٛΩ RF IN RF OUT 50ٛΩ FIGURE 31. PCB LAYOUT OF MATCHING NETWORK Trade-off Between Power and OIP2 Matching at the Input and Output The values of R1 and R2 (Figure 29) have two options; 27Ω and 0Ω. Decreasing the R1 and R2 value will increase the voltage across the output transistor leading to an increase in the dissipation power. At the same time, it will increase the amplitude of the compression, OIP2 and OIP3. Figures 21, 22 and 26 show this effect on OIP2. Figure 25 shows the compression point changed with different resistors. Figure 28 shows the OIP3 changed with different resistors. One needs to trade-off between the power dissipation and higher OIP2. In the PCB Layout Design, a matching network is needed, especially at the input. Figure 31 shows the matching network used for the ISL55016 Evaluation Board. 12mm 100Ω trace and 6mm 50Ω trace are used to form the input matching network and 4mm 100Ω trace to form the output matching network on the FR4 material. 9 In Figure 31, the S11 is improved at 2GHz with the matching network, to less than -10dB. FN6526.1 June 24, 2008 ISL55016 TABLE 2. LIST OF COMPONENTS (300MHz~3GHz) 0 -5 FREQUENCY BAND VALUE DESCRIPTION/ DIMENSIONS C1, C2 100pF 0603 C4, C5 100pF 0603 L1, L2 100nH Surface Mount/0402 C3 100pF 0603 C6 0.1µF 1206 R1, R2 27Ω/0Ω 0402 dB -10 EVAL BOARD WITH MATCHING NETWORK -15 -20 -25 -30 PROBE STATION 0 0.5G 1.0G 1.5G 2.0G 2.5G 3.0G FREQUENCY (Hz) FIGURE 32. |S11| vs FREQUENCY Thermal Management Evaluation Board Setup The power dissipation of ISL55016 is about 500mW. The recommended layout is shown in Figure 31. The ground pad should be placed under the bottom of the device. At least two thermal vias are needed to lower the temperature. The Evaluation board is designed to connect directly to the 2-way 180° Power combiner to recombine signals from -2GHz and allow single-ended assessment with good phase matching the two differential signals into one single-ended output. For lower frequencies, a different choice of power combiner is needed and short matched coaxial cables should be used to connect to the combiner. This setup is used on noise figure measurement and differential OIP2/OIP3 measurements. Choices of Components ISL55016 is designed for wide bandwidth applications, from 50MHz to 3GHz. The decoupling and RF choke components should be chosen carefully for different frequency applications. Tables 1 and 2 list the components used on the evaluation board. +5V C6 TABLE 1. LIST OF COMPONENTS (50MHz~300MHz) FREQUENCY BAND VALUE DESCRIPTION/ DIMENSIONS C1, C2 2200pF 0603 C4, C5 2200pF 0603 C3 1 6 ISL55016 RFIN C1 2 R1 R2 L2 RFOUT C5 L1 L1, L2 2.2µH Multilayer Ferrite/0603 C3 1nF 0603 C6 0.1µF 1206 R1, R2 27Ω/0Ω 0402 3 C2 4 DIFFERENTIAL SIGNAL 180° OUTPUT POWER s COMBINER 1 5 RF C4 2 FIGURE 33. EVALUATION BOARD WITH 2-WAY 180° POWER COMBINER All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN6526.1 June 24, 2008 ISL55016 Package Outline Drawing L6.1.6x1.6B 6 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (TDFN) Rev 1, 03/07 0.60 1.60 R 0.20 A 6 PIN #1 INDEX AREA B 6 PIN 1 INDEX AREA 0.50BSC 1.60 1.00 (4X) 0.15 1.00 6X 0.25 0.10 M C A B 6X 0.24 1.12 TOP VIEW BOTTOM VIEW SEE DETAIL "X" 0.75 0.10 C C BASE PLANE (6X 0.6) SEATING PLANE 0.08 C 0.000-0.50 SIDE VIEW 0.50 1.00 C 0.60 5 0 . 00 MIN. 0 . 05 MAX. ( 6 X 0 . 25 ) DETAIL "X" 1.12 TYPICAL RECOMMENDED LAND PATTERN 0 . 2 REF NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSEY14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ¬± 0.0 4. Dimension b applies to the metallized terminal and is measured between 0.20mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 11 FN6526.1 June 24, 2008