TI OPA1632DG4

OPA1632
SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
High-Performance, Fully-Differential
AUDIO OP AMP
FEATURES
DESCRIPTION
D
D
D
D
SUPERIOR SOUND QUALITY
ULTRA LOW DISTORTION: 0.000022%
LOW NOISE: 1.3nV/√Hz
HIGH SPEED:
D
− Slew Rate: 50V/µs
− Gain Bandwidth: 180MHz
FULLY DIFFERENTIAL ARCHITECTURE:
− Balanced Input and Output Converts
Single-Ended Input to Balanced
The OPA1632 is a fully-differential amplifier designed
for driving high-performance audio analog-to-digital
converters (ADCs). It provides the highest audio quality,
with very low noise and output drive characteristics
optimized for this application. The OPA1632’s excellent
gain bandwidth of 180MHz and very fast slew rate of
50V/µs produce exceptionally low distortion. Very low
input noise of 1.3nV/√Hz further ensures maximum
signal-to-noise ratio and dynamic range.
Differential Output
D WIDE SUPPLY RANGE: ±2.5V to ±16V
D SHUTDOWN TO CONSERVE POWER
APPLICATIONS
D
D
D
D
D
AUDIO ADC DRIVER
BALANCED LINE DRIVER
BALANCED RECEIVER
ACTIVE FILTER
PREAMPLIFIER
The flexibility of the fully differential architecture allows
for easy implementation of a single-ended to
fully-differential output conversion. Differential output
reduces even-order harmonics and minimizes
common-mode noise interference. The OPA1632
provides excellent performance when used to drive
high-performance audio ADCs such as the PCM1804.
A shutdown feature also enhances the flexibility of this
amplifier.
The OPA1632 is available in an SO-8 package and a
thermally-enhanced MSOP-8 PowerPAD package.
RELATED DEVICES
OPAx134
High-Performance Audio Amplifiers
OPA627/637
Precision High-Speed DiFET Amplifiers
OPAx227/x228
Low-Noise Bipolar Amplifiers
THD + NOISE vs FREQUENCY
0.001
Gain = +1
RF = 348Ω
VO = 3Vrms
Differential I/O
VIN+
Digital
Output
VIN−
VOCM
VIN−
VIN+
VCOM
−15V
THD + Noise (%)
+15V
0.0001
RL = 600Ω
RL = 2kΩ
0.00001
10
Typical ADC Circuit
100
1000
10k
100k
Frequency (Hz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
Copyright  2003−2006, Texas Instruments Incorporated
! ! www.ti.com
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DRAWING
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
SO-8
D
−40°C to +85°C
OPA1632
MSOP-8
PowerPAD
DGN
−40°C to +85°C
1632
ORDERING
NUMBER
OPA1632
TRANSPORT
MEDIA, QUANTITY
OPA1632D
Rails, 100
OPA1632DR
Tape and Reel, 2500
OPA1632DGN
Rails, 100
OPA1632DGNR
Tape and Reel, 2500
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)(2)
over operating free-air temperature range unless otherwise noted.
Supply Voltage, ±VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5V
Input Voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150mA
Differential Input Voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3V
Maximum Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Operating Free-Air Temperature Range . . . . . . . . . . . . . . . −40°C to +85°C
Storage Temperature Range, TSTG . . . . . . . . . . . . . . . . . −65°C to +150°C
ESD Ratings: Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Charge Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) The OPA1632 MSOP-8 package version incorporates a
PowerPAD on the underside of the chip. This acts as a heatsink
and must be connected to a thermally dissipative plane for proper
power dissipation. Failure to do so may result in exceeding the
maximum junction temperature, which can permanently damage
the device. See TI technical brief SLMA002 for more information
about using the PowerPAD thermally enhanced package.
2
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PIN CONFIGURATION
Top View
MSOP, SO
OPA1632
1
8
VIN+
VOCM
2
7
Enable
V+
3
6
V−
VOUT+
4
5
VOUT−
VIN−
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
ELECTRICAL CHARACTERISTICS: VS = ±15V
VS = ±15V: RF = 390Ω, RL = 800Ω, and G = +1, unless otherwise noted.
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
vs Power Supply, DC
INPUT BIAS CURRENT
Input Bias Current
Input Offset Current
CONDITIONS
dVos/dT
PSRR
MIN
316
IB
IOS
NOISE
Input Voltage Noise
Input Current Noise
f = 10 kHz
f = 10 kHz
INPUT VOLTAGE
Common-Mode Input Range
Common-Mode Rejection Ratio, DC
INPUT IMPEDANCE
Input Impedance (each input pin)
66
FREQUENCY RESPONSE
Small-Signal Bandwidth
(VO = 100mVPP, Peaking < 0.5 dB)
G = +1, RF= 348Ω
G = +2, RF = 602Ω
G = +5, RF = 1.5kΩ
G = +10, RF = 3.01kΩ
G = +1, VO = 100mVPP
VO = 100mVPP
G = +2, VO = 20VPP
G = +1
G = +1, VO = 5V Step
G = +1, VO = 2V Step
G = +1, VO = 2V Step
G = +1, f = 1kHz, VO = 3Vrms
RL = 600Ω
RL = 2kΩ
RL = 600Ω
RL = 2kΩ
G = +1, SMPTE/DIN, VO = 2VPP
RL = 600Ω
RL = 2kΩ
RL = 600Ω
RL = 2kΩ
THD < 0.01%, RL = 2kΩ
Bandwidth for 0.1dB Flatness
Peaking at a Gain of 1
Large-Signal Bandwidth
Slew Rate (25% to 75% )
Rise and Fall Time
Settling Time to 0.1%
0.01%
Total Harmonic Distortion + Noise
Differential Input/Output
Differential Input/Output
Single-Ended In/Differential Out
Single-Ended In/Differential Out
Intermodulation Distortion
Differential Input/Output
Differential Input/Output
Single-Ended In/Differential Out
Single-Ended In/Differential Out
Headroom
OUTPUT
Voltage Output Swing
Short-Circuit Current
Closed-Loop Output Impedance
POWER-DOWN(1)
ISC
Enable Voltage Threshold
Disable Voltage Threshold
Shutdown Current
Turn-On Delay
Turn-Off Delay
POWER SUPPLY
Specified Operating Voltage
Operating Voltage
Quiescent Current
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
RL = 2kΩ
RL = 800Ω
Sourcing/Sinking
G = +1, f = 100kHz
MAX
UNITS
±0.5
±5
13
±3
mV
µV/_C
µV/V
2
±100
6
±500
µA
nA
1.3
0.4
(V−) + 1.5
74
OPEN-LOOP GAIN
Open-Loop Gain , DC
OPA1632
TYP
(V+) − 1.9
(V+) − 4.5
+50/−60
VENABLE = −15V
Time for IQ to Reach 50%
Time for IQ to Reach 50%
nV/√Hz
pA/√Hz
90
(V+) − 1
V
dB
34 || 4
MΩ || pF
78
dB
180
90
36
18
40
0.5
800
50
100
75
200
MHz
MHz
MHz
MHz
MHz
dB
kHz
V/µs
ns
ns
ns
0.0003
0.000022
0.000059
0.000043
%
%
%
%
0.00008
0.00005
0.0001
0.0007
20.0
%
%
%
%
VPP
(V−) + 1.9
(V−) + 4.5
85
0.3
V
V
mA
Ω
(V−) + 2
(V−) + 0.8
0.85
2
2
1.5
V
V
mA
µs
µs
±15
±16
14
17.1
±2.5
IQ
Per Channel
−40
−40
−65
qJA
+85
+125
+150
200
V
V
mA
_C
_C
_C
_C/W
(1) Amplifier has internal 50kΩ pull-up resistor to VCC+ pin. This enables the amplifier with no connection to shutdown pin.
3
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
THD + NOISE vs FREQUENCY
THD + NOISE vs FREQUENCY
0.001
0.001
THD + Noise (%)
THD + Noise (%)
Gain = +1
RF = 348Ω
VO = 3Vrms
Differential I/O
0.0001
RL = 600Ω
Gain = +1
RF = 348Ω
VO = 3Vrms
Single−Ended Input
Differential Output
0.0001
RL = 600Ω
RL = 2kΩ
RL = 2kΩ
0.00001
0.00001
10
100
1k
10k
100k
10
100
Frequency (Hz)
THD + NOISE vs OUTPUT VOLTAGE
RL = 2kΩ
IMD (%)
0.00001
0.01
0.1
1
10
0.001
RL = 600Ω
0.0001
Gain = +1
RF = 348Ω
f = 1kHz
Single−Ended Input
Differential Output
0.00001
0.01
0.1
RL = 2kΩ
1
10
Differential Output Voltage (Vrms)
Differential Output Voltage (Vrms)
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
0.1
0.1
0.01
0.01
RL = 600Ω
0.001
Gain = +1
RF = 348Ω
Differential I/O
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
0.01
0.1
R L = 2kΩ
0.00001
1
10
100
100
RL = 600Ω
0.001
0.0001
Differential Output Voltage (VPP )
4
100
THD + Noise (%)
RL = 600Ω
IMD (%)
THD + Noise (%)
Gain = +1
RF = 348Ω
f = 1kHz
Differential I/O
0.0001
0.00001
100k
0.01
0.001
0.0001
10k
THD + NOISE vs OUTPUT VOLTAGE
0.1
0.01
1k
Frequency (Hz)
Gain = +1
RF = 348Ω
Single−Ended Input
Differential Output
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
0.01
0.1
RL = 2kΩ
1
10
Differential Output Voltage (VPP )
100
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
CURRENT NOISE vs FREQUENCY
VOLTAGE NOISE vs FREQUENCY
10
In (pA/√Hz)
Vn (nV/√Hz)
10
1
1
0.1
10
100
1k
10k
10
100k
100
OUTPUT VOLTAGE
vs DIFFERENTIAL LOAD RESISTANCE
100
VCC = ±15V
VCC = ±5V
5
VO (V)
Output Impedance (Ω)
10
0
VCC = ±5V
−5
−10
100k
100M
1G
VCC = ±5V
10
1
VCC = ±15V
−15
100
10k
OUTPUT IMPEDANCE
vs FREQUENCY
15
RF = 1kΩ
G = +2
1k
Frequency (Hz)
Frequency (Hz)
0.1
1k
10k
RL (Ω)
100k
100k
1M
10M
Frequency (Hz)
5
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
APPLICATIONS INFORMATION
changing the values of R1 and R2. The feedback resistor
values (R3 and R4) should be kept relatively low, as
indicated, for best noise performance.
Figure 1 shows the OPA1632 used as a differential-output
driver for the PCM1804 high-performance audio ADC.
R5, R6, and C3 provide an input filter and charge glitch
reservoir for the ADC. The values shown are generally
satisfactory. Some adjustment of the values may help
optimize performance with different ADCs.
Supply voltages of ±15V are commonly used for the
OPA1632. The relatively low input voltage swing required
by the ADC allows use of lower power-supply voltage, if
desired. Power supplies as low as ±8V can be used in this
application with excellent performance. This reduces
power dissipation and heat rise. Power supplies should be
bypassed with 10µF tantalum capacitors in parallel with
0.1µF ceramic capacitors to avoid possible oscillations
and instability.
It is important to maintain accurate resistor matching on
R1/R2 and R3/R4 to achieve good differential signal
balance. Use 1% resistors for highest performance. When
connected for single-ended inputs (inverting input
grounded, as shown in Figure 1), the source impedance
must be low. Differential input sources must have
well-balanced or low source impedance.
The VCOM reference voltage output on the PCM1804 ADC
provides the proper input common-mode reference
voltage (2.5V). This VCOM voltage is buffered with op amp
A2 and drives the output common-mode voltage pin of the
OPA1632. This biases the average output voltage of the
OPA1632 to 2.5V.
Capacitors C1, C2, and C3 should be chosen carefully for
good distortion performance. Polystyrene, polypropylene,
NPO ceramic, and mica types are generally excellent.
Polyester and high-K ceramic types such as Z5U can
create distortion.
The signal gain of the circuit is generally set to
approximately 0.25 to be compatible with commonly-used
audio line levels. Gain can be adjusted, if necessary, by
V+
+8V to +16V
10µF
+
0.1µF
R3
270Ω
C1
1nF
R1
1kΩ
Balanced or +
Single−Ended
Input −
R2
1kΩ
3
8
VOCM
R5
40Ω
5
C3
2.7nF
2 OPA1632
1
6
7
4
R6
40Ω
C2
1nF
VCOM
(2.5V)
R4
270Ω
Enable(1)
OPA134
1kΩ
0.1µF
NOTE: (1) Leave open to enable.
Logic signals referenced to V− supply.
See the Shutdown Function section.
0.1µF
10µF
+
−8V to −16V
V−
Figure 1. ADC Driver for Professional Audio
6
1/2
PCM1804
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
FULLY-DIFFERENTIAL AMPLIFIERS
Differential signal processing offers a number of
performance advantages in high-speed analog signal
processing systems, including immunity to external
common-mode noise, suppression of even-order
nonlinearities, and increased dynamic range. Fully-differential amplifiers not only serve as the primary means
of providing gain to a differential signal chain, but also
provide a monolithic solution for converting single-ended signals into differential signals allowing for easy,
high-performance processing.
A standard configuration for the device is shown in
Figure 2. The functionality of a fully differential amplifier
can be imagined as two inverting amplifiers that share
a common noninverting terminal (though the voltage is
not necessarily fixed). For more information on the
basic theory of operation for fully differential amplifiers,
refer to the Texas Instruments application note
SLOA054, Fully Differential Amplifiers, available for
download from the TI web site (www.ti.com).
+15V
VIN+
Digital
Output
AIN
VOCM
VIN−
AIN
VREF
−15V
Figure 2. Typical ADC Circuit
SHUTDOWN FUNCTION
The shutdown (enable) function of the OPA1632 is
referenced to the negative supply of the operational
amplifier. A valid logic low (< 0.8V above negative
supply) applied to the enable pin (pin 7) disables the
amplifier output. Voltages applied to pin 7 that are
greater than 2V above the negative supply place the
amplifier output in an active state, and the device is
enabled. If pin 7 is left disconnected, an internal pull-up
resistor enables the device. Turn-on and turn-off times
are approximately 2µs each.
Quiescent current is reduced to approximately 0.85mA
when the amplifier is disabled. When disabled, the
output stage is not in a high-impedance state. Thus, the
shutdown function cannot be used to create a
multiplexed switching function in series with multiple
amplifiers.
OUTPUT COMMON-MODE VOLTAGE
The output common-mode voltage pin sets the DC
output voltage of the OPA1632. A voltage applied to the
VOCM pin from a low-impedance source can be used to
directly set the output common-mode voltage. For a
VOCM voltage at mid-supply, make no connection to the
VOCM pin.
Depending on the intended application, a decoupling
capacitor is recommended on the VOCM node to filter
any high-frequency noise that could couple into the
signal path through the VOCM circuitry. A 0.1µF or 1µF
capacitor is generally adequate.
Output common-mode voltage causes additional
current to flow in the feedback resistor network. Since
this current is supplied by the output stage of the
amplifier, this creates additional power dissipation. For
commonly-used feedback resistance values, this
current is easily supplied by the amplifier. The additional
internal power dissipation created by this current may
be significant in some applications and may dictate use
of the MSOP PowerPAD package to effectively control
self-heating.
PowerPAD DESIGN CONSIDERATIONS
The OPA1632 is available in a thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted (see Figure 3[a] and Figure 3[b]). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package (see
Figure 3[c]). Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad.
DIE
(a) Side View
Thermal
Pad
DIE
(b) End View
(c) Bottom View
Figure 3. Views of the Thermally-Enhanced Package.
7
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The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad must be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device. Soldering the PowerPAD to the printed circuit
board (PCB) is always required, even with applications
that have low power dissipation. It provides the
necessary thermal and mechanical connection
between the lead frame die pad and the PCB.
PowerPAD PCB LAYOUT CONSIDERATIONS
1. The thermal pad must be connected to the most
negative supply voltage on the device, V−.
2. Prepare the PCB with a top-side etch pattern, as
shown in Figure 4. There should be etch for the
leads as well as etch for the thermal pad.
ÓÓÓ
ÓÓÓ
ÓÓÓÓÓÓ
ÓÓÓ
ÓÓÓ
ÓÓÓ
ÓÓÓ
ÓÓÓ
ÓÓÓÓÓÓ
ÓÓÓ
Single or Dual
68mils x 70mils
(via diameter = 13mils)
Figure 4. PowerPAD PCB Etch and Via Pattern.
3. Place five holes in the area of the thermal pad.
These holes should be 13mils in diameter. Keep
them small so that solder wicking through the holes
is not a problem during reflow.
4. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area.
8
These vias help dissipate the heat generated by the
OPA1632 IC, and may be larger than the 13mil
diameter vias directly under the thermal pad. They
can be larger because they are not in the thermal
pad area to be soldered so that wicking is not a
problem.
5. Connect all holes to the internal power plane that is
at the same voltage potential as V−.
6. When connecting these holes to the plane, do not
use the typical web or spoke via connection
methodology. Web connections have a high
thermal resistance connection that is useful for
slowing the heat transfer during soldering
operations. This makes the soldering of vias that
have plane connections easier. In this application,
however, low thermal resistance is desired for the
most efficient heat transfer. Therefore, the holes
under the OPA1632 PowerPAD package should
make their connection to the internal plane with a
complete
connection
around
the
entire
circumference of the plated-through hole.
7. The top-side solder mask should leave the terminals
of the package and the thermal pad area with its five
holes exposed. The bottom-side solder mask should
cover the five holes of the thermal pad area. This
prevents solder from being pulled away from the
thermal pad area during the reflow process.
8. Apply solder paste to the exposed thermal-pad
area and all of the IC terminals.
9. With these preparatory steps in place, the IC is
simply placed in position and runs through the
solder reflow operation as any standard
surface-mount component. This results in a part
that is properly installed.
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The OPA1632 does not have thermal shutdown
protection. Take care to assure that the maximum
junction temperature is not exceeded. Excessive
junction temperature can degrade performance or
cause permanent damage. For best performance and
reliability, assure that the junction temperature does not
exceed +125°C.
The thermal characteristics of the device are dictated
by the package and the circuit board. Maximum power
dissipation for a given package can be calculated using
the following formula:
P Dmax +
T max * T A
q JA
(1)
Where:
PDmax is the maximum power dissipation in the
amplifier (W).
Tmax is the absolute
temperature (_C).
maximum
junction
TA is the ambient temperature (_C).
qJA = qJC + qCA.
qJC is the thermal coefficient from the silicon
junctions to the case (_C/W).
qCA is the thermal coefficient from the case to
ambient air (_C/W).
For systems where heat dissipation is more critical, the
OPA1632 is offered in an MSOP-8 with PowerPAD.
The thermal coefficient for the MSOP PowerPAD
(DGN) package is substantially improved over the
traditional SO package. Maximum power dissipation
levels are depicted in Figure 5 for the two packages.
The data for the DGN package assumes a board layout
that follows the PowerPAD layout guidelines.
MAXIMUM POWER DISSIPATION
vs AMBIENT TEMPERATURE
3.5
Maximum Power Dissipation (W)
POWER DISSIPATION AND THERMAL
CONSIDERATIONS
θ JA = 170 _ C/W for SO−8 (D)
θ JA = 58.4 _ C/W for MSOP−8 (DGN)
TJ = 150_ C
No Airflow
3.0
2.5
MSOP−8 (DGN) Package
2.0
1.5
1.0
SO−8 (D) Package
0.5
0
−40
−15
10
35
Ambient Temperature (_ C)
60
85
Figure 5. Maximum Power Dissipation vs Ambient
Temperature
9
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA1632D
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DGN
ACTIVE
MSOPPower
PAD
DGN
8
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DGNG4
ACTIVE
MSOPPower
PAD
DGN
8
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DGNR
ACTIVE
MSOPPower
PAD
DGN
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DGNRG4
ACTIVE
MSOPPower
PAD
DGN
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA1632DRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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to Customer on an annual basis.
Addendum-Page 1
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