LINEAR TECHNOLOGY SEPTEMBER 2006 IN THIS ISSUE… Cover Article Sequencer-Supervisor Simplifies Design of Multi-Supply Systems...........1 Bob Jurgilewicz Issue Highlights...................................2 Linear Technology in the News…..........2 Design Features Reduce the Size and Cost of High Current, High-Power-Density Systems with Tracking Dual, 2-Phase, Constant Frequency Step-Down Regulator . .........................6 Wilson Zhou and Henry Zhang Compact Solution for Hot Swap™ and Supply Monitoring in CompactPCI and PCI Express Systems ............................................................8 Pinkesh Sachdev CCD Bias Supply Integrates “Output Disconnect,” Schottkys and Feedback Resistors.....................13 Jesus Rosales Single Device Combines Pushbutton On/Off Control, Ideal Diode PowerPath™ and Accurate System Monitoring.......14 Eko T. Lisuwandi Integrated High Voltage Switching Charger/PowerPath Controller Minimizes Power Dissipation and Fits into 2cm2 .............................19 Tage Bjorklund DESIGN IDEAS .....................................................23–35 (complete list on page 23) New Device Cameos............................36 Design Tools.......................................39 Sales Offices......................................40 VOLUME XVI NUMBER 3 Sequencer-Supervisor Simplifies Design of Multi-Supply Systems Introduction Proper supply sequencing and supervision are key aspects of a stable multi-power -supply system, but supply specifications are often finalized near the end of the project. This puts pressure on the supervisor and sequencing components to remain versatile, even as they are built into the design. The LTC2928 offers a solution to the problem of moving target designs by using a simple approach to sequencing and supervision—no complicated firmware or software needed. You can configure sequence and supervisor thresholds, supply sequence order and timing with just a few components. The number of sequenced and supervised supplies is unlimited—just cascade multiple LTC2928s through a single pin. System faults can shutdown all controlled supplies immediately, and application faults are detected and reported by the LTC2928, making quick work of fault diagnosis. A Simple But Powerful Design Idea One of the best ways to avoid expensive design rework at the back end of a project is to use the LTC2928 in generic reusable circuit blocks that are added early in the system design with little regard to the final specific power requirements. Leave blocks unfinished—simply waiting for passive by Bob Jurgilewicz component values to be determined. When final decisions about the power supplies’ operating specifications are determined, calculate the values for a few passive components and populate the empty spaces in the circuit. Changes are easy—no costly rework and testing. One of the best ways to avoid expensive design rework at the back end of a project is to use the LTC2928 in generic reusable circuit blocks that are added early in the system design with little regard to the final specific power requirements. Leave blocks unfinished— simply waiting for passive component values to be determined. Loaded with Features Designing with the LTC2928 requires little more than specifying a few resistors, capacitors and the biasing of some three-state pins. Design flexibility however, is virtually unlimited. Table 1 outlines a few design features and configuration options available in the LTC2928. continued on page L, LT, LTC, LTM, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology Corporation. Adaptive Power, BodeCAD, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, µModule, Micropower SwitcherCAD, Multimode Dimming, No Latency ΔΣ, No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, True Color PWM, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products. DESIGN FEATURES L LTC2928, continued from page How to Set Up the LTC2928 This section describes how to calculate the component values required to set particular supervisor and sequence parameters. The calculations are not difficult, but we recommend using the LTC2928 Configurator, a free calculation tool that does much of the work for you (see “The LTC2928 Configurator Tool Designs It for You” above). Either way, be sure to call about the available demo board, which you can use to quickly evaluate any configuration. Figures 1 and 2 show a generic LTC2928 application and waveforms for the discussion and calculations here. To set the supervisor undervoltage threshold at the V1 input (UVTH1), calculate the ratio for the resistive Let the LTC2928 Configurator Tool Design It for You Configuring an LTC2928 application is simple (see “How to Set Up the LTC2928” in this article), but why should you have to do any calculation at all? To make life truly simple, Linear Technology offers free configuration software that calculates all resistor values, capacitor values and required logic connections. The tool also generates schematics and a passive element bill-of-materials. All you need to know are your supply parameters and sequence. The LTC2928 Configurator can be obtained from LTC applications staff members. L divider (R1B, R1A) between supply voltage S1 and ground: R1B UVTH1 ( V) = −1 R1A 0.5 V The resistive dividers for the other positive supervisor inputs are calculated in the same way. R1B −UVTH1 ( V) = R1A VREF Table 1. LTC2928 feature summary Feature Available High Voltage Operation: 7.2V to 16.5V L Low Voltage Operation: 2.9V to 6V L Power-Up and Power-Down Sequencing (Positive and Negative Supplies) L Sequenced Shutdown upon Loss of VCC* L ±1.5% Accurate Under Voltage Comparators L Over Voltage Comparators L Sequence Threshold Comparators L Negative Supply Comparator L Fault Channel and Fault Type Reporting L Controller Fault L Under Voltage Fault L Over Voltage Fault L Sequencing Fault L External Fault L Auto Restart* L N-Channel MOSFET Gate Drive L Power Supply Capacitance Discharge* L RESET Disable for Margining L Single Pin Cascading for More Supplies and Time Positions L Fast Shutdown at Power-Down* L Individual Comparator Outputs L Adjustable Sequence, Power-Good and Reset Timers L *see data sheet Linear Technology Magazine • September 2006 If a negative supply is monitored on the V1 input, tie the VSEL pin to VCC. Connect the ground side of R1A to the REF pin. The reference voltage provides level shifting of the negative supply to the ground sensing comparator on the V1 input. Calculate the resistive divider ratio using where VREF is nominally 1.189 volts. In the power supply world, undervoltage thresholds are commonly discussed as a percentage below the nominal supply voltage. The same is true for the LTC2928, but all other thresholds in the LTC2928 (sequence-up, sequence-down and overvoltage) are keyed to the configured undervoltage thresholds on each respective input, and are expressed as a percentage of the undervoltage threshold. A bias on the OVA pin globally configures the overvoltage threshold for all positive supplies. Use a resistor to ground to configure overvoltage thresholds in the range of 12% to 32% above the undervoltage threshold. Use a resistor to VCC for overvoltage thresholds greater than 32% above the undervoltage threshold. Use Figures 3 and 4 to select the OVA biasing resistor. Typically, a single resistor (RTn) sets the power supply’s sequencing time position. The normal sequence-down order is the reverse of the sequenceup order, and order is preserved regardless of the number of cascaded LTC2928 devices. The sequence up/ down time positions can also be actively changed—see “Active Sequence L DESIGN FEATURES Positioning” below. In this generic application, supply S1 is shown to start in time position 5 (TP5). Time position resistor RT1 is connected between VCC and the RT1 input pin. Time position resistors and the corresponding ideal time position voltages are given in Table 2. To configure time position 5 for supply S1, a 9.53kΩ resistor is selected. Time positions 6, 7 and 8 are similarly selected with RT resistors for supplies S2, S3 and S4. Any sequencer/supervisor channel that must be shut off or is otherwise unused may be disabled by pulling the corresponding RT pin low (ground). Prior to sequencing-up, with the ON pin low, any or all enable pins may be forced high by pulling the respective RT pin to VCC. In this manner, supplies may be tested individually or together in any combination. Transition the ON pin to begin sequencing-up or down. The shortest time delay between two time positions (TP2 – TP1 for this example) or the time delay between an ON pin transition and the next time position is defined to be equal to tSTMR (sequence timer delay). The time between two adjacent time positions is potentially stretched by a power supply’s rise time to its configured sequence-up threshold. In Figure 2, supply S1 has a finite rise time tRISE(S1) to the sequence-up threshold SQTH1. Using three-state VIN 12V DC/DC VOUT 100Ω DC/DC VOUT RUN VIN DC/DC VOUT RUN S3 VIN DC/DC VOUT RUN S4 S2 R4B HVCC EN1 EN2 EN3 EN4 V1 RT2 RT3 LTC2928 1µF OV MS1 VSEL RTMR PTMR CRTMR pins SQT1 and SQT2 (not shown), sequence-up thresholds can be set to equal to 100%, 67% or 33% of the configured undervoltage threshold. The time between TP5 and TP6 is seen to be equal to tRISE(S1) plus one tSTMR. The sequence timer delay is set with capacitor CSTMR and is calculated from S3 S4 SQTH3 tSTMR TIME TP5 tSTMR TP7 TP7 CSTMR RT1 tRISE (S1) CPTMR tSTMR tPTMR(MIN) Figure 2. Generic application waveforms FAULT FLT STMR CPTMR CSTMR ALL RESISTORS 1% Figure 1. Generic LTC2928 application SQTH1 TP3 SYSTEM RESET RST DONE VCC GND R3A R4A V4 RT4 3.4k R1A V3 RT3 RT4 R1B R2A V2 RT2 S2 TP1 R2B V1 UVTH1 R1A R3B OVA RT1 S1 R1B REF ON RT1 VOLTAGE S1 S1 VIN 0.1µF ON Si7894ADP TP5 TP3 TP1 C STMR (F ) = t STMR (s) 8.67MΩ The PTMR pin configures the power-good timer which is used as a watchdog for stalled power supplies. When sequencing-up, a sequence fault is generated if any sequenced supply fails to reach its undervoltage threshold during the power-good time-out period. When sequencingdown, a sequence fault is generated if any sequenced supply fails to reach its sequence-down threshold during the power-good time-out period. The power-good timer starts with the first enabled (disabled) supply and is terminated when the last supply reaches its undervoltage threshold (sequencedown threshold). The power-good timeout period is set with capacitor CPTMR and is calculated from CPTMR (F ) = tPTMR (s) 4.0MΩ To disable the power-good timer, simply tie the PTMR pin to ground. To avoid generating sequence faults due to insufficient power-good timer period, be careful to add some time Linear Technology Magazine • September 2006 0.64 28 0.62 24 0.60 20 0.58 16 0.56 100 1k 10k 100k ROVA (Ω) 12 10M 1M 1.56 VCC = 6V VCC = 5.5V VCC = 5V VCC = 4.5V VCC = 4V VCC = 3.5V VCC = 3V 1.38 VOVA (V) 32 1.20 212 176 140 1.02 104 0.84 68 0.66 100 1k 10k 100k ROVA (Ω) 32 10M 1M VOVA (% ABOVE UNDERVOLTAGE THRESHOLD) 0.66 VOVA (% ABOVE UNDERVOLTAGE THRESHOLD) VOVA (V) DESIGN FEATURES L Table 2. Sequence time position resistors Position RT Number (kΩ) Figure 3. External resistor from OVA to ground Figure 4. External resistor from OVA to VCC margin to the minimum recommended power-good timeout period. The minimum recommended time consists of the time difference between the first and last enabled (disabled) supplies added to the sum of supply rise (fall) times. The minimum recommended power-good timeout is given by I2C interface, such as the LTC2629, to tPTMR (min) = TP(max) − TP(min) • t STMR 4 + ∑ Max tRISE (Sn), tFALL (Sn) n = 1 ( ) In this example, with the simplifying assumption of equal rise and fall times for all four supplies, the minimum recommended power-good timeout period reduces to directly drive a programmed voltage to the RT pin(s). Both methods require changing the voltage (VRT) seen at the RT pin(s), subject to the error bound specified in Table 2. The RT pin input resistance is nominally 12k. Figure 5 shows how a simple analog multiplexer is connected to allow a different sequence position on the basis of the DONE signal. During sequencing-up, the DONE pin is high, so RT1UP is selected. When sequencing-up is complete, DONE pulls low and RT1DN is selected. Sequencingdown commences once the ON pin is pulled low. Ideal RT Pin Set Point (VRT / VCC) ±0.005 1 95.3 1/9 = 0.111 2 42.2 2/9 = 0.222 3 24.3 3/9 = 0.333 4 15.0 4/9 = 0.444 5 9.53 5/9 = 0.556 6 6.04 6/9 = 0.667 7 3.40 7/9 = 0.778 8 1.50 8/9 = 0.889 Figure 6 demonstrates how the lowpower LTC2629 ratiometric voltage output DAC can be used in place of resistors to actively program sequence positions. The LTC2629 uses a 2-wire I2C compatible serial interface and is available in a tiny 16-lead SSOP package. Supply range and output drive capability are compatible with the LTC2928. Most importantly, the LTC2629 incorporates a power-on reset circuit that forces the outputs to zero scale until a valid write and update take place. This feature prevents continued on page 12 tPTMR (min) = 8 − 4 • t STMR + 4 • tRISE VCC = 4 • t STMR + 4 • tRISE Again, adding some additional time margin to this minimum time is helpful to avoid bogus sequence faults. Details regarding the biasing (high, low or open) of the three-state configuration pins (MS1, MS2, SQT1, SQT2, RDIS) are discussed in the LTC2928 data sheet. Active Sequence Positioning In most sequencing applications, the sequence-down order is the reverse of the sequence-up order. While the LTC2928 easily handles such applications, it is not limited to same up, same down sequencing. Two methods are available to obtain flexible sequencing order. The first technique uses a simple analog multiplexer to switch the resistance seen at the RT pin(s). The second technique uses a rail-to-rail voltage output DAC, preferably with Linear Technology Magazine • September 2006 VCC RT1UP NO RT1DN NC 3.3k LTC2928 COM RT1 DONE IN AME4625 Figure 5. Active sequence positioning using an analog multiplexer VCC SLAVE ADDRESS I2C LTC2629 VCC REFA CA0 REFB CA1 REFC CA2 REFD SDA VOUTA SCL VOUTB REFLO VOUTC GND VOUTD VCC RT1 RT2 RT3 RT4 LTC2928 GND Figure 6. Active sequence positioning using an I2C DAC L DESIGN FEATURES is shown in Figure 5. The most flexible turn-on behavior is afforded by the ON register. For this the ON pin should be set low. Now when BD_SEL# goes low the switches remain off. The ON register has four bits to control the state of each supply switch. Writing a one to any of these bits turns on that particular switch. In this way a host controller can turn on the supplies in any desired sequence or combination. GND LTC2928, continued from page unintended sequencing in the event that the ON pin is not in the correct state at power-up since the RT pins would be near ground (all sequencing channels disabled). 12 Q1 Si7880DP VOUT 12V 5.5A R3 10Ω 12VIN 12VSENSE 12VGATE 12VOUT VEEIN N/C CFG N/C 3VGATE VEESENSE 3VOUT VEEGATE LTC4245 R5 10k VEEOUT 3VSENSE Extensive Fault Information Aids Diagnosis If a board fault occurs, diagnosing the problem is simplified by checking the LTC4245’s onboard fault information. One status and two fault registers contain a record of faults that are present or have occurred. The STATUS register reports if any supply is in an undervoltage or power bad state and if any switch is potentially shorted. It also indicates the state of the SS, PCI_RST#, LOCAL_PCI_RST#, BD_SEL# pins and the ADC. The fault registers log any faults that have occurred but may no longer be present. Individual bits record input undervoltage, output power bad and overcurrent faults on each supply. Each of these faults has an auto-retry bit in the CONTROL register. If a fault occurs and its auto-retry bit is set, then once the fault is removed the LTC4245 turns on the external switches automatically. Otherwise the switches are latched off until the fault bit is cleared. Another 8-bit register called the ALERT register controls whether the occurrence of a particular kind of fault triggers the LTC4245 to pull the ALERT# pin low. This can be used to interrupt a host controller in real-time so it can query the LTC4245 register information and take appro- R1 8mΩ VIN 12V GND 3VIN 5VIN 5VSENSE 5VGATE 5VOUT R4 10Ω VIN 5V R2 3.5mΩ Q2 Si7880DP VOUT 5V 6A Figure 8. A 12V and 5V application. Floating the CFG pin disables the VEE undervoltage and power bad functions, allowing those pins to be tied to GND. priate remedial action. When multiple LTC4245s are present in a system, the SMBus Alert Response Protocol can be used to find the faulting LTC4245. The default behavior is to not pull ALERT# low for any fault. Flexible Supply Configuration The CFG pin on the LTC4245 can be used to deal with applications that do not utilize a –12V supply, or use another 3.3V supply instead of 5V. In a normal CPCI application the CFG pin is tied low. When the –12V supply is absent, the CFG pin is left unconnected. In this case, the LTC4245 disables the undervoltage lockout and power bad comparators on –12V, thus allowing 12V, 5V and 3.3V to powerup. By tying the CFG pin to INTVCC, not only is the –12V undervoltage and power bad ignored but 5V thresholds change to 3.3V levels. Figure 6 shows the LTC4245 on a PCI Express backplane controlling one 12V and two 3.3V supplies. The VEE pins are all tied to ground. PRST#1 and PRST#2 signals sense when the plug-in card is seated. These signals are used by the PCI Express Hot-Plug Controller to command the LTC4245 to turn the switches on and off. Figures 7 and 8 show the LTC4245 controlling just two supplies, one of them 12V, the other being either 3.3V or 5V. Conclusion The LTC4245 packs a 4-supply Hot Swap controller, ADC, I2C interface and numerous other features into a 5mm × 7mm QFN package, simplifying the task of inrush control, fault isolation and power monitoring on a plug-in board. The simple default behavior can be customized through onboard registers. It provides a space-saving Hot Swap solution for any high-availability system utilizing multiple supplies such as CompactPCI or PCI Express. L Conclusion The LTC2928 greatly reduces the time and cost of power management design by eliminating the need to develop, verify and load firmware at back end test. System control issues such as sequence order, timing, reset generation, supply monitoring and fault management are all handled with the LTC2928. L Linear Technology Magazine • September 2006