XWAY™ PHY
Ethernet Physical Layer Devices
Ethernet Interface Circuit Design
for
XWAY™ PHY11G (PEF 7071), Version 1.3/1.4/1.5
Application Note
Revision 1.4, 2014-02-10
Confidential
Distribution with NDA by Marketing only
Edition 2014-02-10
Published by
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Germany
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XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
XWAY™ PHY, Ethernet Physical Layer Devices
Confidential
Revision History: Revision 1.4, 2014-02-10
Previous Revision: Revision 1.3, 2014-01-14
Page
Subjects (major changes since last revision)
9
Figure 2, Configuration of Single-Port RJ45 Connector for TPI: Split the transformer and
connector in the schematic diagram.
15
Table 1, Bill of Materials: Updated the components used based on credit-card sized demo board
schematic diagram and updated the manufacturer.
17
Table 2, List of Recommended Transformers: Moved the details of Wurth Elektronik GmbH & Co.
KG. to first row.
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SOCRATES™, VINAX™, VINETIC™, XWAY™
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RIVER™ of WIND RIVER SYSTEMS.
All other trademarks are the property of their respective owners.
Last Trademarks Update 2013-09-20
Application Note
3
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Ethernet Port Configuration Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
3.1
3.2
3.3
3.4
Circuit Block Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Twisted-Pair Interface via RJ45 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin-Strapping Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power Supply Domains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Crystal Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4
Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5
List of Preferred Transformers/Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Literature References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Application Note
4
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
List of Figures
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Configuration of Ethernet PHY Port with XWAY™ PHY11G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Configuration of Single-Port RJ45 Connector for TPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Use of Pin-Strapping Configuration to select RGMII Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Provision of VDDP, VDDR and VDDH Power Domains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Provision of VDDC and VDDL Power Domains Using Integrated DC/DC Regulator . . . . . . . . . . . . . 12
Provision of VDDC and VDDL Power Domains Using External Low-Voltage Power Supply . . . . . . . 13
Circuitry for Connection of Crystal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application Note
5
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
1
Overview
Overview
This application note describes the circuitry and minimum components required to configure a functional Ethernet
PHY port using the Lantiq XWAY™ PHY11G (PEF 7071) Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s).
Of the many schematic choices and interface configurations that can be build using this device, this document
shows only a copper application where the MAC interface is RGMII.
For other possible application interface choices please refer to the corresponding User’s Manuals [1], [2] and [3].
Attention: The application note is not valid for the XWAY™ PHY11G (PEF 7072) device.
Application Note
6
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
2
Ethernet Port Configuration Circuit
Ethernet Port Configuration Circuit
Figure 1 shows an overall schematic for configuration of an Ethernet PHY port using the XWAY™ PHY11G.
VDDP, VDDR and VDDH Power
Domains
35
VDDH
30
25
VDDH
38
VDDH
45
VDDR
7
VDDP
2
VDDP
VDDP
U35
TPIAP/TPIAN
TPIBP/TPIBN
TPICP/TPICN
TPIDP/TPIDN
MAC
26,27
28,29
31,32
33,34
Twisted-Pair
Interface and
Pin-Strapping
Configuration
24-22
LED[2:0]
R606
RGMII0_TXCTL
R181
3
4
5
6
48
9
15
RGMII0_TXD1
TDO
TDI
TMS
TCK
11
RP601
12
14
RGMII0_TXD0
21
18
JTAG Interface
20
19
R607
TX_CTL(RGMII_TX_CTL)
10
RGMII0_TXD3
RGMII0_TXD2
RXD3(RGMII_RXD3)
RXD2(RGMII_RXD2)
RXD1(RGMII_RXD1)
RXD0(RGMII_RXD0)
RX_CLK(RGMII_RXC)
RX_CTL(RGMII_RX_CTL)
TX_CLK(RGMII_TXC)
RSTN
TXD3(RGMII_TXD3)
C620
16
R481
TXD2(RGMII_TXD2)
TXD1(RGMII_TXD1)
TXD0(RGMII_TXD0)
XTAL1
XTAL2
CLKOUT
VDDP2
G ND
1
RGMII0_RXD3
RGMII0_RXD2
RGMII0_RXD1
RGMII0_RXD0
RGMII0_RXCLK
RGMII0_RXCTL
RGMII0_TXCLK
POR_IN
VDDP2
36
Crystal Clock
37
46
G0_25M_OUT
XWAY™ PHY11G
(PEF 7071)
MDC
47
MDIO
MDINT
17
13
8
VDDC
42
40
REGO
MDIO
VDDC
GPHY0_INT
R584
R608
VDDC
VDDP2
MDC
VDDL
VDDP2
41
SCL
43
SDA
44
G0_SCL
G0_SDA
GND
39
VDDL, VDDC and REGO
Power Domains
xway_Phy11 g_GbE _Port.vsd
Figure 1
Configuration of Ethernet PHY Port with XWAY™ PHY11G
Application Note
7
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Ethernet Port Configuration Circuit
In Figure 1, the following points are to be taken into consideration:
•
•
•
•
•
•
•
•
•
The circuitry for connecting a single-port connector to the TPI is described in Chapter 3.1.
In this application note, RGMII mode is chosen to connect to the MAC. The pin-strapping configuration for
selecting this mode is shown in Chapter 3.2.
The components needed for provision of power domains is described in Chapter 3.3, including the option to
use the XWAY™ PHY11G’s internal DC/DC switching regulator or not.
The circuitry for connecting a 25 MHz crystal clock source is described in Chapter 3.4.
The MDIO pins (MDIO, MDC, and MDINT) need to be driven with a compliant device.
The JTAG pins of the XWAY™ PHY11G (TDO, TDI, TMS, and TCK) are not functionally required, but can be
connected to a header for test/boundary scan purposes, if required. The JTAG interface is deactivated in this
schematic by pulling up the TCK pin.
Interrupt is configured as active low.
The I2C interface is meant for connecting to an external EEPROM. However, it is unused in this schematic.
This is indicated by tying the SDA pin to ground.
Figure 3 shows the pin-strapping configuration for choosing the following options:
– RGMII mode to connect to the MAC
– MDIO address = 0
– Copper flow
– During auto-negotiation, advertise 10/100/1000 Mbit/s in both full and half duplex.
– RGMII Transmit timing skew is set to 1.5 ns.
Application Note
8
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
3
Circuit Block Details
Circuit Block Details
This chapter gives more details on the implementation of circuit blocks shown in the overall schematic in Figure 1.
In particular, it covers the following aspects of configuring the XWAY™ PHY11G (PEF 7071) as a single Ethernet
port:
•
•
•
•
Twisted-Pair Interface via RJ45 Connector
Pin-Strapping Configuration
Power Supply Domains
Crystal Clock Source
3.1
Twisted-Pair Interface via RJ45 Connector
Figure 2 shows the circuitry for connecting the TPI pins of the XWAY™ PHY11G to a single-port Gigabit Ethernet
RJ45 connector module of type JK0-0193NL, manufactured by Pulse Electronics. This particular type of integrated
connector module includes the required transformer circuitry as well. Calibration resistors are required to be
connected between the wires of twisted-pair port C and ground. These should be placed nearby
XWAY™ PHY11G device and must have 1 % accuracy. LEDs connected to the LED[2..0] pins can display
information on the status of the ethernet connection like speed, operating mode, etc.
T1
U35
26
TPIAN
27
TPIBP
28
TPIBN
J1
Transformer
TPIAP
23
8
3
22
24
7
5
20
6
2
1
4
29
6
19
21
5
31
8
17
4
TPICN
32
7
9
16
18
3
TPIDP
33
11
14
2
13
15
1
TPICP
TPIDN
9
10
34
12
R4
R3
R2
R1
R503
R502
XWAY™ PHY11G
(PEF 7071)
10
RJ45
7490200136
GND
LED2
22
C1
R487
CASE GND
LED2
LED0
34
R489
LED1
Figure 2
GND
xway_Phy11g_ GbE_ Port_RJ45 .vsd
Configuration of Single-Port RJ45 Connector for TPI
Application Note
9
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Circuit Block Details
Note:
1. The requirement to leave the center taps of the transformer on the chip side floating, as well as unconnected
to each other, must be followed.
2. However, for improving EMI performance of the system, center taps of the transformers can be grounded with
capacitors with value not exceeding 68 pF.
3. The 16 kΩ high precision (1 % accuracy) calibration resistors are required on the line side independent of
whether the C and D pairs are being used or not in the application for ethernet connectivity.
3.2
Pin-Strapping Configuration
The soft pin-strapping configuration is done by means of resistors and capacitors connected to the LED[2:0] pins
of the XWAY™ PHY11G. The values of these resistors and capacitors are used to determine the different setup
values for different modes of operation. For the scope of this application note, the soft pin-strapping configuration
selects RGMII mode to connect the XWAY™ PHY11G to the MAC device. For a list of all possible pin-strapping
choices, and their implications, refer to the User’s Manuals [1], [2] and [3].
Figure 3 shows the soft pin-strapping configuration for RGMII mode. In this configuration, all the vectors on the
LED[2:0] pins are set to 000B.
U35
XWAY™ PHY11G
(PEF 7071)
LED0
LED1
LED2
24
23
22
R514
R520
R527
xway_Phy11 g_GbE _Port_pinstrapping .vsd
Figure 3
Use of Pin-Strapping Configuration to select RGMII Mode
For details on the value and type of components required for soft pin-strapping configuration, refer to the Bill of
Materials. The values mentioned there (11 kΩ) are for the configuration chosen for this implementation, for other
configurations options, please refer to the User’s Manuals [1], [2] and [3].
Application Note
10
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
3.3
Circuit Block Details
Power Supply Domains
Figure 4 shows the capacitor components required at the VDDP, VDDR and VDDH power supply inputs.
+3V3
VDDR2
VDDP2
+3V3
VDDR2
The voltage supply at VDDR2 and
VDDH2 can be 2 .5 V or 3.3 V. This
figure shows the 3.3 V option.
C434
C435
VDDH2
GND
VDDP2
C436
C438
C439
C440
VDDH2
C441
C444
30
27
VDDH
35
VDDH
38
VDDH
45
VDDR
7
VDDP
2
VDDP
U35
C443
GND
VDDP
GND
C442
XWAY™ PHY11G
(PEF 7071)
xway_Phy11 g_GbE _Port_pwr_dmns_north .vsd
Figure 4
Provision of VDDP, VDDR and VDDH Power Domains
The XWAY™ PHY11G includes an internal DC/DC switching regulator for providing the VDDC and VDDL domains
with 1.0 V. However, it also provides the option to disable this switching regulator and provide these domains using
an external 1.0 V source.
Application Note
11
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Circuit Block Details
Figure 5 shows the circuitry required when the internal DC/DC switching regulator is used. Components R586,
C494, L10, C479, and C493 are required for this option.
U35
VDDL2
C446
17
13
8
40
REGO
VDDC
VDDC
VDDC
VDDL
XWAY™ PHY11G
(PEF 7071)
39
C447
VDDC2
VDDL2
L10
C479
C449
C450
VDDC2
R586
C448
C493
VDDC2
C494
C451
xway_Phy11g _GbE_ Port_pwr_dmns_south_DCDC.vsd
Figure 5
Provision of VDDC and VDDL Power Domains Using Integrated DC/DC Regulator
Application Note
12
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Circuit Block Details
Figure 6 shows the option where an external power supply is used for the 1.0 V voltage domains. In this case,
components R586, C494, L10, C479, and C493 are not required, but the REGO pin must be shorted to the VDDR
pin.
+1V
U35
VDDL2
VDDC2
VDDL2
C446
17
13
8
40
REGO
VDDC
VDDC
VDDC
VDDL
XWAY™ PHY11G
(PEF 7071 )
39
C447
VDDC2
VDDR2
C448
C449
C450
VDDC2
C451
xway_Phy11 g_GbE _Port_pwr_ dmns_ south_ no_DCDC.vsd
Figure 6
Provision of VDDC and VDDL Power Domains Using External Low-Voltage Power Supply
For details on the value and type of components required for provision of power supply domains, refer to the Bill
of Materials.
Application Note
13
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
3.4
Circuit Block Details
Crystal Clock Source
A 25 MHz crystal can be used to clock the XWAY™ PHY11G. Figure 7 shows the components required for this
configuration option.
U35
XTAL1
36
XTAL2
37
XWAY™ PHY11G
(PEF 7071 )
Y6
25 MHz
C425
C426
xway_ Phy11g_GbE _Port_ clocking.vsd
Figure 7
Circuitry for Connection of Crystal Clock
For details on the value and type of components required to connect a crystal clock, refer to the Bill of Materials.
Application Note
14
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
4
Bill of Materials
Bill of Materials
Details of components used in the circuit are given below. The manufacturers are shown only for illustration,
equivalent components may be employed.
Table 1
Bill of Materials
Component
Description
C434, C438, C439, Ceramic Chip
C440, C441, C442, Capacitor, 16 V X7R,
C443, C447, C449, 10%
C450, C451
Value
Package
Information
Manufacturer
100 nF
c0402
TDK Corporation
c0805
TDK Corporation
C435, C436, C444, Ceramic Chip
10 µF
C446, C448
Capacitors, 16 V X5R,
10%
T1
1000BASE-T
LAN-Transformer
7490200136
Wurth Elektronik
GmbH & Co. KG
J1
RJ45, Single Port
Sheilded Connector
615008143521
Wurth Elektronik
GmbH & Co. KG
LED1
SMD LED 0805 yellow LED/0805
LED0805AC
Wurth Elektronik
GmbH & Co. KG
LED2
SMD LED 0805 green LED/0805
LED0805AC
Wurth Elektronik
GmbH & Co. KG
R487, R489
Resistor, 5%, 0.1 W
150 Ω
R0603
Yageo Corporation
R514, R527, R520
Resistor, 0.625 W
11 kΩ, 1%
R0402
Yageo Corporation
R481
Chip Resistor CRCW
4.7 kΩ
R0603
Vishay
Intertechnology, Inc.
R502, R503
Resistor, 0.0625 W
16 kΩ, 1%
R0402
Yageo Corporation
R584, R607
Resistor, 5%,
0.063 W
10 kΩ
R 0402
Yageo Corporation
R608
Resistor, 5%,
0.063 W
1.5 kΩ
R0402
Yageo Corporation.
RP601
Resistor, 5%, 0.06 W, 68 Ω
Array 8P4R
R\8P4R\0402
Yageo Corporation
R181
Resistor, 5%,
0.063 W
33 Ω
R0402
Yageo Corporation
U35
XWAY™ PHY11G
PEF 7071
PG-VQFN-48
Lantiq
R606
Resistor, 0.0625 W
75 Ω, 1%
R0402
Yageo Corporation
C426, C425
Ceramic Chip
Capacitor, 50 V NP0,
5%
33 pF
C0402
TDK Corporation
R1, R2, R3, R4
Resistor, 5%
75 Ω
R0603
Yageo Corporation
C1
Ceramic Chip
Capacitor, 3 kV X7R,
10%
1 nF
C1808
Holy Stone
Enterprise
C620
Electrolytic, 10 V
10 µF
Through-hole
TDK Corporation
Application Note
15
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
Table 1
Bill of Materials
Bill of Materials (cont’d)
Component
Description
Value
Package
Information
Manufacturer
L-WIC-453232F
Wurth Elektronik
GmbH & Co. KG
C0402
TDK Corporation
Required components if the internal DC/DC regulator is used:
L10
Inductor, SMD,
315 mA, ±10%, 1812
Wound
C479, C494
Ceramic Chip
330 pF
Capacitor, 50 V NPO,
5%
C493
Ceramic Chip
Capacitor, 10 V Y5V,
+80-20%
22 µF
C1206
TDK Corporation
R586
Resistor, 5%, 0.063 W 5.1 Ω
R0402
Yageo Corporation
Y6
DIP HC49S, 15 ppm,
20 pF
Crystal
TXC Co. Limited
Application Note
4.7 µH
25 MHz
16
Revision 1.4, 2014-02-10
XWAY™ PHY11G (PEF 7071)
Single Port Gigabit Ethernet PHY (10/100/1000 Mbit/s)
Confidential
5
List of Preferred Transformers/Modules
List of Preferred Transformers/Modules
Here is an indicative list of transformers which have been shown to give the performance that is required of the
device. It is not an exhaustive list. For the parameter values that need to be met by the transformer for optimal
performance, please refer to Chapter 6 of the User’s Manuals [1], [2] and [3]. The following parts have been
measured and tested with our chipsets and seen with good performance.
Table 2
List of Recommended Transformers
Part No.
Type
Manufacturer
7490200136
Single 10/100/1000BASE-T
Wurth Elektronik GmbH & Co. KG.
H5004NL
Single 10/100/1000BASE-T
Pulse Corporation
LAN3241
Single 10/100/1000BASE-T
LinkCom Manufacturing Co., Ltd
LAN3482
Dual 10/100/1000BASE-T
LinkCom Manufacturing Co., Ltd
Literature References
[1]
XWAY™ PHY11G (PEF 7071) Version 1.5 User’s Manual Hardware Description Revision 2.0
[2]
XWAY™ PHY11G (PEF 7071) Version 1.4 User’s Manual Hardware Description Revision 1.0
[3]
XWAY™ PHY11G (PEF 7071) Version 1.3 User’s Manual Hardware Description Revision 1.5
Application Note
17
Revision 1.4, 2014-02-10
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