Low I Q , Triple Output Boost/Buck Synchronous Controller Keeps Electronics Running Through Battery Transients in Automotive Start-Stop and Always-On Systems

Intermediate Bus Buck Regulator Maintains 5V Gate Drive
During Automobile Cold Crank Conditions
Theo Phillips and Tick Houk
DC/DC converters in today’s automobiles often take their inputs from a loosely regulated
5V intermediate bus, instead of directly from the battery voltage (which can vary from 4V
during cold crank to above 24V from double-battery jump-starts and other transients).
Incorporating an intermediate voltage bus has a number of advantages, one of which
is the expanded range of DC/DC converter options available to power downstream
electronics. Power supply designers can choose from a wide variety of low dropout (LDO)
and switching post-regulators that have 6V absolute maximum input voltage ratings.
Because typical post-regulator outputs are substantially lower than 5V—from 3.3V down
to 1V—they can continue to operate even as their inputs drop below the nominal 5V.
With this in mind, the ideal intermediate step-down regulator would continue to provide
power even under cold crank conditions, where the battery voltage can drop below 5V.
A synchronous buck regulator often
makes the best intermediate bus converter for these applications because
of its high efficiency over a wide input
range when compared to linear regulators. In this buck topology, 40V MOSFETs
are necessary to tolerate double battery and high voltage transients, so the
regulator should provide the required
minimum 4.5V gate drive for the power
MOSFETs during cold engine cranking.
Buck regulator controllers have traditionally provided gate drive power through
either an external 5V supply or through
an onboard LDO. Both of these supply
options can only step down an input voltage, so the gate drive potential drops with
the input voltage, limiting the operating
range of the regulator. The ideal controller would require no auxiliary supply
and would provide the required 5V gate
drive voltage even when the input supply
Figure 1. The two core circuit blocks of the LTC3852: a step-down DC/DC controller
block and a charge pump doubler block, which allows the controller to continue running
even when inputs drop below 5V.
voltage drops below the minimum specified VGS rating of the power MOSFETs.
BEST OF BOTH WORLDS
The LTC3852 is a synchronous stepdown DC/DC controller with a low voltage charge pump designed to provide
5V drive to external MOSFETs even when
the input drops below 5V. Figure 1
shows the block diagram of the IC. The
LTC3852 (CHARGE PUMP)
SOFT-START
AND
SWITCH CONTROL
SHDN
ON/OFF
1.2MHz
OSCILLATOR
VPUMP
–
+
VIN1
2.7V to 5.5V
CPUMP
CHARGE
PUMP
C+
VIN1
CFLY
C–
CIN
GND1
22 | April 2011 : LT Journal of Analog Innovation
design features
The ideal intermediate step-down regulator would continue
to provide power even under cold crank conditions,
where the battery voltage can drop below 5V. The
LTC3852 does just that—even when its input drops below
5V, its integrated low voltage charge pump produces
the necessary 5V drive for the external MOSFETs.
LTC3852 contains two core circuit blocks,
a step-down DC/DC controller and a
charge pump doubler. The LTC3852 can
be configured to operate from voltages
as low as 2.7V, as shown in Figure 2,
or as high as 38V, as shown in Figure 3.
Figure 4 shows a DC/DC converter that
operates over a wide input voltage
range and provides 5V gate drive to the
MOSFETs even when VIN falls below 5V.
The charge pump doubler inside the
LTC3852 provides a regulated 5V output
at VPUMP. As the schematic of Figure 4
shows, VPUMP is typically connected to
VIN2, the main supply for the DC/DC buck
MODE/PLLIN
LTC3852 (BUCK REGULATOR)
100k
VIN2
0.8V
MODE/SYNC
DETECT
FREQ/
PLLFLTR
5V REG
+
–
VIN
38V MAX
PLL-SYNC
BOOST
OSC
S
R
Q
–
ICMP
IREV
+
–
TG
PULSE SKIP
ON
5k
+
BURSTEN
CB
M1
SW
SWITCH
LOGIC
AND
ANTISHOOT
THROUGH
SENSE+
DB
L1
VOUT
SENSE–
RUN
+
INTVCC
OV
BG
COUT
M2
CINTVCC
SLOPE COMPENSATION
GND2
PGOOD
1
100k
INTVCC
UVLO
ITHB
+
0.72V
UV
VFB
–
ITH
R1
FAULT
LOGIC
RC
+
VIN2
SLEEP
R2
OV
CC1
RUN
0.4V
+
–
SS
+
–
RUN
–
+
2µA
EA
– + +
–
0.8V
REF
0.64V
1.25V
0.88V
1µA
TRACK/SS
CSS
April 2011 : LT Journal of Analog Innovation | 23
If VIN falls below 5V, the switching regulator enters
dropout operation. VOUT also falls, but remains
high enough for the post-regulator LDOs to
continue regulating their output voltages.
100k
PGO0D
VIN1
TG
MODE/PLLIN
0.1µF
FREQ/PLLFLTR SW
TRACK/SS
0.1µF
BOOST
VIN2
INTVCC
1nF
ITH LTC3852
12.1k
CHARGE PUMP
2.2µF
L1: VISHAY IHLP4040DZ-01
M1, M2: VISHAY SILICONIX SiR438DP
DB: CENTRAL SEMI CMDSH-3
INTVCC
82.5k
100k
0.1µF
0.1µF
M2
SENSE
SHDN
SENSE–
VFB
C+
C–
20k
0.1µF
M1 L1
0.68µH
FREQ/PLLFLTR TG
SW
TRACK/SS BOOST
LTC3852
INTVCC
BG
ITH
L1: VISHAY IHLP5050EZ-01
M1,M2: RENESAS HAT2170H
DB: CENTRAL SEMI CMDSH05-4
SHDN
GND1
converter, and INTVCC , the gate drive supply to the external MOSFETs M1 and M2.
The input to the charge pump (VIN1) draws
its supply current from one of two sources.
At start-up, Q1, D1 and R1 form a simple
linear regulator, supplying current to the
charge pump from the input voltage. Once
VOUT is up and regulating, diode D2 turns
off Q1 and supplies voltage to the charge
pump from the output of the converter.
This bootstrap configuration increases the
24 | April 2011 : LT Journal of Analog Innovation
SENSE–
VFB
30
POWER LOSS
VIN = 3.3V
10
1
22µF
3.01k
DB
4.7µF
VIN
4.5V TO 38V
VOUT
3.3V
15A
330µF
×2
0.1µF
20
0.1
LOAD CURRENT (A)
M2
100
10
95
EFFICIENCY
90
85
1
80
POWER LOSS
75
70
0.1
65
60
SENSE+
MODE/PLLIN
1
40
10
GND2
330pF
50
40.2k
VIN2
RUN
60
0
GND1 VPUMP
PGO0D
70
20
+
RUN
2200pF
15k
×2
POWER LOSS (W)
Figure 3. A similar high
efficiency step-down
converter, configured
without the charge pump,
that operates from a 4.5V
to 38V input range
4.7µF
EFFICIENCY
80
+ 470µF
2.1k
10
90
GND2
100pF
OFF ON
BG
100
VOUT
1.2V
20A
0.1µF
DB
VIN
2.7V TO 5.5V
22µF
POWER LOSS (W)
95.3k
M1 L1
0.36µH
EFFICIENCY (%)
INTVCC
EFFICIENCY (%)
Figure 2. A high efficiency
step-down converter that
provides 5V gate drive over
a 2.7V to 5.5V input range
0.047µF
30.1k
55
154k
50
10m
VIN = 12V
0.1
1
10
LOAD CURRENT (A)
10m
100
48.7k
power supply’s efficiency, since the current required to drive the power MOSFETs
comes from the DC/DC converter itself.
If VIN falls below 5V, the switching regulator in Figure 4 enters dropout operation, keeping M1 on most of the time.
VOUT also falls, but remains high enough
for the post-regulator LDOs to continue regulating their output voltages.
Meanwhile, the charge pump maintains
its 5V output, providing solid gate drive
to the MOSFETs, as shown in Figure 5.
Under normal operating conditions the
converter has a 12V input and the LTC3852
behaves just like a conventional synchronous buck controller. Figure 6 shows the
efficiency vs load current for the converter
in Figure 4. The peak efficiency is 96% at
a load current of 6A and efficiency remains
high over a wide range of load currents.
design features
The LTC3852 can be configured to operate from
voltages as low as 2.7V, with no external gate
drive supply required, or as high as 38V.
MODE
100k
VIN
4V TO 36V
+
FORCED CONTINOUS MODE
Burst Mode OPERATION
PULSE-SKIPPING MODE
CIN1
56µF
50V
INTVCC
1
2
3
4
R1
1k
JP2
2.2µF
10V
0.1µF
Figure 4. No access to a 5V supply
is needed for this automotive
intermediate bus converter that
produces 5V gate drive for input
voltages below 5V
82.5k
MODE/ C+
PLLIN
C–
VIN1
TG
COUT1
47µF
10V
VPUMP
150pF
INTVCC
3V
RUN
0V
0.1µF
CIN1: SUNCON 50HVP56M
CIN5: TDK C3225X7R1H335
COUT1: TDK C3225X5ROJ476
COUT2: SANYO 6TPE220MI
DB: CENTRAL SEMI CMDSH05-4
L1: COILTRONICS HC1-3R6-R
M1: RENESAS RJK0451DPB
M2: RENESAS RJK0453DPB
M2
100Ω
1000pF
PGOOD
SENSE–
100Ω
VFB
SHDN
GND1
GND2
8.06k
42.2k
CONCLUSION
VIN
2V/DIV
VOUT
2V/DIV
100
7V
5V
3.16V
3.04V
0V
5V
INTVCC
2V/DIV
90
EFFICIENCY (%)
The LTC3852 is a synchronous stepdown DC/DC controller with a charge
pump doubler that provides 5V gate
drive, even when VIN drops below 5V.
The application presented here powers
an intermediate 5V bus from an automotive 12V battery input. Strong drive to
the MOSFETs is maintained even during
cold crank events, and high efficiency is
maintained over all operation conditions.
The LTC3852 is offered in a 3mm × 5mm
thermally enhanced QFN package. n
220µF
6.3V
GND
4.7µF
10V
SENSE+
VOUT
5V/10A
(VIN > 5V)
+ COUT2
0.1µF
BG
TRACK/SS
INTVCC
DB
VIN2
LTC3852
100k
0.003Ω
1%
SW
ITH
2200pF
PGOOD
M1 L1
3.6µH
BOOST
3.6k
D2
BAT85
CIN5
3.3µF ×4
50V
4.7µF
10V
FREQ/
PLLFLTR
OFF ON
Q1
2N3904
D1
4.7V
80
70
60
0V
VIN = 7V (NOM)
VOUT = 5V (NOM)
10ms/DIV
Figure 5. Line transient response for the
intermediate bus converter in Figure 4, illustrating
5V gate drive during a cold crank event
50
VIN = 12V
VOUT = 5V
0.1
1
LOAD CURRENT (A)
10
Figure 6. Efficiency vs load current for the
intermediate bus converter in Figure 4
April 2011 : LT Journal of Analog Innovation | 25