Datasheet

AOT502
Clamped N-Channel MOSFET
General Description
Product Summary
AOT502 uses an optimally designed temperature
compensated gate-drain zener clamp. Under overvoltage
conditions, the clamp activates and turns on the MOSFET,
safely dissipating the energy in the MOSFET.
The built in resistor guarantees proper clamp operation
under all circuit conditions, and the MOSFET never goes
into avalanche breakdown. Advanced trench technology
provides excellent low Rdson, gate charge and body diode
characteristics, making this device ideal for motor and
inductive load control applications.
VDS
ID (at VGS=10V)
Clamped
60A
RDS(ON) (at VGS=10V)
< 11.5mΩ
100% UIS Tested
100% Rg Tested
TO220
Bottom View
Top View
D
D
G
G
D
S
S
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
TC=25°C
Continuous Drain
Current
Pulsed Drain Current C
Avalanche Current
C
Power Dissipation B
TA=25°C
Power Dissipation A
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case
Rev1: May 2009
t ≤ 10s
AD
Steady-State
Steady-State
A
41
mJ
W
1.9
RθJA
RθJC
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W
1.2
TJ, TSTG
Symbol
A
28.5
39
PDSM
TA=70°C
A
79
PD
TC=100°C
A
7
EAS,EAR
TC=25°C
V
9
IAS,IAR
Avalanche energy L=0.1mH C
Clamped
137
IDSM
TA=70°C
Units
V
41
IDM
TA=25°C
Continuous Drain
Current
Maximum
Clamped
60
ID
TC=100°C
10Ω
-55 to 175
Typ
13
54
1.6
°C
Max
15.6
65
1.9
Units
°C/W
°C/W
°C/W
Page 1 of 7
AOT502
Electrical Characteristics (TJ=25°C unless otherwise noted)
Parameter
Symbol
Conditions
Min
STATIC PARAMETERS
BVDSS(z) Drain-Source Breakdown Voltage
ID=10mA, VGS=0V
33
BVCLAMP
Drain-Source Clamping Voltage
ID=1A, VGS=0V
36
IDSS(z)
Zero Gate Voltage Drain Current
VDS=16V, VGS=0V
BVGSS
Gate-Source Voltage
VDS=0V, ID=250µA
IGSS
Gate-Body leakage current
VDS=0V, VGS=±10V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250µA
1.6
ID(ON)
On state drain current
VGS=10V, VDS=5V
137
RDS(ON)
Static Drain-Source On-Resistance
gFS
Forward Transconductance
VSD
IS=1A, VGS=0V
Diode Forward Voltage
Maximum Body-Diode Continuous Current
IS
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
TJ=125°C
VDS=5V, ID=30A
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=15V, ID=30A
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
IF=30A, dI/dt=750A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=30A, dI/dt=750A/µs
Qrr
Units
V
44
V
20
µA
V
µA
10
VGS=10V, ID=30A
Qgd
Max
20
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Typ
2.1
2.7
V
A
9.3
11.5
15.4
18.5
mΩ
55
0.73
S
1
V
75
A
960
1205
1450
pF
185
266
345
pF
65
109
155
pF
10
20
30.0
Ω
18.5
23.4
28
nC
2.7
3.4
4
nC
4
7
10
nC
13.5
VGS=10V, VDS=15V, RL=0.5Ω,
RGEN=3Ω
ns
17.5
ns
63
ns
27
ns
14
17.5
21
53.5
67
80
ns
nC
A. The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power
dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T J(MAX)=175°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C.
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev1: May 2009
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Page 2 of 7
AOT502
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
140
80
10V
5V
60
7V
100
4.5V
80
ID(A)
ID (A)
VDS=5V
6V
120
60
40
25°C
4V
40
20
VGS=3.5V
20
125°C
0
0
0
1
2
3
4
2
5
2.5
3
3.5
4
4.5
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
14
Normalized On-Resistance
2.4
12
RDS(ON) (mΩ)
-40°C
VGS=10V
10
8
6
4
2
VGS=10V
ID=30A
1.6
17
5
2
10
1.2
0.8
0.4
0
5
-50
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
0
50
100
150
200
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
1.0E+02
50
ID=30A
1.0E+01
40
40
30
IS (A)
RDS(ON) (mΩ)
1.0E+00
125°C
20
125°C
1.0E-01
25°C
1.0E-02
-40°C
1.0E-03
10
1.0E-04
25°C
1.0E-05
0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev1: May 2009
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 7
AOT502
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1800
10
1400
Capacitance (pF)
8
VGS (Volts)
1600
VDS=15V
ID=30A
6
4
Ciss
1200
1000
800
600
Crss
Coss
400
2
200
0
0
0
5
10
15
20
0
25
Qg (nC)
Figure 7: Gate-Charge Characteristics
ID (Amps)
RDS(ON)
limited
10.0
100µs
1ms
10ms
DC
1.0
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
30
0.1
TJ(Max)=175°C
TC=25°C
17
5
2
10
600
400
200
1
VDS (Volts)
10
0
0.0001
100
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
0.001
0.01
0.1
1
10
0
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
ZθJC Normalized Transient
Thermal Resistance
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
800
10µs
Power (W)
10µs
100.0
1
10
1000
1000.0
10
5
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=1.9°C/W
40
0.1
PD
0.01
Ton
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
T
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev1: May 2009
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Page 4 of 7
AOT502
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
TA=25°C
TA=100°C
100
TA=125°C
TA=150°C
Power Dissipation (W)
IAR (A) Peak Avalanche Current
1000
80
60
40
20
0
10
0
1
10
100
1000
Time in avalanche, tA (us)
Figure 12: Single Pulse Avalanche capability (Note
C)
25
50
75
100
125
150
175
TCASE (°C)
Figure 13: Power De-rating (Note F)
10000
80
Power (W)
Current rating ID(A)
TA=25°C
1000
60
40
10
20
1
0.00001
0
0
25
50
75
100
125
150
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
0.001
0.1
10
1000
0
18
175
TCASE (°C)
Figure 14: Current De-rating (Note F)
ZθJA Normalized Transient
Thermal Resistance
17
5
2
10
100
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=65°C/W
0.1
0.01
PD
Single Pulse
0.001
0.0001
Ton
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev1: May 2009
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Page 5 of 7
AOT502
TYPICAL PROTECTION CHARACTERISTICS
2.00
Trench BV
ID (A)
1.50
BVCLAMP
1.00
D
0.50
BVDSS(Z)
0.00
30
35
40
45
R
G
VDS (Volts)
Fig 15: BVCLAMP Characteristic
VGS(PLATEAU)= 10Ω x 300mA =3V
+
+
-
VPLATEAU
S
-
60.00
50.00
ID (A)/ Vds(V)
This device uses built-in Gate to Source and Gate to Drain zener
protection. While the Gate-Source zener protects against excessive
VGS conditions, the Gate to Drain protection, clamps the VDS well
below the device breakdown, preventing an avalanche condition
within the MOSFET as a result of voltage over-shoot at the Drain
electrode.
It is designed to breakdown well before the device breakdown.
During such an event, current flows through the zener clamp, which
is situated internally between the Gate to Drain. This current flows at
BVDSS(Z), building up the VGS internal to the device. When the current
level through the zener reaches approximately 300mA, the VGS is
approximately equal to VGS(PLATEAU), allowing significant channel
conduction and thus clamping the Drain to Source voltage. The V GS
needed to turn the device on is controlled with an internally lumped
gate resistor R approximately equal to 10Ω.
+
Vz
-
BVCLAMP25oC
40.00
30.00
BVCLAMP 100oC
20.00
10.00
It can also be said that the VDS during clamping is equal to:
0.00
0.00E+0 2.50E0
05
BVDSS = BVCLAMP + VGS(PLATEAU)
Additional power loss associated with the protection circuitry can be
considered negligible when compare to the conduction losses of the
MOSFET itself;
5.00E05
7.50E05
1.00E04
1.25E04
Time in Avalanche (Seconds)
Fig 16: Unclamped Inductive Switching
EX:
PL=30µAmax x 16V=0.48mW
PL(rds)=102A x 6mΩ=300mW
Rev1: May 2009
(Zener leakage loss)
(MOSFET loss)
Fig16: The built-in Gate to Drain clamp prevents the device from going
into Avalanche by setting the clamp voltage well below the actual
breakdown of the device. When the Drain to Gate voltage approaches
the BV clamp, the internal Gate to Source voltage is charged up and
channel conduction occurs, sinking the current safely through the
device. The BVCLAMP is virtually temperature independent, providing
even greater protection during normal operation.
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Page 6 of 7
AOT502
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
VDC
DUT
Qgs
Qgd
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
Vgs
90%
+ Vdd
DUT
VDC
Rg
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
VDC
Rg
-
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev1: May 2009
Vgs
Isd
L
+ Vdd
VDC
-
IF
t rr
dI/dt
I RM
Vdd
Vds
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Page 7 of 7