Negative Voltage Diode-OR Controller Tolerates Inputs to 300V and Beyond Mitchell Lee The LTC4354 negative voltage diode-OR controller is designed to operate with inputs of up to 100V. As shown in Figure 1, the maximum voltage between –48V, VA and –48V, VB is limited to 100V, and the voltage applied to either input is similarly limited to 100V relative to –48COM. A careful study of the LTC4354 data sheet reveals that the drain pins, DA and DB, which are the only pins exposed to high voltage, are limited to 80V. Nevertheless, with a 2k series limiting resistor, these pins can handle up to 100V. Figure 1. The LTC4354 shown in a 10A,–48V application handles up to 100V differential across the inputs RTN COM 12k VCC LTC4354 DA 2k 100V MAX DIFFERENTIAL VOLTAGE VSS 1µF 16V 2k VB = –48V 15A M1 –48COM (10A) M2 *REQUIRED TO SUPPRESS PARASITIC OSCILLATIONS IN M1 AND M2. DO NOT OMIT. M1, M2: FAIRCHILD FDMS86101 If it were possible to further increase the series resistance, even higher voltages could be tolerated by simply changing the 2k resistor. Unfortunately the drain pin input bias current sets a practical limit of 2k, so as to avoid interfering with the operation of the ideal diode function itself. Figure 2. Zener clamps extend transient voltage capability to 150V and beyond VCC DA DB GA GB VSS 75V 2k 10Ω* 15A VA = –48V 2k 15A 1µF 16V 10Ω* 75V In systems where the inputs are subjected to spikes in excess of 100V, MOSFET breakdown clamps the maximum voltage, although admittedly bereft of characterization and guarantee. If spikes in excess of 100V are an issue, the high voltage capability of the drain pins is easily extended beyond 100V by simply adding a Zener clamp, as shown in Figure 2. Input spikes above 75V are clamped by the Zener, with current limiting provided by the 2k resistor. Zeners in the 250mW to 500mW range are capable of absorbing the peak current generated by a 150V, 10µs spike. Higher voltage and longer duration spikes may be accommodated by larger devices. LTC4354 –48COM (10A) M1 M2 *REQUIRED TO SUPPRESS PARASITIC OSCILLATIONS IN M1 AND M2. DO NOT OMIT. M1, M2: FAIRCHILD FDMS86101 30 | January 2012 : LT Journal of Analog Innovation GB 10Ω* 15A VA = –48V 12k VB = –48V GA 10Ω* RTN COM 10µs, 150V MAX DIFFERENTIAL SPIKE DB For sustained conditions, a simple Zener clamp is made untenable by the dissipation in both the resistor and Zener. The circuit shown in Figure 3 uses small, high voltage MOSFETs for limiting and can handle up to 400V. 11V gate design ideas Zeners in the 250mW to 500mW range are capable of absorbing the peak current generated by a 150V, 10µs spike. Higher voltage and longer duration spikes may be accommodated by larger devices. bias is conveniently obtained from the shunt-regulated VCC pin without the need for any extra components, making this useful configuration a very simple modification of the basic circuit. Under normal conditions, the –48V inputs are at or near the VSS potential, and the small MOSFETs M3 and M4 are driven fully on as their gates are biased to ~11V with respect to VSS by the VCC pin. If one input rises with respect to VSS, the small MOSFET remains on and the associated drain pin tracks the input. If the input continues to rise to the point where it is ≥10V with respect to VSS, the small MOSFET turns into a source follower, safely limiting the drain pin to about 10V with respect to VSS . MOSFETs supercap charger, continued from page 19 implies a boost regulator with a “blocking” output. This in turn necessitates the second ideal diode to allow the supercapacitor to power the buck regulator until the boost regulator engages. The boost regulator must operate to as low a voltage as possible to ensure that the maximum amount of energy is scavenged from the supercapacitor. If the supercapacitor is initially charged to 5V, then the energy in the supercapacitor is: 1 2 1 CV = 0.55F • 52 = 6.875J 2 2 The output power is 3.33V at 0.2A = 0.67W, so the percentage of the energy stored in the supercap that is extracted with a buck-only circuit is: Figure 3. The LTC4354 shown in a 10A,–48V application handles up to 300V differential across the inputs M1 and M2 can be expected to avalanche and clamp any positive-going spikes exceeding 300V, to less than 400V. While the circuit in Figure 3 was designed for a –48V system, changRIN to a 100k, 1W unit allows the circuit to operate with inputs of –200V to –300V DC. Higher voltage standoff is possible with appropriate selection of MOSFETs. n RTN COM RIN 12k ing VCC LTC4354 DA DB GA GB M3 VSS 1µF 16V M4 2k 300V MAX DIFFERENTIAL VOLTAGE 15A VA = –48V 2k VB = –48V –48COM (10A) M1 15A M2 M1, M2: IXTT 1XTT88N30P M3, M4: DIODES INC. ZVN0540A εLOAD 0.67 • 4.68s = = 45.1% ε CAP 6.875 The percentage of the energy stored in the supercap, extracted when the boost regulator is enabled, is: εLOAD 0.67 • 7.92s = = 77% εCAP 6.875 The percentage of energy stored in the supercapacitor that is recovered increases from 45.1% to 77%. This allows use of a smaller, less expensive supercapacitor. CONCLUSION The power ride-through system shown here uses a 0.55F supercap to hold up power long enough for a microcontroller to complete some last gasp housekeeping tasks. One way to extend the ride-through time for a given supercapacitor is to add a boost regulator to the system, which allows for energy scavenging. The run time of a given supercapacitor can be extended by >30% if energy scavenging is used. This is particularly relevant if the supercapacitor operating voltage is reduced to ensure high temperature reliability. In addition, the shape of the output voltage is considerably improved as the input voltage to the output regulator is now square in shape. This results in a steady 3.3V output voltage with a sharp cutoff, instead of a ramped voltage drop as the supercap drains. n January 2012 : LT Journal of Analog Innovation | 31