HA-2640, HA-2645 ® Data Sheet January 3, 2006 FN2904.5 4MHz, High Supply Voltage Operational Amplifiers Features HA-2640 and HA-2645 are monolithic operational amplifiers which are designed to deliver unprecedented dynamic specifications for a high voltage internally compensated device. These dielectrically isolated devices offer very low values for offset voltage and offset current coupled with large output voltage swing and common mode input voltage. • Supply Voltage . . . . . . . . . . . . . . . . . . . . . . ±10V to ±40V For maximum reliability, these amplifiers offer unconditional output overload protection through current limiting and a chip temperature sensing circuit. This sensing device turns the amplifier “off”, when the chip reaches a certain temperature level. These amplifiers deliver ±35V common mode input voltage range, ±35V output voltage swing, and up to ±40V supply range for use in such designs as regulators, power supplies, and industrial control systems. 4MHz gain bandwidth and 5V/µs slew rate make these devices excellent components for high performance signal conditioning applications. Outstanding input and output voltage swings coupled with a low 5nA offset current make these amplifiers excitation designs. • Output Voltage Swing . . . . . . . . . . . . . . . . . . . . . . . ±35V • Offset Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5nA • Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4MHz • Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V/µs • Common Mode Input Voltage Range. . . . . . . . . . . . ±35V • Output Overload Protection Applications • Industrial Control Systems • Power Supplies • High Voltage Regulators • Resolver Excitation • Signal Conditioning Ordering Information TEMP. RANGE (oC) PKG. DWG. # PART NUMBER PART MARKING HA2-2640-2 HA2-2640-2 -55 to 125 8 Pin Metal Can T8.C HA7-2640-2 HA7-2640-2 -55 to 125 8 Ld CERDIP HA2-2645-5 HA2-2645-5 0 to 75 8 Pin Metal Can T8.C HA7-2645-5 HA7-2645-5 0 to 75 8 Ld CERDIP PACKAGE F8.3A F8.3A Pinouts HA-2640/2645 (METAL CAN) TOP VIEW HA-2640/2645 (CERDIP) TOP VIEW COMP 8 BAL 1 -IN 2 +IN 3 8 COMP 7 V+ + BAL 1 -IN 7 + 2 V+ 6 OUT 6 OUT V- 4 5 BAL +IN 5 3 BAL 4 V(TO-99 CASE VOLTAGE = FLOATING) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2001, 2004, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-2640, HA-2645 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . 100V Differential Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . 37V Output Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 135 50 Metal Can Package . . . . . . . . . . . . . . . 165 80 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . .175oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range HA-2640-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC HA-2645-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. VSUPPLY = ±40V, RL = 5kΩ, Unless Otherwise Specified Electrical Specifications HA-2640-2 HA-2645-5 TEMP (oC) MIN TYP MAX MIN TYP MAX UNITS Offset Voltage 25 - 2 4 - 2 6 mV - 6 - - 7 mV Average Offset Voltage Drift Full - 15 - - 15 - µV/oC 25 - 10 25 - 12 30 nA Full - - 50 - - 50 nA 25 - 5 12 - 15 30 nA Full - - 35 - - 50 nA PARAMETER TEST CONDITIONS INPUT CHARACTERISTICS Full Bias Current Offset Current Input Resistance (Note 2) 25 50 250 - 40 200 - MΩ Common Mode Range Full ±35 - - ±35 - - V 25 100 200 - 100 200 - kV/V TRANSFER CHARACTERISTICS Large Signal Voltage Gain VOUT = ±30V Common Mode Rejection Ratio VCM = ±20V Minimum Stable Gain VOUT = 90mV Unity Gain Bandwidth Full 75 - - 75 - - kV/V Full 80 100 - 74 100 - dB 25 1 - - 1 - - V/V 25 - 4 - - 4 - MHz Full ±35 - - ±35 - - V OUTPUT CHARACTERISTICS Output Voltage Swing Output Current RL = 1kΩ 25 ±12 ±15 - ±10 ±12 - mA Output Resistance Open Loop 25 - 500 - - 500 - Ω Full Power Bandwidth (Note 3) VOUT = ±35V 25 - 23 - - 23 - kHz - 60 135 ns 15 40 % ±2.5 ±5 - V/µs TRANSIENT RESPONSE AV = +1, CL = 50pF, RL = 5kΩ Rise Time VOUT = ±200mV 25 - 60 135 Overshoot VOUT = ±200mV 25 - 15 30 25 ±3 ±5 - Slew Rate POWER SUPPLY CHARACTERISTICS Supply Current 25 - 3.2 3.8 - 3.2 4.5 mA Supply Voltage Range Full ±10 - ±40 ±10 - ±40 V Full 80 90 - 74 90 - dB VS = ±10V to ±40V Power Supply Rejection Ratio NOTES: 2. This parameter is based upon design calculations. 3. Full Power Bandwidth guaranteed based upon slew rate measurement: FPBW = S.R./2πVPEAK; VPEAK = 35V. 2 FN2904.5 HA-2640, HA-2645 Schematic Diagram 8 COMP 7 V+ R25 R1 R5 R7 Q17 Q1 D17 R6 R8 R 9 R21 C1 C4 Q40 Q61 Q18 Q53 C3 Q30 R25 R22 Q34 Q28 Q15 R12 Q55 Q46 D13 Q35 Q29 Q31 R4 Q3 Q12 Q6 Q5 Q14 Q7 Q8 Q 13 D3 Q D4 19 Q10 Q36 Q21 Q20 Q41 Q24 Q33 D11 D10 D8 D9 Q25 Q26 R23 Q56 6 Q44 R24 D16 Q58 R15 R14 Q27 VOUT Q60 R13 C2 Q42 Q16 R2 Q51 Q48 D7 Q59 D15 Q43 Q39 Q32 Q23 Q57 D12 Q38 Q37 Q22 D5 D6 Q9 Q47 D2 Q4 Q52 R16 Q54 Q49 Q50 R3 R27 R10 Q11 R17 R18 R26 R11 R19 R20 4 V- 3 +IN 2 -IN 5 BAL 1 BAL Test Circuits and Waveform COMP CAP 8 1 V+ IN + 2 + OUT - 6 5 3 10kΩ 5K 7 4 50pF VV- NOTE: Tested offset adjustment range is |VOS +1mV| minimum referred to output. Typical range is ±20mV with RT = 10kΩ. FIGURE 1. SLEW RATE AND TRANSIENT RESPONSE TEST CIRCUIT 3 FIGURE 2. SUGGESTED VOS ADJUSTMENT AND COMPENSATION HOOK UP FN2904.5 HA-2640, HA-2645 Test Circuits and Waveform (Continued) Vertical = 10V/Div., Horizontal = 5µs/Div. NOTE: RL = 5kΩ, CL = 50pF, TA = 25oC, VS = ±40V FIGURE 3. VOLTAGE FOLLOWER PULSE RESPONSE VS = ±40V, TA = 25oC, Unless Otherwise Specified INPUT NOISE VOLTAGE (nV/√Hz) 25 15 10 BIAS CURRENT 5 OFFSET CURRENT 0 -50 -25 0 25 50 75 100 10 100 1 INPUT NOISE CURRENT 10 INPUT NOISE VOLTAGE 1 1 125 10 100 TEMPERATURE (oC) 1K 10K 0.01 100K FREQUENCY (Hz) FIGURE 4. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE FIGURE 5. INPUT NOISE CHARACTERISTICS 0 1.4 OPEN LOOP VOLTAGE GAIN (dB) NORMALIZED VALUE REFERRED TO 25oC 0.1 1.2 1.0 SLEW RATE BANDWIDTH 0.8 -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 FIGURE 6. NORMALIZED AC PARAMETERS vs TEMPERATURE 4 45 120 80 90 PHASE GAIN 40 135 0 180 -40 225 10 100 1K 10K 100K 1M PHASE ANGLE (DEGREES) CURRENT (nA) 20 1000 INPUT NOISE CURRENT (pA/√Hz) Typical Performance Curves 270 10M FREQUENCY (Hz) FIGURE 7. OPEN LOOP FREQUENCY RESPONSE FN2904.5 HA-2640, HA-2645 VS = ±40V, TA = 25oC, Unless Otherwise Specified (Continued) 1.2 120 OPEN LOOP GAIN (dB) NORMALIZED VALUE REFERRED TO ±30V Typical Performance Curves 1.1 SLEW RATE 1.0 BANDWIDTH 0.9 AUT 40 40 0.8 10 20 30 10 40 100 1K 10K AV = 1, VSUPPLY = ±40V VIN = +35V VSUPPLY = ±40V OUTPUT VOLTAGE (V) VSUPPLY = ±20V VSUPPLY = ±10V 1.0 AV = 1, VSUPPLY = ±20V VIN = +15V -55oC 25oC 125oC -20 -15 -10 10K 100K 125oC 25oC 30 -55oC 20 10 -5 125oC 25oC 1M -20 -30 -40 FREQUENCY (Hz) 5 10 15 20 125oC 25oC -55oC AV = 1, VSUPPLY = ±20V VIN = -15V AV = 1, VSUPPLY = ±40V VIN = -35V OUTPUT LOAD CURRENT (mA) FIGURE 10. OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE 11. OUTPUT CURRENT CHARACTERISTIC 2.5 40 2.0 OUTPUT VOLTAGE SWING (±V) +ICC 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -ICC -2.0 -2.5 10 10M 40 -10 -55oC 0.1 1K 1M FIGURE 9. OPEN LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM COMPENSATION PIN TO GROUND 100 10.0 100K FREQUENCY (Hz) FIGURE 8. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE AT 25oC OUTPUT VOLTAGE SWING (VP-P) 0pF 30pF 100pF 300pF 1,000pF 0 SUPPLY VOLTAGE (±V) SUPPLY CURRENT (mA) CL = 100pF CCOMP 80 15 20 25 30 35 SUPPLY VOLTAGE (±V) FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE 5 40 30 +VOUT 20 10 0 -10 -20 -30 -40 10 -VOUT 15 20 25 30 35 40 SUPPLY VOLTAGE (±V) FIGURE 13. OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE FN2904.5 HA-2640, HA-2645 Die Characteristics SUBSTRATE POTENTIAL (Powered Up): Unbiased TRANSISTOR COUNT: 76 PROCESS: HV200 Bipolar Dielectric Isolation Metallization Mask Layout HA-2640, HA-2645 BAL COMP V+ -IN OUT +IN V- BAL 6 FN2904.5 HA-2640, HA-2645 Metal Can Packages (Can) T8.C MIL-STD-1835 MACY1-X8 (A1) REFERENCE PLANE A 8 LEAD METAL CAN PACKAGE e1 L L2 L1 INCHES SYMBOL ØD2 0.185 4.19 4.70 - 0.019 0.41 0.48 1 Øb1 0.016 0.021 0.41 0.53 1 N Øb2 0.016 0.024 0.41 0.61 - ØD 0.335 0.375 8.51 9.40 - α ØD1 0.305 0.335 7.75 8.51 - ØD2 0.110 0.160 2.79 4.06 - 1 β Øb k C L e BASE AND SEATING PLANE Q BASE METAL Øb1 NOTES 0.165 k1 Øb1 MAX 0.016 Øe F MIN A A 2 MILLIMETERS MAX Øb A ØD ØD1 MIN LEAD FINISH Øb2 SECTION A-A NOTES: 1. (All leads) Øb applies between L1 and L2. Øb1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. 3. α is the basic spacing from the centerline of the tab to terminal 1 and β is the basic spacing of each lead or lead position (N -1 places) from α, looking at the bottom of the package. e1 0.200 BSC 5.08 BSC 0.100 BSC - 2.54 BSC - F - 0.040 - 1.02 - k 0.027 0.034 0.69 0.86 - k1 0.027 0.045 0.69 1.14 2 12.70 19.05 1 1.27 1 L 0.500 0.750 L1 - 0.050 L2 0.250 - 6.35 - 1 Q 0.010 0.045 0.25 1.14 - α - β 45o BSC 45o BSC 45o BSC 45o BSC N 8 8 3 3 4 Rev. 0 5/18/94 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH. 7 FN2904.5 HA-2640, HA-2645 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) LEAD FINISH c1 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE -D- -A- BASE METAL E M -Bbbb S C A-B S -C- S1 0.200 - 5.08 - 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.405 - 10.29 5 E 0.220 0.310 5.59 7.87 5 eA e ccc M C A-B S eA/2 c aaa M C A - B S D S D S NOTES - b2 b MAX 0.014 α A A MIN b A L MILLIMETERS MAX A Q SEATING PLANE MIN M (b) D BASE PLANE SYMBOL b1 SECTION A-A D S INCHES (c) NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 105o 90o 105o - 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. α 90o aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2, 3 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. N 8 8 5. This dimension allows for off-center lid, meniscus, and glass overrun. 8 Rev. 0 4/94 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 FN2904.5