HA-2520, HA-2522, HA-2525 Data Sheet 20MHz, High Slew Rate, Uncompensated, High Input Impedance, Operational Amplifiers HA-2520, HA-2522, HA-2525 comprise a series of operational amplifiers delivering an unsurpassed combination of specifications for slew rate, bandwidth and settling time. These dielectrically isolated amplifiers are controlled at closed loop gains greater than 3 without external compensation. In addition, these high performance components also provide low offset current and high input impedance. 120V/µs slew rate and 200ns (0.2%) settling time of these amplifiers make them ideal components for pulse amplification and data acquisition designs. These devices are valuable components for RF and video circuitry requiring up to 20MHz gain bandwidth and 2MHz power bandwidth. For accurate signal conditioning designs the HA-2520, HA-2522, HA-2525’s superior dynamic specifications are complemented by 10nA offset current, 100M input impedance and offset trim capability. June 13, 2014 FN2894.10 Features • High slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 120V/µs • Fast settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200ns • Full power bandwidth . . . . . . . . . . . . . . . . . . . . . . . . 2MHz • Gain bandwidth (AV 3). . . . . . . . . . . . . . . . . . . . . 20MHz • High input impedance . . . . . . . . . . . . . . . . . . . . . . 100M • Low offset current. . . . . . . . . . . . . . . . . . . . . . . . . . . .10nA • Compensation pin for unity gain capability • Pb-free PDIP available (RoHS compliant) Applications • Data acquisition systems • RF amplifiers • Video amplifiers • Signal generators Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HA2-2520-2 HA2- 2520-2 -55 to +125 8 Ld Metal Can T8.C HA7-2520-2 HA7- 2520-2 -55 to +125 8 Ld CerDIP F8.3A HA2-2522-2 HA2- 2522-2 -55 to +125 8 Ld Metal Can T8.C HA3-2525-5Z (Notes 1, 2) HA3- 2525-5Z 8 Ld PDIP E8.3 0 to +75 NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Pb-Free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 1999, 2004-2006, 2009, 2014. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. HA-2520, HA-2522, HA-2525 Pinouts HA-2520, HA-2525 (8 LD CERDIP, 8 LD PDIP) TOP VIEW BAL 1 -IN 2 +IN 3 V- 4 + 8 COMP 7 V+ 6 OUT 5 BAL HA-2520, HA-2522 (8 LD METAL CAN) TOP VIEW COMP 8 BAL IN- 1 - 2 IN+ 7 V+ 6 + 5 3 OUT BAL 4 V- 2 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Absolute Maximum Ratings Thermal Information Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 40V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Thermal Resistance (Typical, Notes 3, 4) JA (°C/W) JC (°C/W) Metal Can Package . . . . . . . . . . . . . . . 165 80 PDIP Package* . . . . . . . . . . . . . . . . . . 96 N/A CERDIP Package. . . . . . . . . . . . . . . . . 135 50 Maximum Junction Temperature (Hermetic Packages) . . . . . +175°C Maximum Junction Temperature (Plastic Package) . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . .seeTB493 Operating Conditions Temperature Range HA-2520/2522-2 . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C HA-2525-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +75°C *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. JA is measured with the component mounted on an evaluation PC board in free air. 4. For JC, the “case temp” location is taken at the package top center. Electrical Specifications VSUPPLY = ±15V HA-2520-2 TEMP MIN (°C) (Note 16) PARAMETER HA-2522-2 TYP MAX (Note 16) 4 8 MIN (Note 16) HA-2525-5 TYP MAX (Note 16) 5 10 MIN (Note 16) TYP MAX (Note 16) UNITS 10 mV 14 mV INPUT CHARACTERISTICS Offset Voltage 25 Full 11 Offset Voltage Drift Full 20 Bias Current 25 100 Full Offset Current 14 25 200 125 400 25 10 Full 5 30 250 125 500 25 20 50 50 20 100 µV/°C 250 nA 500 nA 50 nA 100 nA Input Resistance (Note 5) 25 50 Common Mode Range Full ±10 25 10 Full 7.5 Common Mode Rejection Ratio (Note 7) Full 80 90 74 90 74 90 dB Gain Bandwidth (Notes 5, 8) 25 10 20 10 20 10 20 MHz Minimum Stable Gain 25 3 Output Voltage Swing (Note 6) Full ±10 ±12 ±10 ±12 ±10 ±12 V Output Current (Note 9) 25 ±10 ±20 ±10 ±20 ±10 ±20 mA Full Power Bandwidth (Notes 9, 14) 25 1.5 2.0 1.2 2.0 1.2 2.0 MHz 100 40 100 ±10 40 100 ±10 M V TRANSFER CHARACTERISTICS Large Signal Voltage Gain (Notes 6, 9) 15 7.5 15 5 7.5 15 5 3 kV/V kV/V 3 V/V OUTPUT CHARACTERISTICS 3 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Electrical Specifications VSUPPLY = ±15V (Continued) HA-2520-2 TEMP MIN (°C) (Note 16) PARAMETER HA-2522-2 TYP MAX (Note 16) MIN (Note 16) HA-2525-5 TYP MAX (Note 16) MIN (Note 16) TYP MAX (Note 16) UNITS TRANSIENT RESPONSE (AV = +3) Rise Time (Notes 6, 10, 11, 13) 25 25 50 25 50 25 50 ns Overshoot (Notes 6, 10, 11, 13) 25 25 40 25 50 25 50 % Slew Rate (Notes 6, 10, 17, 15) 25 Settling Time (Notes 6, 10, 17, 15) 25 ±100 ±120 ±80 0.20 ±120 ±80 0.20 ±120 V/µs 0.20 µs POWER SUPPLY CHARACTERISTICS Supply Current 25 Power Supply Rejection Ratio (Note 12) Full 4 80 90 6 4 74 90 6 4 74 90 6 mA dB NOTES: 5. This parameter value is based on design calculations. 6. RL = 2kΩ 7. VCM = ±10V. 8. AV > 10. 9. VO = ±10V. 10. CL = 50pF. 11. VO = ±200mV. 12. V = ±5V. 13. See “Transient Response” Test Circuits and Waveforms. Slew Rate 14. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW = ----------------------------- . 2V PEAK 15. VOUT = ±5V. 16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 17. See “ Slew Rate and Settling Time” Test Circuits and Waveforms. 4 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Test Circuits and Waveforms +1.67V ±67mV INPUT -1.67V +5V INPUT 0V 75% OUTPUT V 25% -5V SLEW RATE = V/t t OVERSHOOT ±200mV 90% ERROR BAND ±10mV FROM FINAL VALUE OUTPUT 10% 0V RISE TIME SETTLING TIME NOTE: Measured on both positive and negative transitions from 0V to +200mV and 0V to -200mV at the output. FIGURE 1. SLEW RATE AND SETTLING TIME FIGURE 2. TRANSIENT RESPONSE 1F V+ INPUT 7 3 + 0.001µF 2 667.2Ω OUTPUT 6 4 1µF 100pF IN 1667Ω + V- OUT 2001Ω 5pF 1333Ω 0.001µF D 50pF 2N4416 G 4999.9Ω S SETTLING TIME TEST POINT 667Ω 2kΩ CR1 CR2 NOTES: 18. AV = -3. 19. Feedback and summing resistor ratios should be 0.1% matched. 20. Clipping diodes CR1 and CR2 are optional. HP5082-2810 recommended. FIGURE 4. SETTLING TIME TEST CIRCUIT FIGURE 3. SLEW RATE AND TRANSIENT RESPONSE V+ 20kΩ IN BAL. V- OUT COMP CC NOTE: Tested offset adjustment range is |VOS + 1mV| minimum referred to output. Typical ranges are ±20mV with RT = 20k FIGURE 5. SUGGESTED VOS ADJUSTMENT AND COMPENSATION HOOK-UP 5 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Schematic Diagram OFFSETPIN 1 BAL 1 200 R2AA Q30 R11 R13 R10 440 1.8k R2A 440 R12 1.8k R2B Q3B Q3A Q16 Q28 V+ 200 R2BB R21 Q29 COMP OFFSET+ BAL 2 C1 1pF R16 R9 Q4B Q4A Q27 Q15 Q23 Q12A Q8 D138 R15 +INPUT Q1A Q2B Q2A Q17 R1A Q1B Q11B R17 50 OUTPUT Q12B R18 30 Q7 R1B Q24 D13A Q18 Q31 Q26 Q6 Q19 Q20 Q21A Q22 R6A Q5B Q5A Q21B Q25 Q11A Q9 Q10 D14 R3A R6B R3B R19 R10 V- -INPUT Typical Application Inverting Unity Gain Circuit 10 5 GAIN 0 -5 -45 PHASE -10 -90 -15 -135 10k IN -180 10k + 2k 500pF 0 PHASE SHIFT (°) 15 GAIN (dB) Figure 6 shows a Compensation Circuit for an inverting unity gain amplifier. The circuit was tested for functionality with supply voltages from ±4V to ±15V, and the performance as tested was: Slew Rate 120V/µs; Bandwidth 10MHz; and Settling Time (0.1%) 500ns. Figure 7 illustrates the amplifier’s frequency response, and it is important to note that capacitance at pin 8 must be minimized for maximum bandwidth. OUT HA-2520 5k 10k 100k 1M 10M FIGURE 7. FREQUENCY RESPONSE FOR INVERTING UNITY GAIN CIRCUIT FIGURE 6. INVERTING UNITY GAIN CIRCUIT 6 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 VS = 15V, TA = +25°C, Unless Otherwise Specified 6 -40 5 -50 -60 4 BIAS CURRENT (nA) OFFSET VOLTAGE (mV) Typical Performance Curves 3 2 1 0 -1 -70 -80 -90 -100 -110 -120 -130 -140 -2 -150 -3 -60 -40 -20 0 20 40 60 80 100 120 -160 -60 -40 -20 0 TEMPERATURE (°C) FIGURE 8. OFFSET VOLTAGE vs TEMPERATURE (6 TYPICAL UNITS FROM 3 LOTS) 20 AVOL (kV/ V) OFFSET BIAS CURRENT (nA) 30 10 0 -10 -20 -40 -20 0 20 40 60 80 100 120 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 -60 -40 -20 TEMPERATURE (°C) 14 OUTPUT VOLTAGE SWING (±V) OUTPUT CURRENT (±mA) 30 20 10 0 -10 -20 -30 8 10 12 14 SUPPLY VOLTAGE (V) FIGURE 12. OUTPUT CURRENT vs SUPPLY VOLTAGE 7 Submit Document Feedback 100 120 0 20 40 60 80 100 120 RL = 2k 12 40 6 80 FIGURE 11. OPEN LOOP GAIN vs TEMPERATURE (6 TYPICAL UNITS FROM 3 LOTS) 50 4 60 TEMPERATURE (°C) FIGURE 10. OFFSET CURRENT vs TEMPERATURE (5 TYPICAL UNITS FROM 3 LOTS) -40 40 FIGURE 9. BIAS CURRENT vs TEMPERATURE (6 TYPICAL UNITS FROM 3 LOTS) 40 -30 -60 20 TEMPERATURE (°C) 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 4 6 8 10 12 14 SUPPLY VOLTAGE (V) FIGURE 13. OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 100 +25°C 80 -55°C 40 20 PHASE AT AV = 100 0 0 -45 -90 OPEN LOOP PHASE 4 6 8 10 12 SUPPLY VOLTAGE (±V) 14 100 1k FIGURE 14. SUPPLY CURRENT vs SUPPLY VOLTAGE 80 0pF 10pF 30pF 50pF 60 40 20 100pF 300pF 0 -20 100 1k 10k 100k 1M 10M 10k 50 INPUT NOISE CURRENT 10 100 5 50 INPUT NOISE VOLTAGE 10 1 5 0.5 1 1 10 100 1k FREQUENCY (Hz) 1.2 NORMALIZED TO ±15V DATA 15 VSUPPLY = 10V 10 5 0 10k RL = 2k 1.1 20 100k 1M 10M FREQUENCY (Hz) FIGURE 18. OUTPUT VOLTAGE SWING vs FREQUENCY 8 Submit Document Feedback 0.1 100k 10k FIGURE 17. INPUT NOISE CHARACTERISTICS VSUPPLY = 20V VSUPPLY = 15V -180 100M 100 FREQUENCY (Hz) 25 10M 500 100M 30 100k 1M FREQUENCY (Hz) 1000 FIGURE 16. OPEN LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM COMP PIN TO GROUND 35 -135 FIGURE 15. FREQUENCY RESPONSE INPUT NOISE VOLTAGE (nV/Hz) 100 OUTPUT VOLTAGE SWING (VP-P) OPEN LOOP GAIN 60 GAIN AT A = 100 V PHASE ANGLE (DEGREES) +125°C INPUT NOISE CURRENT (pA/√Hz) 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 VS = 15V, TA = +25°C, Unless Otherwise Specified (Continued) GAIN (dB) SUPPLY CURRENT (mA) Typical Performance Curves CL = 50pF 1.0 BANDWIDTH 0.9 NEGATIVE SLEW RATE 0.8 0.7 POSITIVE SLEW RATE 0.6 0.5 0.4 5 7 9 11 13 15 17 19 20 SUPPLY VOLTAGE (V) FIGURE 19. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 TRANSISTOR COUNT: 40 Die Characteristics SUBSTRATE POTENTIAL: Unbiased PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout HA-2520, HA-2522, HA-2525 9 Submit Document Feedback COMP V+ OUT BAL -IN +IN BAL V- FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Metal Can Packages (Can) T8.C MIL-STD-1835 MACY1-X8 (A1) REFERENCE PLANE A 8 LEAD METAL CAN PACKAGE e1 L L2 L1 INCHES SYMBOL ØD2 A A k1 Øe ØD ØD1 2 N 1 Øb1 Øb F k C L BASE AND SEATING PLANE Q BASE METAL Øb1 LEAD FINISH Øb2 SECTION A-A NOTES: 1. (All leads) Øb applies between L1 and L2. Øb1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. 3. a is the basic spacing from the centerline of the tab to terminal 1 and b is the basic spacing of each lead or lead position (N -1 places) from a, looking at the bottom of the package. MIN MILLIMETERS MAX MIN MAX NOTES A 0.165 0.185 4.19 4.70 - Øb 0.016 0.019 0.41 0.48 1 Øb1 0.016 0.021 0.41 0.53 1 Øb2 0.016 0.024 0.41 0.61 - ØD 0.335 0.375 8.51 9.40 - ØD1 0.305 0.335 7.75 8.51 - ØD2 0.110 0.160 2.79 4.06 - e e1 0.200 BSC 5.08 BSC 0.100 BSC - 2.54 BSC - F - 0.040 - 1.02 - k 0.027 0.034 0.69 0.86 - k1 0.027 0.045 0.69 1.14 2 12.70 19.05 1 1.27 1 L 0.500 0.750 L1 - 0.050 L2 0.250 - 6.35 - 1 Q 0.010 0.045 0.25 1.14 - - a 45° BSC 45° BSC 3 b 45° BSC 45° BSC 3 N 8 8 4 Rev. 0 5/18/94 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH. 10 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) LEAD FINISH c1 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE -D- -A- BASE METAL (c) E M -Bbbb S C A-B S Q -C- SEATING PLANE S1 b2 b ccc M C A-B S eA/2 - 0.200 - 5.08 - 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.405 - 10.29 5 E 0.220 0.310 5.59 7.87 5 c aaa M C A - B S D S D S NOTES 0.014 eA e MAX b A A MIN A A L MILLIMETERS MAX M (b) D BASE PLANE MIN b1 SECTION A-A D S INCHES SYMBOL NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 105° 90° 105° - 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 90° aaa - 0.015 - 0.38 - 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2, 3 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. N 8 8 8 Rev. 0 4/94 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH 11 Submit Document Feedback FN2894.10 June 13, 2014 HA-2520, HA-2522, HA-2525 Dual-In-Line Plastic Packages (PDIP) E8.3 (JEDEC MS-001-BA ISSUE D) N 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AD E BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 A1 eC B 0.010 (0.25) M C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 0.204 C D 0.355 0.400 9.01 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. eA 0.300 BSC 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eB - L 0.115 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.355 10.16 N 2.54 BSC 7.62 BSC 0.430 - 0.150 2.93 8 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 8 6 10.92 7 3.81 4 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 Submit Document Feedback FN2894.10 June 13, 2014