UNISONIC TECHNOLOGIES CO., LTD VGA7S019 Preliminary TVS 7-CHANNEL INTEGRATED ESD SOLUTION FOR VGA PORT WITH INTEGRATED LEVEL SHIFTER AND MATCHING IMPEDANCE DESCRIPTION The UTC VGA7S019 is an ESD solution for the VGA or DVI-I port connector. This device integrates ESD protection for all signals, level shifting for the DDC signals and buffering for the SYNC signals. ESD protection for the VIDEO, DDC and SYNC lines is implemented with low-capacitance current steering diodes. Separate positive supply rails are provided for the VIDEO, DDC and SYNC channels to facilitate interfacing with low voltage video controller ICs to provide design flexibility in multi-supply-voltage environments. Two non-inverting drivers provide buffering for the HSYNC and VSYNC signals from the video controller IC (SYNC1, SYNC2). These buffers accept TTL input levels and convert them to CMOS output levels that swing between Ground and VCC_SYNC, which is typically 5V. Additionally, each driver has a series termination resistor (RT) connected to the SYNC_OUT pin, eliminating the external termination resistors typically required for the HSYNC and VSYNC lines of the video cable. At the SYNC output the UTC VGA7S019 offers 65-Ω, 55-Ω, or 15-Ω series termination resistor option to match different transmission line impedances. Two N-channel MOSFETs provide the level shifting function required when the DDC controller is operated at a lower supply voltage than the monitor. The gate terminals for the MOSFETs (VCC_DDC) should be connected to the supply rail (typically 3.3V) that supplies power to the transceivers of the DDC controller. The UTC VGA7S019 confirms the IEC61000-4-2 (Level 4) system level ESD protection and ±15KV HBM ESD protection. This device is offered in space-saving SSOP-16 packages. FEATURES * 7 Channels of ESD protection for all VGA port connector pins meeting IEC-61000-4-2 Level 4 ESD requirements (±8kV contact discharge) * Integrated impedance matching resistors on sync lines: –VGA7S019-15: 15Ω Termination –VGA7S019-55: 55Ω Termination –VGA7S019-65: 65Ω Termination * Includes ESD protection, level-shifting, buffering and sync impedance matching www.unisonic.com.tw Copyright © 2016 Unisonic Technologies Co., Ltd * 5V drivers for HSYNC and VSYNC lines * Very low loading capacitance from ESD protection diodes on VIDEO lines (2.5pF) * Bi-Directional level shifting N-Channel FETs provided for DDC_CLK and DDC_DATA channels * Flow-Through single-in-line pin mapping ensures no additional board layout burden while placing the ESD protection chip near the connector 1 of 7 QW-R223-024.c VGA7S019 TVS ORDERING INFORMATION Note: Preliminary Ordering Number VGA7S019G-xx-R16-T VGA7S019G-xx-R16-R xx: Output Voltage, refer to Marking Information. Package SSOP-16 SSOP-16 Packing Tube Tape Reel MARKING UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 7 QW-R223-024.c VGA7S019 Preliminary PIN CONFIGURATION PIN DESCRIPTION PIN NO. PIN NAME 1 VCC_SYNC 2 3 4 5 6 7 VCC_VIDEO VIDEO1 VIDEO2 VIDEO3 GND VCC_DDC 8 BYP 9 10 11 12 13 14 15 16 DDC_OUT1 DDC_IN1 DDC_IN2 DDC_OUT2 SYNC_IN1 SYNC_OUT1 SYNC_IN2 SYNC_OUT2 TVS DESCRIPTION Isolated supply input for the SYNC_1 and SYNC_2 level shifters and their associated ESD protection circuits Supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection circuits High-speed ESD clamp input Ground Isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates Bypass pin. Using a 0.2µF bypass capacitor will increase the ESD robustness of the system. DDC signal output. Connects to the video connector side of one of the sync lines. DDC signal input. Connects to the VGA controller side of one of the sync lines. DDC signal output. Connects to the video connector side of one of the sync lines. Sync signal buffer input. Connects to the VGA controller side of one of the sync lines. Sync signal buffer output. Connects to the video connector side of one of the sync lines Sync signal buffer input. Connects to the VGA controller side of one of the sync lines. Sync signal buffer output. Connects to the video connector side of one of the sync lines UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 7 QW-R223-024.c VGA7S019 Preliminary TVS BLOCK DIAGRAM VIDEO1 VIDEO2 VIDEO3 VCC_VIDEO GND BYP VSYNC VCC_DDC DDC_IN1 RT DDC_IN2 RT SYNC_OUT1 SYNC_OUT2 DDC_OUT2 DDC_OUT1 SYNC_IN1 SYNC_IN2 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 7 QW-R223-024.c VGA7S019 Preliminary TVS ABSOLUTE MAXIMUM RATING over operating free-air temperature range (unless otherwise noted) PARAMETER Supply Voltage IO Voltage Input Voltage Input Voltage Output Voltage IEC 61000-4-2 Contact Discharge HBM ESD VIDEOx Pins SYNC Pins DDC_INx Pins DDC_INx Pins VIDEO, DDC_OUT, SYNC_OUT Pins VIDEO, DDC_OUT, SYNC_OUT Pins VCC, DDC_IN, SYNC_IN, BYP Pins SYMBOL VCC_VIDEO, VCC_DDC, VCC_SYNC VIO(VIDEO) VI(SYNC) VI(DDC) VO(DDC) RATINGS UNIT -0.5~6.0 V -0.5~VCC_VIDEO -0.5~VCC_SYNC -0.5~6.0 -0.5~6.0 V V V V ±8 kV ±15 kV ±2 kV Storage Temperature TSTG -55~125 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) PARAMETER Supply Voltage IO Voltage Input Voltage Input Voltage Output Voltage Operating temperature VIDEOx Pins SYNC Pins DDC_INx Pins DDC_INx Pins SYMBOL VCC_VIDEO, VCC_DDC, VCC_SYNC VIO(VIDEO) VI(SYNC) VI(DDC) VO(DDC) TA UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN TYP MAX UNIT 0 5.5 V 0 0 0 0 -40 VCC_VIDEO VCC_SYNC 5.5 5.5 85 V V V V °C 5 of 7 QW-R223-024.c VGA7S019 Preliminary TVS ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VCC_VIDEO Supply Current SYMBOL ICC_VIDEO VCC_DDC Supply Current ICC_DDC VCC_SYNC Supply Current ICC_SYNC VIDEO Input/Output Pins IIO_VIDEO DDC Pin Power Down IOFF Leakage Current Diode Forward Voltage for Lower Clamp of VIDEO, DDC, VD SYNC Output Pins Dynamic Resistance (VIDEO RDYN_VIDEO Pins) High-Level SYNC Logic Input VIH Voltage Low-Level SYNC Logic Input VIL Voltage High-Level SYNC Logic VOH Output Voltage High-Level SYNC Logic VGA7S019-15 VOH-15 Output Voltage Low-Level SYNC Logic VOL Output Voltage Low-Level SYNC Logic VGA7S019-15 VOL-15 Output Voltage SYNC Driver VGA7S019-15 Output RT VGA7S019-55 Resistance VGA7S019-65 IO Capacitance of VIDEO CIO_VIDEO Pins SYNC Driver L =>H tPLH Propagation Delay SYNC Driver H =>L tPHL Propagation Delay SYNC Driver Output Rise & tR, tF Fall Times VIDEO ESD Diode VBR Break-Down Voltage TEST CONDITIONS VCC_VIDEO=5V, VIDEO Inputs at VCC_VIDEO or GND VCC_DDC=5V SYNC Inputs at GND or VCC_SYNC, SYNC Outputs VCC_SYNC=5V, Unloaded SYNC Inputs at 3V; SYNC Outputs Unloaded VIO_VIDEO=3V VCC_DDC≤0.4V, VDDC_OUT=5V ID=8mA, Lower Clamp Diode -0.6 I=1A VCC_SYNC=5V TYP MAX UNIT 1 10 µA 1 10 µA 1 50 µA 2.0 mA 0.01 1.0 µA 0.01 1.0 µA -0.8 -0.95 V 1.0 Ω 2.0 V VCC_SYNC=5V 0.6 V IOH=0mA, VCC_SYNC=5V 4.85 V IOH=24mA, VCC_SYNC=5V 2 V IOH=0mA, VCC_SYNC=5V 0.15 V IOH=24mA, VCC_SYNC=5V 0.8 V VCC_SYNC=5V, SYNC Inputs at GND or 3V 15 55 65 VIO=2.5V 2.5 Ω Ω Ω 4 pF CL=50pF; VCC=5V, input tR and tF≤5ns 12 ns CL=50pF; VCC=5V, input tR and tF≤5ns 12 ns CL=50pF; VCC=5V, input tR and tF≤5ns IIO=1mA UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 4 9 ns V 6 of 7 QW-R223-024.c VGA7S019 Preliminary TVS TYPICAL APPLICATION CIRCUIT 3.3V 5V 0.1µF 5V RP 0.1µF VCC_DDC 5V RP VCC_VDEO VCC_SYNC BYP 0.1µF 0.22µF VIDEO1 VIDEO2 VGA Controller VIDEO3 RT 5V Red Green Blue SYNC_IN2 SYNC_OUT2 HSYNC SYNC_IN1 SYNC_OUT1 VSYNC DDC_IN2 DDC_OUT2 DDC_CLK DDC_OUT1 UTC VGA7S019 DDC_DAT DDC_IN1 VGA Connector RP: Pullup resistor for the DDC data and clock lines. Typically system designer selects 47kΩ pullup values RT: Line termination resistor for the RGB lines. RT is selected to match the transmission line. For a single-ended transmission line, RT can be anywhere from 50Ω to 75Ω depending on board trace impedance. Some systems may require additional filters at the SYNC and RGB lines. The UTC VGA7S019 should be placed as close to the VGA port as possible. The ESD protection channels VIDEO1, VIDEO2, VIDEO3 are identical circuits, they can be used interchangeably between the R, G, B signals. UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 7 QW-R223-024.c