VS-2N681, VS-2N5205 Series Datasheet

VS-2N681, VS-2N5205 Series
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Vishay Semiconductors
Phase Control Thyristor RMS SCRs, 25 A, 35 A
FEATURES
• General purpose stud mounted
• Broad forward and reverse voltage range through 1200 V
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
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TO-208AA (TO-48)
PRODUCT SUMMARY
IT(AV)
16 A, 22 A
IT(RMS)
25 A, 35 A
VDRM/VRRM
25 V to 1200 V
VTM
2.3 V
IGT
60 mA
TJ
-40 °C to 125 °C
Package
TO-208AA (TO-48)
Diode variation
Single SCR
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
2N681-92
16
IT(AV)
I2t
22
(1)
(1)
UNITS
A
-40 to +40
°C
35
A
50 Hz
145
285
60 Hz
150 (1)
300 (1)
50 Hz
103
410
60 Hz
94
375
40
40
IGT
-65 to +65
2N5205-07
25
TC
IT(RMS)
ITSM
(1)
A2s
mA
(1)
V/μs
dV/dt
-
dI/dt
75 to 100
100
A/μs
25 to 800
600 to 1200
V
VDRM
Range
VRRM
Range
TJ
100
A
25 to 800
600 to 1200
V
-65 to +125 (1)
-40 to +125 (1)
°C
Note
(1) JEDEC® registered value
Revision: 19-Nov-15
Document Number: 93706
1
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VS-2N681, VS-2N5205 Series
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ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS (APPLIED GATE VOLTAGE ZERO OR NEGATIVE)
VRRM/VDRM, MAXIMUM REPETITIVE PEAK
REVERSE AND OFF-STATE VOLTAGE
V
VRSM, MAXIMUM NON-REPETITIVE
PEAK REVERSE VOLTAGE (tp < 5 ms)
V
VS-2N681
25
35
VS-2N682
50
75
VS-2N683
100
150
VS-2N685
200
300
VS-2N687
300
400
VS-2N688
400
500
VS-2N689
500
600
VS-2N690
600
720
VS-2N691
700
840
VS-2N692
800
960
VS-2N5205
800
960
VS-2N5206
1000
1200
VS-2N5207
1200
1440
TYPE NUMBER
TJ
-65 °C to +125 °C
-40 °C to +125 °C
Note
• JEDEC registered values
ON-STATE CONDUCTION
PARAMETER
Maximum average on-state
current at case temperature
Maximum RMS on-state current
SYMBOL
IT(AV)
TEST CONDITIONS
180° half sine wave conduction
IT(RMS)
50 Hz half cycle sine wave
or 6 ms rectangular pulse
Maximum peak, one-cycle
non-repetitive surge current
ITSM
60 Hz half cycle sine wave
or 5 ms rectangular pulse
50 Hz half cycle sine wave
or 6 ms rectangular pulse
60 Hz half cycle sine wave
or 5 ms rectangular pulse
t = 10 ms
Maximum I2t capability for fusing
I2t
t = 8.3 ms
2N681-92
2N5205-07
16 (1)
22 (1)
-65 to +65 (1) -40 to +40 (1)
25
35
145
285
150 (1)
300 (1)
170
340
180
355
Rated VRRM applied
following surge, 
initial TJ = 125 °C
103
410
94
375
VRRM = 0 following
surge, initial TJ = 125 °C
145
580
Following any rated
load condition, and
with rated VRRM applied
following surge
Same conditions as
above except with
VRRM applied following
surge = 0
UNITS
A
°C
A
A
A2s
Maximum I2t capability for
individual device fusing
t = 8.3 ms
135
530
Maximum I2t capability for
individual device fusing
t = 0.1 ms to 10 ms, initial TJ < 125 °C
VRRM applied following surge = 0
1450
5800
A2s
TJ = 25 °C, IT(AV) = 16 A (50 A peak) 2N681,
IT(AV) = 22 A (70 A peak) 2N5204
2 (1)
2.3 (1)
V
20 at 25 °C
(typical)
200 (1) at
-40 °C
mA
Maximum peak on-state voltage
Maximum holding current
t = 10 ms
I2t (2)
VTM
IH
Anode supply 24 V, initial IT = 1.0 A
Notes
(1) JEDEC registered value
(2) I2t for time t = I2t · t
x
x
Revision: 19-Nov-15
Document Number: 93706
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VS-2N681, VS-2N5205 Series
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SWITCHING
PARAMETER
SYMBOL
VDM = 25 V to 600 V
VDM = 700 V to 800 V
Maximum non-repetitive
rate of rise of turned-on
current
dI/dt
Typical delay time
td
TEST CONDITIONS
TC = 125 °C, VDM = Rated VDRM,
ITM = 2 x dI/dt, gate pulse = 20 V,
15 , tp = 6 μs, tr = 0.1 μs maximum
Per JEDEC standard RS-397, 5.2.2.6
2N681-92 2N5205-07 UNITS
100
-
75
A/μs
TC = 125 °C, VDM = 600 V, ITM = 200 A at
400 Hz maximum, gate pulse = 20 V, 15 ,
tp = 6 μs, tr = 0.1 μs maximum 
Per JEDEC standard RS-397, 5.2.2.6
-
100
TC = 25 °C, VDM = Rated VDRM, ITM = 10 A
DC resistive circuit, gate pulse = 10 V,
40  source, tp = 6 μs, tr = 0.1 μs
1
1
μs
BLOCKING
PARAMETER
SYMBOL
Minimum critical rate of
rise of off-state voltage
dV/dt
Maximum reverse
leakage current
TEST CONDITIONS
TJ = 125 °C, exponential
to 100 % rated VDRM
TJ = 125 °C, exponential
to 67 % rated VDRM
Gate open
circuited
2N681-92 2N5205-07 UNITS
100
(typical)
100 (1)
250
(typical)
250
-
V/μs
VRRM, VDRM = 400 V
3.5
VRRM, VDRM = 500 V
3.5
-
VRRM, VDRM = 600 V
2.5
3.3
VRRM, VDRM = 700 V
VRRM, VDRM = 800 V
IDRM,
IRRM
TJ = 125 °C
2.2
-
2
2.5
VRRM, VDRM = 1000 V
-
2
VRRM, VDRM = 1200 V
-
1.7
mA
Note
(1) JEDEC registered value
TRIGGERING
PARAMETER
Maximum peak gate power
SYMBOL
PGM
TEST CONDITIONS
tp < 5 ms for 2N681 series;
tp < 500 μs for 2N5204 series
2N681-92
2N5205-07 UNITS
5 (1)
60 (1)
Maximum average gate power
PG(AV)
0.5 (1)
0.5 (1)
Maximum peak positive gate current
+IGM
2 (1)
2
Maximum peak positive gate voltage
+VGM
10 (1)
-
Maximum peak negative gate voltage
-VGM
5 (1)
5 (1)
80 (1)
80 (1)
TC = 25 °C
40
40
TC = 125 °C
18.5
20
30
30
3 (1)
3 (1)
2
2
1.5
1.5
0.25 (1)
0.25 (1)
Maximum required DC gate
current to trigger
TC = min.
rated value
IGT
TC = 25 °C, + 6 V anode to cathode
Typical DC gate current to trigger
Maximum required DC gate
voltage to trigger
Maximum required gate trigger current
is the lowest value which will trigger all
units with + 6 V anode to cathode
TC = - 65 °C
VGT
Maximum required gate trigger voltage
is the lowest value which will trigger all
units with + 6 V anode to cathode
TC = 25 °C
TC = 25 °C, + 6 V anode to cathode
Typical DC gate voltage to trigger
Maximum DC gate voltage 
not to trigger
VGD
TC = 125 °C
Maximum gate voltage not to trigger is
the maximum value which will not
trigger any unit with rated VDRM anode
to cathode
W
A
V
mA
V
V
Note
(1) JEDEC registered value
Revision: 19-Nov-15
Document Number: 93706
3
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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VS-2N681, VS-2N5205 Series
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THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Operating junction and
storage temperature range
TEST CONDITIONS
TJ, TStg
2N681-92
2N5205-07
UNITS
-65 to 125 (1)
-40 to 125 (1)
°C
Maximum internal thermal resistance,
junction to case
RthJC
DC operation
1.5
1.5 (1)
Typical thermal resistance, 
case to sink
RthCS
Mounting surface, smooth, flat and greased
0.35
0.35
°C/W
Lubricated threads
(Non-lubricated threads)
to nut
20 (27.5)
lbf · in
0.23 (0.32)
kgf · cm
Mounting torque
± 10 %
to device
2.3 (3.1)
N·m
25
lbf · in
0.29
kgf · cm
Lubricated threads
2.8
N·m
14
Approximate weight
0.49
Case style
14
g
0.5
oz.
TO-208AA (TO-48)
180
160
Ø
140
Conduction Period
Sinusoidal Current Waveform
TJ = 125 °C
120
100
80
60
+180°
+30° +60° +90° +120°
40
DC
20
0
0
2
4
6
8 10 12 14 16 18 20 22 24
Instantaneous On-State Current (A)
Maximum Allowable Case Temperature (°C)
Note
(1) JEDEC registered value



200
102
4
10
4
TJ = 125 °C
TJ = 25 °C
1.0
4
10-1
0
1
2
3
4
5
6
7
Average On-State Current Over Full Cycle (A)
Instantaneous On-State Voltage (V)
Fig. 1 - Maximum Allowable Case Temperature
vs. Average On-State Current,
2N681 Series
Fig. 2 - Maximum On-State Voltage vs. Current,
2N681 Series
Revision: 19-Nov-15
Document Number: 93706
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VS-2N681, VS-2N5205 Series
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10
TJ = 125 °C
Sinusoidal
Current
Waveform
60
50
+60°
+30°
+120°
+90°
Instantaneous Gate Voltage (V)
Average Forward Power Loss
Over Full Cycle (W)
70
Vishay Semiconductors
DC
+180°
Controlled
Rectifier
Turned
Fully On
40
30
20
Ø
Conduction Angle
10
Maximum Allowable
Instantaneous Gate
Power Dissipation
5.0 W
9
8
7
6
Area of Certain Triggering
5
Area of All Possible
Triggering Points
4
3
2
1
0
0
0
4
8
12
16
20
24
28
32
0
36
0.2
Average On-State Current Over Full Cycle (A)
Fig. 3 - Maximum Low Level On-State Power Loss vs.
Current (Sinusoidal Current Waveform),
2N681 Series
0.4
0.6
0.8
1.0
1.2
Instantaneous Gate Current (A)
Fig. 5 - Gate Characteristics,
2N681 Series
TJ = 125 °C
Sinusoidal Current Waveform
4
DC
3
+180°
Controlled Rectifier
Turned Fully On
+120°
+90°
+60°
+30°
103
4
-65 °C
Gate Voltage (V)
IF -Average Forward Power Loss
Over Full Cycle (W)
104
102
4
2
25 °C
1
10
125 °C
4
Ø
VGD (Max.) = 0.25 V
Conduction Angle
1.0
1.0
4
10
102
4
4
0
103
0
25
50
Average On-State Current Over Full Cycle (A)
ZthJC - Transient Thermal Impedance (°C/W)
Fig. 4 - Maximum High Level On-State Power Loss vs. Current
(Sinusoidal Current Waveform),
2N681 Series
101
10-1
4
1.0
4
75
100
125
Gate Current (mA)
10
Fig. 5a - Area of All Possible Triggering Points vs. Temperature,
2N681 Series
4
102
4
103
4
104
Free Convection
Forced Convection at 1000 LFM
4
Infinite Heatsink
1.0
1.0
Mounted on Infinite Heatsink
and 4" x 4" x 1/16" Copper Fin
4
4
Long Time Durations
10-1
10-1
4
4
Short Time Durations
10-2
10-2
10
-6
4
-5
10
4
10
-4
4
-3
10
4
-2
10
4
10
-1
t - Square Wave Pulse Duration (s)
Fig. 6 - Maximum Transient Thermal Impedance, Junction to Case, vs. Pulse Duration,
2N681 Series
Revision: 19-Nov-15
Document Number: 93706
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VS-2N681, VS-2N5205 Series
Vishay Semiconductors
90
150
100
Average Forward Power Loss
Over Full Cycle (W)
At Any Maximum Rated Load Condition
And With Rated VRRM Applied Following Surge
60 Hz
50 Hz
50
0
2
4 6 8 10
20
+30°
+60°
+90°
+120°
+180°
70
60
50
40
30
Ø
Conduction Angle
Sinusoidal Current Waveform
TJ = 125 °C
Controlled Rectifier Turned Fully On
20
10
40 60
0
Number Of Equal Amplitude
Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current vs.
Number of Current Pulses,
2N681 Series
5
10
15
20
25
30
35
40
45
50
Average On-State Current Over Full Cycle (A)
Fig. 10 - Maximum Low-Level On-State Power Loss vs.
Average On-State Current (Sinusoidal Current Waveform),
2N5205 Series
140
102
120
Ø
Conduction Period
Sinusoidal Current Waveform
TJ = 125 °C
100
80
+30°
+60°
+90°
+120°
40 +180°
DC
60
20
0
4
8
12
16
20
24
28
32
36
40
104
+30°
+60°
+90°
5
5
+30°
+60°
+90°
2
+120° 2
+180°
DC
103
+120°
+180°
DC
10
5
TJ = 125 °C
5
Ø
2
1.0
1.0
0
Conduction Angle
Sinusoidal Current
Waveform
Controlled Rectifier
Turned Fully On
2
5
10
2
5
102 2
5
2
102
103
Average On-State Current Over Full Cycle (A)
Average On-State Current Over Full Cycle (A)
Fig. 8 - Maximum Allowable Case Temperature vs. Average
On-State Current (Sinusoidal Current Waveform),
2N5205 Series
Fig. 11 - Maximum High-Level On-State Power Loss vs.
Average On-State Current (Sinusoidal Current Waveform),
2N5205 Series
90
140
120
Average Forward Power Loss
Over Full Cycle (W)
Maximum Allowable Case Temperature (°C)
DC
80
0
0
IF -Average Forward Power Loss
Over Full Cycle (W)
Maximum Allowable Case Temperature (°C)
Peak Half Sine Wave On-State Current (A)
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Ø
Conduction Period
Rectangular Current
Waveform TJ = 125 °C
100
80
60
40
+60°
+180°
+90°
+120°
20
DC
80
70
+60°
+90°
+120°
+180°
60
50
DC
40
30
Ø
Conduction Period
Rectangular Current Waveform
TJ = 125 °C
Controlled Rectifier Turned Fully On
20
10
0
0
0
4
8
12
16
20
24
28
32
36
40
0
5
10
15
20
25
30
35
40
45
50
Average On-State Current Over Full Cycle (A)
Average On-State Current Over Full Cycle (A)
Fig. 9 - Maximum Allowable Case Temperature vs.
Average On-State Current (Rectangular Current Waveform),
2N5205 Series
Fig. 12 - Maximum Low-Level On-State Power Loss vs.
Average On-State Current (Rectangular Current Waveform),
2N5205 Series
Revision: 19-Nov-15
Document Number: 93706
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-2N681, VS-2N5205 Series
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104
5
5
+60°
+90°
+60°
+90°
2
5
5
Ø
2
1.0
1.0
+120° 2
+180°
DC
103
+120°
+180°
DC
10
Conduction Period
Controlled Rectifier
Turned Fully On
2
5
Instantaneous On-State Current (A)
IF -Average Forward Power Loss
Over Full Cycle (W)
102
10
TJ = 125 °C
2
5
102 2
5
2
102
103
103
4
102
4
10
TJ = 125 °C
TJ = 25 °C
4
1.0
1
0
2
3
4
5
6
7
Instantaneous On-State Voltage (V)
Fig. 13 - Maximum High-Level On-State Power Loss vs.
Average On-State Current (Rectangular Current Waveform),
2N5205 Series
Fig. 14 - Maximum Instantaneous On-State Voltage vs.
Instantaneous On-State Current,
2N5205 Series
ZthJC - Transient Thermal Impedance (°C/W)
Average On-State Current Over Full Cycle (A)
101
5
10-1
2
5 1.0
2
5
10
2
2
5
102
2
5
103
2
5 104
10
5
2
Steady State Value = 1.5 °C/W
1.0
1.0
Long Time Durations
5
5
2
2
10-1
10-1
5
Short Time Durations
5
2
2
10-2
10-6
2
5 10-5
2
5
10-4
2
5
10-3
2
5
10-2
2
10-2
5 10-1
t - Square Wave Pulse Duration (s)
Fig. 15 - Maximum Transient Thermal Resistance,
Junction to Case vs. Pulse Duration,
2N5205 Series
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95333
Revision: 19-Nov-15
Document Number: 93706
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