VS-25TTS16SPbF Datasheet

VS-25TTS16SPbF
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Vishay Semiconductors
Thyristor Surface Mount, Phase Control SCR, 16 A
FEATURES
Anode
2, 4
4
• Meets MSL level 1, per
LF maximum peak of 260 °C
• Designed
and
JEDEC®-JESD 47
2
3
1
qualified
J-STD-020,
according
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
3
Cathode Gate
1
TO-263AB (D2PAK)
APPLICATIONS
• Input rectification (soft start)
PRODUCT SUMMARY
Package
TO-263AB (D2PAK)
Diode variation
Single SCR
IT(AV)
16 A
VDRM/VRRM
1600 V
VTM
1.25 V
IGT
45 mA
TJ
-40 to 125 °C
• Vishay input diodes, switches and output rectifiers which
are available in identical package outlines
DESCRIPTION
The VS-25TTS16SPbF of silicon controlled rectifiers is
specifically designed for medium power switching and
phase control applications. The glass passivation
technology used has reliable operation up to 125 °C junction
temperature.
OUTPUT CURRENT IN TYPICAL APPLICATIONS
APPLICATIONS
SINGLE-PHASE BRIDGE
THREE-PHASE BRIDGE
NEMA FR-4 or G10 glass fabric-based epoxy
with 4 oz. (140 μm) copper
3.5
5.5
Aluminum IMS, RthCA = 15 °C/W
8.5
13.5
Aluminum IMS with heatsink, RthCA = 5 °C/W
16.5
25.0
UNITS
A
Note
• TA = 55 °C, TJ = 125 °C, footprint 300 mm2
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
IT(AV)
TEST CONDITIONS
Sinusoidal waveform
IRMS
VALUES
16
25
UNITS
A
VRRM/VDRM
1600
V
ITSM
350
A
VT
16 A, TJ = 25 °C
dV/dt
dI/dt
1.25
V
500
V/μs
150
A/μs
-40 to +125
°C
VRRM, MAXIMUM PEAK
REVERSE VOLTAGE
V
VDRM, MAXIMUM PEAK
DIRECT VOLTAGE
V
IRRM/IDRM,
AT 125 °C
mA
1600
1600
10
TJ
VOLTAGE RATINGS
PART NUMBER
VS-25TTS16SPbF
Revision: 09-Jul-15
Document Number: 94679
1
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VS-25TTS16SPbF
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Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
Maximum average on-state current
IT(AV)
Maximum RMS on-state current
IRMS
Maximum peak, one-cycle, 
non-repetitive surge current
ITSM
TEST CONDITIONS
VALUES
TYP.
MAX.
TC = 93 °C, 180° conduction half sine wave
16
10 ms sine pulse, rated VRRM applied
300
UNITS
25
10 ms sine pulse, no voltage reapplied
350
10 ms sine pulse, rated VRRM applied
450
10 ms sine pulse, no voltage reapplied
630
A
Maximum I2t for fusing
I2t
Maximum I2t for fusing
I2t
t = 0.1 ms to 10 ms, no voltage reapplied
6300
A2s
Maximum on-state voltage drop
VTM
16 A, TJ = 25 °C
1.25
V
12.0
m
1.0
V
On-state slope resistance
Threshold voltage
Maximum reverse and direct leakage current
Holding current
Maximum latching current
rt
VT(TO)
IRM/IDM
IH
IL
Maximum rate of rise of off-state voltage
dV/dt
Maximum rate of rise of turned-on current
dI/dt
TJ = 125 °C
TJ = 25 °C
TJ = 125 °C
0.5
VR = Rated VRRM/VDRM
Anode supply = 6 V,
resistive load, initial IT = 1 A, TJ = 25 °C
A2s
10
-
150
mA
Anode supply = 6 V, resistive load, TJ = 25 °C
200
TJ = TJ max., linear to 80 %, VDRM = Rg - k = Open
500
V/μs
150
A/μs
TRIGGERING
PARAMETER
Maximum peak gate power
SYMBOL
TEST CONDITIONS
VALUES
UNITS
PGM
8.0
Maximum average gate power
PG(AV)
2.0
Maximum peak positive gate current
+ IGM
1.5
A
Maximum peak negative gate voltage
- VGM
10
V
Anode supply = 6 V, resistive load, TJ = - 10 °C
Maximum required DC gate current to trigger
Maximum required DC gate voltage to trigger
IGT
VGT
Maximum DC gate voltage not to trigger
VGD
Maximum DC gate current not to trigger
IGD
60
Anode supply = 6 V, resistive load, TJ = 25 °C
45
Anode supply = 6 V, resistive load, TJ = 125 °C
20
Anode supply = 6 V, resistive load, TJ = - 10 °C
2.5
Anode supply = 6 V, resistive load, TJ = 25 °C
2.0
Anode supply = 6 V, resistive load, TJ = 125 °C
1.0
TJ = 125 °C, VDRM = Rated value
W
mA
V
0.25
2.0
mA
VALUES
UNITS
SWITCHING
PARAMETER
SYMBOL
Typical turn-on time
tgt
Typical reverse recovery time
trr
Typical turn-off time
tq
TEST CONDITIONS
TJ = 25 °C
TJ = 125 °C
0.9
4
μs
110
Revision: 09-Jul-15
Document Number: 94679
2
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-25TTS16SPbF
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Vishay Semiconductors
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Maximum junction and storage
temperature range
TEST CONDITIONS
VALUES
TJ, TStg
Soldering temperature
TS
Maximum thermal resistance, 
junction to case
RthJC
UNITS
-40 to +125
For 10 s (1.6 mm from case)
260
DC operation
1.1
°C
°C/W
Typical thermal resistance, 
junction to ambient (PCB mount)
RthJA (1)
40
Approximate weight
2
g
0.07
oz.
Case style D2PAK (SMD-220)
Marking device
25TTS16S
130
Maximum Averag e On-state Power Loss (W)
Maximum Allowable Case Tempera ture (°C)
Note
(1) When mounted on 1" square (650 mm2) PCB of FR-4 or G-10 material 4 oz. (140 μm] copper 40 °C/W
For recommended footprint and soldering techniques refer to application note #AN-994
R thJC (DC) = 1.1 °C/ W
120
Conduc tion Angle
110
30°
60°
90°
100
120°
180°
90
0
5
10
15
25
180°
120°
90°
60°
30°
20
15
RMSLimit
10
Conduc tion Angle
5
TJ= 125°C
0
20
0
Maximum Averag e On-state Power Loss (W)
Maximum Allowable Case Temperature (°C)
R thJC (DC) = 1.1 °C/ W
120
Conduction Period
100
60°
90°
120°
30°
180°
DC
80
0
5
10
15
20
25
Average On-sta te Current (A)
Fig. 2 - Current Rating Characteristics
12
16
20
Fig. 3 - On-State Power Loss Characteristics
130
90
8
Avera ge On-state Current (A)
Average On-sta te Current (A)
Fig. 1 - Current Rating Characteristics
110
4
30
35
DC
180°
120°
90°
60°
30°
30
25
20
RMS Limit
15
Conduction Period
10
5
T J = 125°C
0
0
5
10
15
20
25
30
Avera ge On-sta te Current (A)
Fig. 4 - On-State Power Loss Characteristics
Revision: 09-Jul-15
Document Number: 94679
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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VS-25TTS16SPbF
350
Vishay Semiconductors
400
At Any Rated Load Condition And With
Rated V RRM Applied Following Surge.
Initial TJ = 125°C
@60 Hz 0.0083 s
@50 Hz 0.0100 s
300
Peak Half Sine Wa ve On-state Current (A)
Pea k Half Sine Wave On-sta te Current (A)
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250
200
150
1
10
100
350
300
Maximum Non Repetitive Surge Current
Versus Pulse Train Duration. Control
Of Cond uc tion Ma y Not Be Ma inta ined.
Initia l TJ = 125°C
No Voltage Rea pp lied
Rated VRRM Reapp lied
250
200
150
100
0.01
0.1
1
Pulse Train Duration (s)
Number Of Equal Amplitude Half Cyc le Current Pulses (N)
Fig. 5 - Maximum Non-Repetitive Surge Current
Fig. 6 - Maximum Non-Repetitive Surge Current
Instantaneous On-state Current (A)
1000
100
TJ= 25°C
TJ= 125°C
10
1
0
1
2
3
4
5
Instantaneous On-state Voltage (V)
Transient Thermal Imped anc e Z thJC (°C/W)
Fig. 7 - On-State Voltage Drop Characteristics
10
Steady State Value
(DC Opera tion)
1
0.1
D = 0.50
D = 0.33
D = 0.25
D = 0.17
D = 0.08
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Fig. 8 - Gate Characteristics
Revision: 09-Jul-15
Document Number: 94679
4
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-25TTS16SPbF
www.vishay.com
Vishay Semiconductors
Rec tangular gate pulse
a)Rec ommended load line for
rated di/ dt: 10 V, 20 ohms
tr = 0.5 µs, tp >= 6 µs
b)Rec ommended load line for
<= 30% rated d i/ dt: 10 V, 65 ohms
10
tr = 1 µs, tp >= 6 µs
(1)
(2)
(3)
(4)
PGM = 40 W, tp = 1 ms
PGM = 20 W, tp = 2 ms
PGM = 8 W, tp = 5 ms
PGM = 4 W, tp = 10 ms
(a )
(b)
VGD
TJ = -10 °C
TJ = 125 °C
1
TJ = 25 °C
Instantaneous Gate Voltage (V)
100
(4)
IGD
(2)
(3)
(1)
Frequency Limited by PG(AV)
0.1
0.001
0.01
0.1
1
10
100
Instantaneous Gate Current (A)
Fig. 9 - Thermal Impedance ZthJC Characteristics
ORDERING INFORMATION TABLE
Device code
VS-
25
T
T
S
16
S
1
2
3
4
5
6
7
1
-
Vishay Semiconductors product
2
-
Current rating (25 = 25 A)
3
-
4
-
5
-
6
-
Circuit configuration:
T = single thyristor
Package:
T = TO-220AC
Type of silicon:
S = standard recovery rectifier
Voltage rating: voltage code x 100 = VRRM
D2PAK
7
-
S = TO-220
8
-
9
-
None = tube
TRL = tape and reel (left oriented)
TRR = tape and reel (right oriented)
PbF = lead (Pb)-free
TRL PbF
8
9
16 = 1600 V
(SMD-220) version
ORDERING INFORMATION (Example)
PREFERRED P/N
QUANTITY PER T/R
MINIMUM ORDER QUANTITY
PACKAGING DESCRIPTION
VS-25TTS16SPbF
50
1000
Antistatic plastic tubes
VS-25TTS16STRRPbF
800
800
13" diameter reel
VS-25TTS16STRLPbF
800
800
13" diameter reel
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95046
Part marking information
www.vishay.com/doc?95054
Packaging information
www.vishay.com/doc?95032
Revision: 09-Jul-15
Document Number: 94679
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For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
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Vishay Semiconductors
D2PAK
DIMENSIONS in millimeters and inches
Conforms to JEDEC® outline D2 PAK (SMD-220)
(2)(3)
E
B
Pad layout
A
A
(E)
c2
11.00
MIN.
(0.43)
A
(3) L1
4
9.65
MIN.
(0.38)
(D1) (3)
Detail A
D
H
1
2
17.90 (0.70)
15.00 (0.625)
(2)
3
3.81
MIN.
(0.15)
L2
B
B
2.32
MIN.
(0.08)
A
2 x b2
c
2.64 (0.103)
2.41 (0.096)
(3)
E1
C
View A - A
2xb
± 0.004 M B
0.010 M A M B
Plating
Base
Metal
(4)
b1, b3
H
2x e
Gauge
plane
c1 (4)
(c)
B
0° to 8°
Seating
plane
L3
Lead tip
A1
L
(b, b2)
L4
Section B - B and C - C
Scale: None
Detail “A”
Rotated 90 °CW
Scale: 8:1
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
A
4.06
4.83
0.160
0.190
D1
6.86
8.00
0.270
0.315
3
A1
0.00
0.254
0.000
0.010
E
9.65
10.67
0.380
0.420
2, 3
E1
7.90
8.80
0.311
0.346
3
b
0.51
0.99
0.020
0.039
b1
0.51
0.89
0.020
0.035
b2
1.14
1.78
0.045
0.070
b3
1.14
1.73
0.045
0.068
c
0.38
0.74
0.015
0.029
c1
0.38
0.58
0.015
0.023
c2
1.14
1.65
0.045
0.065
D
8.51
9.65
0.335
0.380
4
e
2.54 BSC
0.100 BSC
H
14.61
15.88
0.575
0.625
4
L
1.78
2.79
0.070
0.110
L1
-
1.65
-
0.066
4
L2
1.27
1.78
0.050
0.070
2
L4
L3
0.25 BSC
4.78
5.28
3
0.010 BSC
0.188
0.208
Notes
(1) Dimensioning and tolerancing per ASME Y14.5 M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Datum A and B to be determined at datum plane H
(6) Controlling dimension: inch
(7) Outline conforms to JEDEC® outline TO-263AB
Revision: 08-Jul-15
Document Number: 95046
1
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
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Revision: 02-Oct-12
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Document Number: 91000