AN057

A pp l ic a t io n N o t e, R e v . 2. 0 , J a n. 2 00 7
A p p li c a t i o n N o t e N o . 0 5 7
A 1 . 9 G H z L o w N o i s e A m p l i f i e r o pt i m i z e d f o r h i g h
IP3 using BFP540
R F & P r o t e c ti o n D e v i c e s
Edition 2007-01-08
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2009.
All Rights Reserved.
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Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
Revision History: 2007-01-08, Rev. 2.0
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Application Note
3
Rev. 2.0, 2007-01-08
Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
1
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using
BFP540
Features
•
•
•
•
NF = 1.3 dB
Gain = 15.5 dB
OIP3 = 24 dBm
Small SOT343 package
3
2
4
1
Description
Infineon‘s BFP540 is a high performance, low cost silicon bipolar transistor housed in a 4-lead ultra-miniature
SOT343 surface mount package. This device is designed for applications requiring high performance such LNAs,
VCOs, portable telephones, spread spectrum transceivers and other low noise applications. Applying Infineon‘s
BFP540, low noise, high gain, high linearity at low power consumption are possible.
This application note describes a low noise, high gain, low component count LNA for 1900 MHz, and it also
provides general guidelines for improving 3rd order intercept performance for Infineon grounded emitter
transistors.
Figure 1 shows a low noise amplifier stage for 1900 MHz using BFP540. The circuit described is useful for low
cost, battery-powered applications such as the LNA stage for a CDMA handset. The design goals were gain > 15
dB, NF < 1.4 dB, input and output return losses better than 10 dB, OIP3 > 20 dBm, unconditional stability and low
PC board area.
Table 1 shows the measured parameter values. These values includes the losses of the SMA connectors and
microstrip lines of the FR4 epoxy board. If the connector and PCB loss were extracted, the noise figure result
would improve by 0.1-0.2 dB. Figure 1 to Figure 4 shows the schematic and the layout of the amplifier.
Table 1
Measured parameter values at 1900 MHz, 25 °C, ICC
Parameter
Symbol
Unit
Value
Reference (Figures)
dB
15.5
Gain vs Frequency at 1900 MHz
dB
1.3
NF vs Frequency (25 °C)
dB
9
Input Return Loss vs Frequency
dB
15
Output Return Loss vs. Frequency
Third-Order Intercept Point
Gp
NF
RLin
RLout
OIP3
dBm
24
IP3 measurement at VCC = 3 V, ICC
= 6.5 mA, Pin = -28 dBm per tone
(OIP3 ≅ 24 dBm)
Output Power at 1 dB Compression
P1dB
dBm
-1
Gain, Pout vs. Pin at 1900 MHz (P1dB
= - 1 dBm)
2
Power Gain (|S21| )
Noise Figure
Input Return Loss
Output Return Loss
Application Note
4
Rev. 2.0, 2007-01-08
Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
Vcc
J2
R3
C3
C4
C5
R2
R1
C8
C7
C6
L3
L2
RFout
C2
RFin
C1
V1
L1
A N057_Schematic.vsd
Figure 1
Schematic of 1900 MHz Amplifier
Table 2
Component Part list
Name
Value
Package
Manufacturer
Function
C1
6.8 pF
0402
Murata (COG)
Input matching
C2
100 pF
0402
Murata (COG)
DC block
C3
6.8 µF
-
S+M (10 V)
Block capacitor and improve IP3
C4
10 nF
0402
Murata (X7R)
Block capacitor
C5
100 nF
0402
Murata (COG)
RF decoupling
C6
15 pF
0402
Murata (COG)
RF decoupling
C7
-
-
-
Not applied
C8
47 nF
0603
S+M (X7R)
To improve IP3-performance
L1
5.6 nH
0402
S+M
Input matching
L2
4.7 nH
0402
S+M
Output matching
L3
100 nH
0402
S+M
Biasing
R1
15 Ω
0402
S+M
Improves stability
R2
22 kΩ
0402
S+M
Biasing
R3
120 Ω
0402
S+M
Set for desired supply voltage
V1
BFP540
SOT343
Infineon
X1
SMA-connector
SMA
Johnson
X2
SMA-connector
SMA
Johnson
J1
5 Pin
STOCKO / MKS1650
PIN connector
J2
3 Pin
APEM / NK 236
Switches LNA ON/OFF
Application Note
5
Rev. 2.0, 2007-01-08
Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
AN057_Application_board.vs
Figure 2
Application Board (scale 2:1, orginal size 23 x 35 mm)
AN057_Layers_PCB_Board.vsd
Figure 3
Top, Middle and Bottom layers of PCB-Board
Top side
Top Layer
Middle Layer
0.2 mm FR4,
doublesided Cu. 35 µ
0.74 mm FR4
for mechanical
stabilization
Bottom Layer
Bottom side
Cu 35 µ
AN057_cross-section_P CB_Board.vsd
Figure 4
Cross-Section of PCB-Board
Application Note
6
Rev. 2.0, 2007-01-08
Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
1.1
Measured parameter values
The curves shows the measured parameter values at 25 °C, VCC = 3.0 V and 1900 MHz unlesses otherwise noted.
These values include the losses of the SMA connectors and microstrip lines of the 0.2 mm FR4 epoxy board. The
first four curves show the S-parameter. The noise figure, output power and gain are presented in the following two
and stability factors, calculated from the S-parameters measured at the SMA-connectors is shown subsequently.
Finally the IP3 measurement with Pin = -28 dBm are presented in the last two curves.
1.2
Improving the IP3
The IP3 is usually determined by using a two tone test, i.e. two equal carriers generate distortion products, both
in-band and out of band (Figure 5)
f2-f1
2f1-f2
f1
f2
2f2-f1
AN057_intermodulation_distortion.vs
Figure 5
Two tone test and generated intermodulation distortion
This product (f2-f1) is a low frequency product that is generated, which can modulate the base-emitter and
collector-emitter voltages of a transistor used in a amplifier, This results an fluctuating base voltage and collector
voltage. For good linearity, a constant base and collector voltage are requiered. Lowering the collector voltage
causes an amplifier to saturate earlier thus decreasing linearity for certain power level. The base voltage
determines the quiescent current for the device, and thus the linearity.
A fluctuating base voltage would change the linearity of the amplifier. Therefore it is important to apply proper
bypassing at both collector and base. In Figure 1 C3 is a low frequency decoupling capacitor for the collector and
C8 for the base. In most cases, a 47 nF to 220 nF capacitor is sufficient at the base. C8 improves the IP3
considerably. An improvement of 5 to 12 dBm can be expected. Similar effects can be expected when C3 is also
applied, however the effects are less dramatic.
1.3
•
•
•
•
In order to optimise the design for a particular application, observe the
following points
The input return loss can be improved by reducing L1 from 5.6 nH to 4.7 nH, however this will also increase
the noise figure.
The stability margin can be increased by increasing the value of R1.
For other supply voltages resistor R3 can be used to help setting the collector voltage for a given collector
current. For a supply voltage of VCC = 3 V and ICC = 6.5 mA the following resistor R3 is recommended: (3 V 2.2 V) / 6.5 mA = R3 ≅ 120 Ω (see Figure 1). R3 also helps to cancel the HFE-spread and helps to stabilise
device current over supply voltage and temperature variation.
Consider the LNA on/off switching time which is primarily determined by the time constant set by the R2 C8
combination.
Application Note
7
Rev. 2.0, 2007-01-08
Application Note No. 057
0
18
-2
16
-4
14
gain [dB]
return loss [dB]
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
-6
-8
10
-10
8
-12
1500
1600
1700
1800
1900
frequency [MHz]
6
1500
2000
Input Return Loss vs Frequency
0
-4
-5
-6
-10
-8
-15
-20
-25
-30
1500
1700
1800
1900
frequency [MHz]
2000
-10
-12
-14
1600
1700
1800
1900
frequency [MHz]
Reverse Isolation vs. Frequency
Application Note
1600
Gain vs Frequency at 1900 MHz
return loss [dB]
reverse isolation [dB]
12
-16
1500
2000
1600
1700
1800
1900
frequency [MHz]
2000
Output Return Loss vs. Frequency
8
Rev. 2.0, 2007-01-08
Application Note No. 057
2.2
20
2
15
Pout [dBm], gain [dB]
noise figure [dB]
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
1.8
1.6
1.4
1.2
10
5
0
-5
…....
-10
1
1500
1600
1700
1800
1900
-15
-35
2000
____
-30
-25
-20
-10
-5
Pin
frequency [MHz]
Gain, Pout vs. Pin at 1900 MHz (P1dB = - 1 dBm)
NF vs Frequency (25 °C)
28
4
3.5
µ
K
|∆|
3
26
24
2.5
OIP3 [dBm]
K [1], |Det| [1], µ [1]
-15
Pout
Gain
2
1.5
22
20
18
1
---- 25°C
……
85°C
____
-40°C
16
0.5
14
0
0
1000
2000
3000
4000
5000
2.5
6000
Stability Factor µ, K, the magnitude of the S-matrix
determinant vs. Frequency
Application Note
2.7
2.9
3.1
3.3
3.5
Vcc [V]
frequency [MHz]
OIP3 vs. VCC and Temperature
9
Rev. 2.0, 2007-01-08
Application Note No. 057
A 1.9 GHz Low Noise Amplifier optimized for high IP3 using BFP540
AN057_IP3 measurement.vsd
Figure 6
IP3 measurement at VCC = 3 V, ICC = 6.5 mA, Pin = -28 dBm per tone (OIP3 ≅ 24 dBm)
Application Note
10
Rev. 2.0, 2007-01-08