Si2325DS Vishay Siliconix P-Channel 150-V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) - 150 RDS(on) (Ω) ID (A) 1.2 at VGS = - 10 V - 0.69 1.3 at VGS = - 6.0 V - 0.66 • Halogen-free According to IEC 61249-2-21 Available • TrenchFET® Power MOSFET • Ultra Low On-Resistance • Small Size Qg (Typ.) 7.7 APPLICATIONS • Active Clamp Circuits in DC/DC Power Supplies TO-236 (SOT-23) G 1 3 S D 2 Top View Si2325DS (D5)* * Marking Code Ordering Information: Si2325DS -T1-E3 (Lead (Pb)-free) Si2325DS -T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Symbol 5s Steady State Drain-Source Voltage VDS - 150 Gate-Source Voltage VGS ± 20 TA = 25 °C Continuous Drain Current (TJ = 150 °C)a, b TA = 70 °C ID a, b IS Continuous Source Current (Diode Conduction) Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipationa, b L = 1.0 mH TA = 25 °C TA = 70 °C - 0.53 - 0.55 - 0.43 - 1.6 - 0.6 IAS 4.5 1.01 mJ 1.25 0.75 0.8 0.48 TJ, Tstg Operating Junction and Storage Temperature Range A - 1.0 EAS PD V - 0.69 IDM Pulsed Drain Current Unit - 55 to 150 W °C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambienta Maximum Junction-to-Foot (Drain) Symbol t≤5s Steady State Steady State RthJA RthJF Typical Maximum 75 100 120 166 40 50 Unit °C/W Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Pulse width limited by maximum junction temperature. Document Number: 73238 S09-0133-Rev. B, 02-Feb-09 www.vishay.com 1 Si2325DS Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Limits Parameter Symbol Test Conditions Min. V(BR)DSS VGS = 0 V, ID = - 250 µA - 150 VGS(th) VDS = VGS, ID = - 250 µA - 2.5 IGSS VDS = 0 V, VGS = ± 20 V ± 100 VDS = - 150 V, VGS = 0 V -1 VDS = - 150 V, VGS = 0 V, TJ = 55 °C - 10 Typ. Max. Unit Static Drain-Source Breakdown Voltage Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-Resistancea Forward Transconductancea Diode Forward Voltage VDS ≤ - 15 V, VGS = 10 V - 4.5 - 1.6 nA µA A VGS = - 10 V, ID = - 0.5 A 1.0 1.2 VGS = - 6.0 V, ID = - 0.5 A 1.05 1.3 gfs VDS = - 15 V, ID = - 0.5 A 2.2 VSD IS = - 1.0 A, VGS = 0 V 0.7 - 1.2 7.7 12 RDS(on) V Ω S V Dynamicb Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = - 75 V, VGS = 10 V, ID ≅ - 0.5 A f = 1.0 MHz 2.5 Ω 9 340 VDS = - 25 V, VGS = 0 V, f = 1 MHz nC 1.5 510 pF 30 16 Switchingc Turn-On Time Turn-Off Time Body Diode Reverse Recovery Charge td(on) tr td(off) tf Qrr VDD = - 75 V, RL = 75 Ω ID ≅ - 1.0 A, VGEN = - 10 V Rg = 6 Ω IF = 0.5 A, dI/dt = 100 A/µs 7 11 11 17 16 25 11 17 90 135 ns nC Notes: a. Pulse test: PW ≤ 300 µs duty cycle ≤ 2 %. b. For DESIGN AID ONLY, not subject to production testing. c. Switching time is essentially independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 73238 S09-0133-Rev. B, 02-Feb-09 Si2325DS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1.6 1.6 VGS = 10 thru 5 V 1.4 1.4 1.2 I D - Drain Current (A) I D - Drain Current (A) 1.2 1.0 0.8 0.6 0.4 1.0 0.8 0.6 TC = 125 °C 0.4 0.2 - 55 °C 3V 0.0 0 2 4 25 °C 0.2 4V 6 8 0.0 10 0 1 VDS - Drain-to-Source Voltage (V) 2 3 4 5 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 2.00 500 400 1.50 1.25 C - Capacitance (pF) R DS(on) - On-Resistance (Ω) 1.75 VGS = 6 V 1.00 VGS = 10 V 0.75 Ciss 300 200 0.50 100 0.25 Coss 0.00 0.0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 Crss 0 30 ID - Drain Current (A) 60 120 150 VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current Capacitance 10 2.5 VDS = 75 V ID = 0.5 A VGS = 10 V ID = 0.5 A 8 6 4 2 (Normalized) 2.0 R DS(on) - On-Resistance VGS - Gate-to-Source Voltage (V) 90 1.5 1.0 0.5 0 0 1 2 3 4 5 6 Qg - Total Gate Charge (nC) Gate Charge Document Number: 73238 S09-0133-Rev. B, 02-Feb-09 7 8 0.0 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature www.vishay.com 3 Si2325DS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 3.0 3 ID = 0.5 A RDS(on) - On-Resistance (Ω) 2.5 I S - Source Current (A) TJ = 150 °C 1 TJ = 25 °C 2.0 1.5 1.0 0.5 0.0 0.1 0 0.2 0.4 0.6 0.8 1.0 1.2 0 1.4 2 6 8 10 VGS - Gate-to-Source Voltage (V) VSD - Source-to-Drain Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 1.3 12 1.0 10 ID = 250 µA 0.7 8 Power (W) VGS(th) Variance (V) 4 0.4 0.1 6 4 TA = 25 °C - 0.2 - 0.5 - 50 2 0 - 25 0 25 50 75 100 125 150 0.01 0.1 1 10 TJ - Temperature (°C) Time (s) Threshold Voltage Single Pulse Power 100 600 10 IDM Limited Limited by R DS(on)* 10 µs 100 µs I D - Drain Current (A) 1 1 ms 0.1 10 ms ID(on) Limited 0.01 100 ms TA = 25 °C Single Pulse 10 s, 1 s 100 s, DC BVDSS Limited 0.001 0.1 1 10 100 1000 VDS - Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified Safe Operating Area www.vishay.com 4 Document Number: 73238 S09-0133-Rev. B, 02-Feb-09 Si2325DS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 t1 0.05 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 120 °C/W 0.02 3. T JM - TA = PDMZthJA(t) 4. Surface Mounted Single Pulse 0.01 10-4 10-3 10-2 10-1 1 10 100 600 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73238. Document Number: 73238 S09-0133-Rev. B, 02-Feb-09 www.vishay.com 5 Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 1 E 2 e S e1 D 0.10 mm C 0.004" A2 A C q Gauge Plane Seating Plane Seating Plane C A1 Dim 0.25 mm L L1 MILLIMETERS Min INCHES Max Min Max 0.044 A 0.89 1.12 0.035 A1 0.01 0.10 0.0004 0.004 A2 0.88 1.02 0.0346 0.040 b 0.35 0.50 0.014 0.020 c 0.085 0.18 0.003 0.007 D 2.80 3.04 0.110 0.120 E 2.10 2.64 0.083 0.104 E1 1.20 1.40 0.047 e 0.95 BSC e1 L 1.90 BSC 0.40 L1 q 0.0748 Ref 0.60 0.016 0.64 Ref S 0.024 0.025 Ref 0.50 Ref 3° 0.055 0.0374 Ref 0.020 Ref 8° 3° 8° ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 Document Number: 71196 09-Jul-01 www.vishay.com 1 AN807 Vishay Siliconix Mounting LITTLE FOOTR SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. ambient air. This pattern uses all the available area underneath the body for this purpose. 0.114 2.9 0.081 2.05 0.150 3.8 0.059 1.5 0.0394 1.0 0.037 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board. Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the Document Number: 70739 26-Nov-03 Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device. www.vishay.com 1 Application Note 826 Vishay Siliconix 0.049 (1.245) 0.029 0.022 (0.559) (0.724) 0.037 (0.950) (2.692) 0.106 RECOMMENDED MINIMUM PADS FOR SOT-23 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72609 Revision: 21-Jan-08 www.vishay.com 25 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000