Paralleling of EconoPACK™+

Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 1
Department: SM-AE
Paralleling of EconoPACKTM+
1. EconoPACKTM+ Design
2. Paralleling of IGBT3 and EmCon HE diodes
3. Methods of paralleling EconoPACKTM+
4. Dynamic and static current sharing of parallel circuits
5. IGBT control
6. Symmetry by means of output inductors
7. Symmety by means of a ring circuit of chokes
1. EconoPACKTM+ Design
The EconoPACKTM+ is designed for flexible use in various applications,
ranging from the “SixPACK” configuration to a multi-parallel circuit. Whilst it
is an internal parallel circuit when using the EconoPACKTM+ modules as a
“SixPACK”, for additional external paralleling of the half-bridge sections of
the EconoPACKTM+ some application rules have to be observed to make full
use of the parallel configuration.
U
-
W
V
+
-
+
-
+
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 2
Department: SM-AE
2. Paralleling of IGBT3 and EmCon HE diodes
The EconoPACKTM+ module is exclusively equipped with IGBT3 and
EmCon HE or EmCon3 diodes. Both semiconductors are developed and
manufactured by Infineon in co-operation with eupec. The advantage for
paralleling is given by the NPT Fieldstop technology.
This offers a positive temperature coefficient over the entire range for the
IGBTs as well as a positive temperature coefficient at and above rated
current for the diodes. Notably beneficial is the very low distribution of the
VCE sat , VF and the VGeth values. All these features result in excellent parallel
switching performance.
3. Methods of paralleling EconoPACKTM+
In a dual parallel configuration 3 times 2 half-bridges are connected in
parallel. The paralleling is done by externally connecting of the phase
outputs.
U
- +
V
- +
- +
W
- +
- +
Fig. 2 : Dual parallel connection
- +
In a threefold parallel configuration each EconoPACKTM+ is connected as a
half-bridge. Here too the paralleling is done externally, yet more care has to
be taken with the symmetrical connection of the three half-bridge sections.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 3
Department: SM-AE
U
- +
- +
V
- +
-
+
- +
W
- +
- +
- +
- +
Fig. 3: Threefold parallel configuration
Paralleling more than three half-bridges is possible. However, it is
recommended to parallel stacks or to use eupec IHM-modules.
4. Dynamic and static current sharing of parallel
circuits
The symmetry of the current sharing among IGBT modules connected in
parallel depends on several factors. We need to differentiate between static
and dynamic current sharing.
The static current sharing can be defined with turned-on IGBT and current
flowing by:
a) The difference of the resistive components of each half-bridge up to the
point of paralleling.
b)
VCE sat and VF distribution of the chips connected in parallel
c) Temperature difference between the half-bridges connected in parallel.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
+
Page 4
Department: SM-AE
+
+
VCE sat
VF
I
NTC
-
-
-
Fig. 4: Static current sharing for the EconoPACKTM+ in parallel connection
Re a) The internal resistances in the module consisting of the bond wires
and copper tracks (on the DCBs) are almost identical since the
EconoPACKTM+ is of symmetrical construction for the three systems. This
value is defined in the data sheet as RCC`/EE`. The mechanical construction of
the bus bars should definitely be symmetrical. Otherwise, if unsymmetrical,
different track resistances may result.
Apart from the symmetrical construction it is the power terminals which need
particular attention with regard to corrosion or contamination.
Re b) The VCE sat and VF values are subject to production variance which, for
the NPT Fieldstop technology, is so low that a parallel design may be
realised with minimal de-rating. In connection with the above mentioned
positive temperature coefficient a selection of the chips for saturation voltage
is not necessary.
Re c) VCEsat values and VF values depend on temperature. Significant
temperature asymmetries within the cooling medium result in current
asymmetries.
Cooling evenly counteracts this.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 5
Department: SM-AE
The dynamic current sharing during the turn-on and turn-off periods can be
defined as:
A) VGEth distribution of the IGBT Chips
B) Difference of the stray inductances Lδ in the DC-bus between the
individual half-bridges.
C) Magnetic field distribution during commutation.
D) Temperature difference between the paralleled half-bridges.
+
+
+
Lδ
Lδ
Lδ
VGEth
I
NTC
-
Lδ
Lδ
Lδ
-
-
Fig. 5: Dynamical current sharing of the EconoPACKTM+ in parallel connections
Re A) The VGEth values are subject to production variance which, for the NPT
Fieldstop technology, is also so low that no major asymmetries in the
switched currents result from this.
Re B) Much more influence on the symmetry of IGBT and diode switching
stems from the external DC-bus stray inductance Lδ. Different stray
inductances will cause different switching behaviour of the IGBTs. A DC-bus
construction once correctly adapted will optimise the switching behaviour.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 6
Department: SM-AE
Re C) Surrounding a current carrying conductor will always be a magnetic
field with the magnetic field strength H. In a parallel configuration of several
half-bridge sections concentric circular magnetic field lines with the same
direction of rotation will hence develop . Fig. 6.
+
+
+
Vth
I
NTC
-
-
-
-
-
-
Fig. 6: Magnetic fields with paralleled EconoPACKTM+
For commutation in parallel circuits the current flow, due to differently
coupled neighbouring systems, will result in magnetic fields with different
strengths. Fig 7. This produces differences in speed of the switching
processes of the paralleled half-bridges. A compensation of this effect is
achieved by adapting the external stray inductance or phase inductance. See
section B.
-
+
-
+
-
+
dφ/dt
NTC
Phase U
Fig. 7: Commutation process for paralleled EconoPACKTM+ .
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 7
Department: SM-AE
Fig. 8: Three half-bridges EconoPACKTM+ in parallel. Current sharing without
matching. [Courtesy General Electric Co., Salem VA]
Fig. 9: Three half-bridges EconoPACKTM+ in parallel. Current sharing during turn on
by matching gate resistors. [Courtesy General Electric Co., Salem VA]
Fig. 10: Three half-bridges EconoPACKTM+ in parallel. Current sharing by matching
the DC-bus stray inductance. [Courtesy General Electric Co., Salem VA]
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 8
Department: SM-AE
5. IGBT Control
In a parallel circuit the paralleled IGBTs should switch on and off
simultaneously.
Non-simultaneous switching will also result in dynamic
current asymmetry. To assure simultaneous switching one IGBT-driver
channel can drive all paralleled IGBTs. Paralleled IGBTs may also be driven
via separate driver channels. This has the disadvantage of transition time
differences in the signal coupling path and has the advantage that equalising
processes via auxiliary collector and auxiliary emitter will not occur. The
more cost effective option is to control all paralleled IGBTs with one driver
channel. (Fig. 11 and Fig.12).
High voltage diode for
Vce measurement
Gate resistor
Clamping Diode
NTC
Fig. 11: Drive circuit EconoPACKTM+ in parallel.
It is important that each IGBT is provided with its own gate resistor and
clamping diode between gate and emitter. This is to be located as closely to
the IGBT module as possible. The collectors of the top switches are to be
decoupled with resistors. The value of these collector resistors should be
chosen as low as possible.
Equalising currents flowing through the auxiliary collectors must not exceed
25ARMS. Attention has to be given to the pulse current capability of the
collector resistors. The high voltage diodes for potential VCE measurements
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 9
Department: SM-AE
or active clamping should also be located as closely as possible to the
module. Fig.11.
In parallel circuits equalising currents may flow via the auxiliary emitters.
These currents increase along with the necessary modification to achieve
symmetry of the phase currents. For the auxiliary emitters it is recommended
to keep the resistors as low as possible. These have the major disadvantage
that a voltage drop occurs across the resistors which, depending on the
direction of the equalising current, may be added to or subtracted from the
gate voltage. A unequal turn-on or turn-off of the IGBTs is the result. Should,
however, equalising currents of >25ARMS flow in the auxiliary emitters, these
currents need to be limited with resistors. Attention has to be given to the
pulse current capability of the resistors. The gate resistor is calculated by:
R =Rgate +REmitter. As shown in figure 13b, one can also use current
compensating chokes. They limit the current in case of non-symmetric
currents in the gate- and the respective emitter lead.
EconoPACK+ : Kelvin Gate-/Emitter-control current
normal current capability as function of pulse-width
IPulse/IDC
20
18
f = 10kHz
16
f = 5kHz
14
f = 3kHz
12
10
8
6
4
2
0
1
10
100
1000
TPulse [µs]
Fig. 12: Auxiliary collector, gate and auxiliary emitter load table EconoPACKTM+
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
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Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 10
Department: SM-AE
Collector
Top
NTC
Emitter
Top
+
Collector
Bottom
+
+
Emitter
Bottom
-
-
-
Fig. 13a: Control circuit components EconoPACKTM+ for paralleled systems.
The auxiliary collector of the bottom IGBTs is derived from the auxiliary
emitters of the top IGBTs. To utilise the auxiliary emitters of the top IGBTs for
VCE measuring or operation of an active clamping circuit for the bottom
IGBTs the high voltage diodes have to be located as closely to the module
as possible and connected as depicted in Fig. 13.
RGate
Gate H
Emitter H
Gate L
Emitter L
-
-
-
Fig 13b: Current limitation in the aux. leads by current compensating chokes.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 11
Department: SM-AE
6. Symmetry by means of output inductors
Implementation of inductors in the output of each half-bridge affects a
dynamic decoupling of the paralleled sections. If the impedance Z=ωL of the
inductance Lσ is greater than the impedance of the IGBT modules, then the
currents will be shared symmetrically through the output chokes. Fig.10.
I
Lσ
NTC
Fig. 14: Symmetry by means of output inductors.
Apart from the current sharing effect the inductors Lσ may be used to reduce
the dv/dt at the load. The output chokes are here in series with the load
inductance. If the cable resistances are disregarded, you get an inductive
voltage divider. A capacitance connected in parallel with the load inductance
will achieve additional reduction of the dv/dt at the load
Lσ
V1
Lσ Load
V2
Cdv/dt
Fig. 15. Reduction of the dv/dt by means of an LC-network
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 12
Department: SM-AE
7. Symmetry by means of a ring circuit of chokes
NTC
Fig. 17. Example: EconoPACKTM+ parallel circuit with current symmetry realised by a
ring circuit of chokes.
By using current-compensation chokes in the output phases of the parallel
circuit, one by the so-called “ring circuit“has found a further way how to
minimize current asymmetries in the IGBT parallel circuit. The principle can
be compared to that shown in figure 13b. The inductance of each choke is a
function of the current difference L= f(∆i) and is applicable only for the
difference current. If the current in the phases is identical, the inductance of
the choke equals to zero.
The simplest way is to use powdered iron cores as shown as an example in
figure 18.
+
+
+
Fig. 18: Simple current symmetry by ring connection of iron cores.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp
Application Note
Date: 27.09.2004
AN-Number: AN2004-06
Page 13
Department: SM-AE
Fig.19: Current sharing in the triple parallel circuit with EconoPACKTM+. Measured
at the three output phases ∑1410A.
eupec GmbH
Max-Planck-Straße
D-59581 Warstein
Tel. +49 (0) 29 02 7 64-1159
Fax + 49 (0) 29 02 7 64-1150
[email protected]
www.eupec.com
Autor: M.Hornkamp