ETC RT9172S-21CG

RT9172
Preliminary
3A Fixed Output Voltage LDO Regulator
General Description
Features
The RT9172 series of low-dropout linear regulators
z
Low Dropout Voltage
operate from a +2.25V to +6.0V input supply. A wide
z
Low Ground Pin Current
range of preset output voltage options is available.
z
Load Regulation of 0.4% at 3A
These low dropout linear regulators respond very
z
fast to step changes in load, which are suitable for
z
0.5µ
µA Quiescent Current in Shutdown Mode
Guaranteed Output Current of 3A DC
low
The
z
Available in TO-263 and TO-220 Packages
RT9172 uses an internal PMOS as the pass device,
z
Output Voltage Accuracy ±1.5%
which does not cause extra GND current in heavy
z
Error Flag Indicates Output Status
load and dropout condition. The shutdown mode of
z
Sense Option Improves Better Load Regulation
low operation current makes the IC suitable for
z
Extremely Low Output Capacitor Requirements
power-saving systems. The other features include
z
Over-temperature/Over-current Protection
voltage
microprocessor
applications.
current limiting and over temperature protection.
Ordering Information
RT9172…-…… … …
Package type
T5 : TO-220-5
M5 : TO-263-5
T : TO-220
M : TO-263
G : SOT-223
Operating temperature range
C: Commercial standard
Output voltage
15 : 1.5V
16 : 1.6V
:
Applications
z
Microprocessor Power Supplies
z
GTL, GTL+, BTL, and SSTL Bus Terminators
z
Power Supplies for DSPs
z
SCSI Terminator
z
Post Regulators
z
High Efficiency Linear Regulators
z
Battery Chargers
z
Other Battery Powered Applications
Pin Configurations
Part Number
Pin Configurations
TOP VIEW
RT9172-……CT
(Plastic TO-220)
1. VIN
2. GND (TAB)
32 : 3.2V
33 : 3.3V
3. VOUT
S: Pin out exchange
N : Pin 5 bond sense
F : Pin 5 bond flg
1 2 3
TOP VIEW
RT9172-……CM
1. VIN
2. GND (TAB)
3. VOUT
(Plastic TO-263)
1
2
3
TOP VIEW
RT9172-……CG
(Plastic SOT-223)
1
2
3
1. VIN
2. GND (TAB)
3. VOUT
To be continued
DS9172-03 April 2002
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1
RT9172
Preliminary
Part Number
Pin Configurations
Part Number
TOP VIEW
RT9172N-……CT5
1.
2.
3.
4.
5.
RT9172F-……CT5
(Plastic TO-220-5)
12 3 4 5
1.
2.
3.
4.
5.
RT9172F-……CM5
(Plastic TO-263-5)
1 2 3 4 5
TOP VIEW
RT9172S-……CT5
EN
VIN
GND (TAB)
VOUT
SENSE/FLG
(Plastic TO-220-5)
12 3 4 5
TOP VIEW
RT9172N-……CM5
Pin Configurations
VIN
EN
GND (TAB)
SENSE
VOUT
TOP VIEW
RT9172S-……CM5
EN
VIN
GND (TAB)
VOUT
SENSE/FLG
1.
2.
3.
4.
5.
(Plastic TO-263-5)
1 2 3 4 5
1.
2.
3.
4.
5.
VIN
EN
GND (TAB)
SENSE
VOUT
Typical Application Circuit
VIN
VIN = 3.3V
RT9172-25
VOUT
VOUT
2.5V, 3A
GND
CIN
1µF
COUT
Fig. 1
RT9172N-25
VIN
VOUT
VIN = 3.3V
Trace resistance = Rt
VLOAD = 2.5V
ILOAD
CIN
10 µF
EN
GND SENSE
L
O
A
D
COUT
Fig. 2
RT9172F-25
VIN = 3.3V
VIN
VOUT
10K
CIN
10µF
Trace resistance = Rt
V OUT = 2.5V
10K
EN
GND
FLG
VLOAD = 2.5V-I LOADRt
ILOAD
COUT
L
O
A
D
Fig. 3
Recommend COUT: (1) 10µF (or larger) electrolytic or tantalum capacitance
(2) 1µF or 10µF ceromic capacitor parrell with 100µF electrolytic or tantalum capacitance
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DS9172-03 April 2002
RT9172
Preliminary
Function Block Diagram
RT9172F
VIN
VOUT
Buffer
Amplifier
EN
_ +
Thermal
Current
Limiting
Sensor
FLG
+
_
Vref
GND
RT9172N/RT9172S
VIN
VOUT
SENSE
Buffer
Amplifier
EN
Thermal
Current
Limiting
Sensor
_
+
Vref
GND
RT9172
VIN
VOUT
Buffer
Amplifier
Thermal
Current
Limiting
Sensor
_
+
Vref
GND
DS9172-03 April 2002
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3
RT9172
Preliminary
Absolute Maximum Ratings
z
Input Voltage
6V
z
Power Dissipation
Internally Limited
z
ESD Rating
3 kV
z
Storage Temperature Range
−65°C to 150°C
z
Lead Temperature (Soldering, 5 sec.)
260°C
z
Package Thermal Resistance
z
TO-263, θJC
8°C/W
TO-263, θJA
19.4°C/W
TO-220, θJC
8°C/W
TO-220, θJA
62°C/W
SOT-223, θJC
15°C/W
SOT-223, θJA
60°C/W
Junction Temperature Range
-40°C to +125°C
Electrical Characteristics
(Limits in standard typeface are for TA = 25°C, unless otherwise specified: VIN = VO(NOM) + 1.0V, IL = 10mA, COUT =
10µF (Ceramic), VEN = VIN)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
-1.5
0
+1.5
%
2.25
--
6
V
VOUT + 0.4V < VIN < 6.0V
--
0.35
0.8
%
Note 1
--
0.4
1
Note 2
--
0.1
0.3
IL = 300mA
--
50
70
IL = 3A
--
400
700
--
1.2
3
mA
--
0.5
5
µA
Output Voltage Tolerance
Input Voltage Range
VIN
Line Regulation
∆VLINE
Load Regulation
∆VLOAD
Dropout Voltage
VDROP
Quiescent Current
IQ
Shutdown Supply Current
IGSD
Peak Output Current
IO(PEAK)
3.5
5
--
A
ILIMIT
3.5
5
--
A
Guaranteed by design
--
170
--
°C
Guaranteed by design
--
10
--
°C
Output = High
1.2
VIN
--
Output = Low
--
0
0.4
VEN = VIN
--
0.1
--
nA
--
1
--
nA
2
--
--
mA
VEN = 0V
%
mV
Short Circuit Protection
Current Limit
Over Temperature Protection
Shutdown Threshold
TSD
Thermal Shutdown Hysteresis
Shutdown Function
EN Pin Shutdown Threshold
VEN
EN Input Current
FLG Pin Leakage Current
FLG Pin Sink Current
ILEAKAGE
VFLG = 0.5V
V
Note 1: RT9172-CX, RT9172F-XXCX5, 10mA < IL < 3A
Note 2: RT9172S-XXCX5, RT9172N-XXCX5, 10mA < IL < 3A
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DS9172-03 April 2002
RT9172
Preliminary
Pin Description
Pin No.
Pin Name
Pin Function
RT9172F
RT9172N
RT9172S
RT9172
1
1
2
--
EN
Chip Enable
2
2
1
1
VIN
Power Input
3
3
3
2
GND
Ground
4
4
5
3
VOUT
Output Voltage
5
--
--
--
FLG
ERROR Flag
--
5
4
--
SENSE
Remote Sense
DS9172-03 April 2002
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5
RT9172
Preliminary
Typical Operating Charateristics
PSRR
0
CIN = 1nF
COUT = 10µF Electrolytic Capacitor
VIN = 5V
VOUT = 2.5V
TA = 25°C
PSRR (dB)
-20
-20
-30
-40
10mA
-50
CIN = 1nF
COUT = 68µF Tantalum Capacitor
VIN = 5V
VOUT = 2.5V
TA = 25°C
-10
PSRR (dB)
-10
PSRR
0
-30
-40
10mA
-50
100mA
-60
-60
-70
-70
100mA
10
100
1K
10K
100K
1M
10
100
Frequency (Hz)
Noise Signal & Spectrum Distribution
6
8
10
200
1500
160
500
120
-500
200
1000
CIN = 1µF
COUT = 10µF Tantalum Capacitor
Load = 10mA
Sampling Rate = 250KHz
80
40
0
25
50
75
80
100
125
2
8
10
1600
-1000
120
≈
CIN = 1µF
COUT = 68µF Tantalum Capacitor
Load = 10mA
Sampling Rate = 250KHz
80
40
0
0
25
50
75
Frequency (KHz)
100
Noise Signal (uV)
6
125
4
6
8
10
0
0
25
50
75
Frequency (KHz)
100
125
Noise Signal & Spectrum Distribution
Noise Level (uV)
Noise Signal (uV)
Noise Level (uV)
4
200
1000
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6
Time (mS)
Time (mS)
CIN = 1µF
COUT = 10µF Tantalum Capacitor
Load = 100mA
Sampling Rate = 250KHz
40
Noise Signal & Spectrum Distribution
2
1M
≈
Frequency (KHz)
0
100K
1600
-1000
120
≈
0
0
Noise Signal (uV)
4
Noise Level (uV)
Noise Level (uV) Noise Signal (uV)
2
10K
Noise Signal & Spectrum Distribution
Time (mS)
0
1K
Frequency (Hz)
0
2
Time (mS)
4
6
8
10
200
1000
1600
-1000
120
≈
CIN = 1µF
COUT = 68µF Tantalum Capacitor
Load = 100mA
Sampling Rate = 250KHz
80
40
0
0
25
50
75
100
125
Frequency (KHz)
DS9172-03 April 2002
RT9172
Preliminary
Output Voltage
Deviation (V)
VIN = 3.5V
0.2 COUT = 10µF Tantalum
0.1
TT
02 >
-0.1
Load Current (A)
CIN = 10µF Electrolytic
Load Transient Response
≈
≈
1
T
0.11 >
0
10
20
30
40
50
60
70
80
90 100
0.3
CIN = 68µF Tantalum
0.1
TT
02 >
≈
≈
1
T
0.11 >
0
10
20
30
Time (µS)
Output Voltage (mV)
TT
02 >
≈
≈
T
3.5
1↓
0
10
20
30
40
50
60
Time (µS)
DS9172-03 April 2002
70
80
90 100
Input Voltage (V)
Output Voltage (mV)
Input Voltage (V)
COUT = 10µF
100 VOUT = 2.5V
Loading = 100mA
4.5
50
60
70
80
90 100
Line Transient Response
150
-50
40
Time (µS)
Line Transient Response
50
VIN = 3.5V
0.2 COUT = 10µF Tantalum
-0.1
Load Current (A)
Output Voltage
Deviation (V)
Load Transient Response
0.3
150
COUT = 68µF
VOUT = 2.5V
Loading = 100mA
T
100
50
T
02 >
-50
≈
≈
4.5
T
1>
3.5
0
10
20
30
40
50
60
70
80
90 100
Time (µS)
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7
RT9172
Preliminary
Functional Description
Capacitor Selection
Dropout Voltage
The RT9172 requires a minimum input capacitance of
The dropout voltage of a regulator is defined as the
1µF between the input and ground pins to prevent any
minimum input-to-output differential required to stay
impedance interactions with the supply. The RT9172
within 2% of the output voltage. The RT9172 uses an
requires a minimum of 10µF (tantalum, or electrolytic)
capacitance between the output and ground pins for
internal MOS-FET with an RDS(ON) 160mΩ. For
CMOS LDOs, the dropout voltage is the product of the
proper operation, if used 10µF ceromic please parrell
load current and the RDS(ON) of the internal MOSFET.
with 100µF tantalum or electrolytic. Larger capacitance
provides better load dynamics and noise performance.
Maximum Output Current Capability
RT9172 can deliver a continuous current of 1.5 A over
Error Operation (FLG)
the full operating temperature range. A heatsink may
The RT9172 produces a logic low signal at the FLG pin
be required depending on the maximum power
when the output drops out of regulation due to low input
dissipation and maximum ambient temperature of the
voltage, current limiting, or thermal limiting.
application. Under all possible conditions, the junction
The internal error FLG comparator has an open drain
output stage. Hence, the FLG pin should be pulled high
through a pull up resistor.
temperature must be within the range specified under
operating conditions. The total power dissipation of
the device is given by:
PD = (VIN - VOUT) IOUT+ (VIN) IGND
Sense Pin
In applications where the regulator output is not very
close to the load, RT9172 can provide better remote
load regulation using the SENSE pin. Fig.2 and Fig.3
depict the advantage of the SENSE option. RT9172
regulates the voltage at the output pin. Hence, the
voltage at the remote load will be the regulator output
voltage minus the drop across the trace resistance. For
example, in the case of a 3.3V output, if the trace
resistance is 100mΩ, the voltage at the remote load will
be 3V with 3A of load current, ILOAD. The RT9172
regulates the voltage at the sense pin. Connecting the
sense pin to the remote load will provide regulation at
the remote load, as shown in Fig.2 and Fig.3.
where IGND is the operating ground current of the
device (specified under Electrical Characteristics).
The maximum allowable temperature rise (TRMAX)
depends on the maximum ambient temperature
(TAMAX) of the application, and the maximum
allowable junction temperature (TJMAX):
TRMAX = TJMAX – TAMAX
The maximum allowable value for junction to ambient
Thermal Resistance, θJA = TRMAX - TAMAX
The maximum allowable value for junction to ambient
Thermal Resistance, θJA, can be calculated using the
formula:
θJA = TRMAX / PD
RT9172 are available in TO-220, TO-263, and SOT-
Chip Enable Operation
223 packages. The thermal resistance depends in
A CMOS logic level signal at the chip enable (EN) pin
amount of copper area or heat sink, and on air flow. If
will turn-off the regulator. Pin EN must be actively
terminated through a 10kΩ pull-up resistor for a proper
the maximum allowable value of θJA calculated above
is ≧ 60 °C/W for TO-220 package, ≧ 60 °C/W for
operation. If this pin is driven from a source that actively
TO-263 package, and ≧140
pulls high and low (such as a CMOS rail to rail
package, no heatsink is needed since the package
comparator), the pull-up resistor is not required. This
can
pin must be tied to VIN if not used.
requirements. If the value for allowable θJA falls below
dissipate
enough
°C/W for SOT-223
heat
to
satisfy
these
these limits, a heat sink is required.
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DS9172-03 April 2002
RT9172
Preliminary
Heatsinking TO-220Packages
The thermal resistance of a TO-220 package can be
reduced by attaching it to a heat sink or a copper plane
on a PC board. If a copper plane is to be used, the
values of θJA will be same as shown in next section for
TO-263 package.
As shown in the figure, increasing the copper area
beyond
1
square
inch
produces
very
little
improvement. The minimum value for θJA for the TO263 package mounted to a PCB is 32°C/W.
Heatsinking TO-263 and SOT-223 Packages
The TO-263 and SOT-223 packages use the copper
plane on the PCB as a heatsink. The tab of these
packages are soldered to the copper plane for heat
sinking. Fig.4 shows a curve for θJA of TO-263 package
for different copper area sizes, using a typical PCB with
1 ounce copper and no solder mask over the copper
area for heat sinking.
θJA vs. Copper (1 Ounce) Area for TO-263
200
180
TRMAX = TJMAX - TAMAX
160
4W
140
120
100
2.5W
80
60
1W
40
20
0
0
0.5
1
1.5
2
2.5
3
Copper Foil Area (SQ. IN.)
Fig. 4
DS9172-03 April 2002
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9
RT9172
Preliminary
Package Information
D
F
A
M
C
E1
E
MARK
L1
A1
b1
b2
b
L2
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
4.064
4.826
0.160
0.190
A1
2.032
2.921
0.080
0.115
b
0.635
1.016
0.025
0.040
b1
1.143
1.524
0.045
0.060
b2
0.305
0.559
0.012
0.022
C
1.143
1.397
0.045
0.055
D
9.779
10.668
0.385
0.420
E
7.620
9.398
0.300
0.370
e
2.286
2.794
0.090
0.110
E1
11.176
12.954
0.440
0.510
F
2.616
2.870
0.103
0.113
L1
17.526
18.542
0.690
0.730
L2
7.544
8.636
0.297
0.340
M
3.708
3.962
0.146
0.156
3-Lead TO-220 Plastic Package
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DS9172-03 April 2002
RT9172
Preliminary
A
D
C
B
MARK
E
L1
b1
b
L2
b2
e
U
V
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
4.064
4.826
0.160
0.190
B
1.143
1.676
0.045
0.066
b
0.660
0.914
0.026
0.036
b1
1.143
1.397
0.045
0.055
b2
0.305
0.584
0.012
0.023
C
1.143
1.397
0.045
0.055
D
9.652
10.668
0.380
0.420
E
8.128
9.652
0.320
0.380
e
2.286
2.794
0.090
0.110
L1
14.605
15.875
0.575
0.625
L2
2.286
2.794
0.090
0.110
U
6.223 Ref.
0.245 Ref.
V
7.620 Ref.
0.300 Ref.
3-Lead TO- 263 Surface Mount
DS9172-03 April 2002
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11
RT9172
Preliminary
D
D1
B
C
L
e
e
A
H
A1
b
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
--
1.803
--
0.071
A1
0.020
0.100
0.0008
0.0047
b
0.610
0.787
0.024
0.031
B
3.302
3.708
0.130
0.146
C
6.706
7.290
0.264
0.287
D
6.299
6.706
0.248
0.264
D1
2.896
3.150
0.114
0.124
e
2.261
2.362
0.089
0.093
H
0.229
0.330
0.009
0.013
L
0.914
--
0.036
--
3-Lead SOT-223 Plastic Surface Mount
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DS9172-03 April 2002
RT9172
Preliminary
D
A
M
C
F
E1
MARK
E
P
A1
b2
e
Symbol
b
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
4.064
4.826
0.160
0.190
A1
2.032
2.921
0.080
0.115
b
0.635
1.016
0.025
0.040
b2
0.305
0.559
0.012
0.022
C
1.143
1.397
0.045
0.055
c
1.524
1.829
0.060
0.072
D
9.779
10.668
0.385
0.420
E
7.620
9.398
0.300
0.370
E1
11.176
12.954
0.440
0.510
F
14.224
15.113
0.560
0.595
M
3.708
3.962
0.146
0.156
P
24.689
26.416
0.972
1.040
5-Lead TO-220 Plastic Package
DS9172-03 April 2002
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13
RT9172
Preliminary
A
D
C
B
MARK
E
L1
L2
b2
b
e
U
V
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
4.064
4.826
0.160
0.190
B
1.143
1.676
0.045
0.066
b
0.660
0.914
0.026
0.036
b2
0.305
0.584
0.012
0.023
C
1.143
1.397
0.045
0.055
D
9.652
10.668
0.380
0.420
E
8.128
9.652
0.320
0.380
e
1.524
1.829
0.060
0.072
L1
14.605
15.875
0.575
0.625
L2
2.286
2.794
0.090
0.110
U
6.223 Ref.
0.245 Ref.
V
7.620 Ref.
0.300 Ref.
5-Lead TO-263 Plastic Surface Mount Package
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14
DS9172-03 April 2002
Preliminary
DS9172-03 April 2002
RT9172
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15
RT9172
Preliminary
RICHTEK TECHNOLOGY CORP.
RICHTEK TECHNOLOGY CORP.
Headquarter
Taipei Office (Marketing)
6F, No. 35, Hsintai Road, Chupei City
8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5510047 Fax: (8863)5537749
Tel: (8862)89191466 Fax: (8862)89191465
Email: [email protected]
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16
DS9172-03 April 2002