TO-Leadless Optimized for high current applications Package for high current applications TO-Leadless is a perfect fit for applications with high power & high reliability requirements Forklift Light electric vehicles (LEV) such as e-scooter, µ-cars PoL (Point of Load) Telecom Differentiation of Infineon’s high power packages @ a glance D²PAK Power Density Current Capability Thermal Performance Height Reliability D²PAK 7pin TO-LeadLess More details on parameters of high current packages lowest RDS(on) D²PAK D²PAK 7pin TOLL 30V 3.4 mΩ 0.9 mΩ 0.4 mΩ 60V 1.9 mΩ 1.0 mΩ 0.75 mΩ 100V 2.7 mΩ 2.5 mΩ 2.0 mΩ 150V 7.2 mΩ 6.5 mΩ 5.9 mΩ 0.74 mΩ 0.44 mΩ 0.25 mΩ 120A 180 A 300 A 150 mm² 150 mm² 115 mm² 5 nH 5 nH 1-2 nH Package Resistance Current Capability Footprint Inductivity TO-Leadless a replacement for D²PAK 7Pin 4.4mm 2.3mm 9.9mm 10.0mm 11.7mm 15mm Footprint: 115 mm² Footprint: 150 mm² 30% 50% 60% Footprint Height Space Reduction Reduction reduction 100V 60V TOLL D²PAK 7pin 30V Voltag Class 150V TO-leadless offers advantages where high level of parallelization is required SuperSO8 low high Level of Parallelization Improved Reliability: Bottleneck Solder Joint / Current density D2PAK 7Pin bnom Lnom =0.6mm =2.65mm Contact/Solder area D2PAK 7Pin: =2.65mm*0.6mm*5 = 7.95mm2 TO -LeadLess Bnom Lnom L3nom enom =0.8mm =1.9mm =0.7mm =1.2mm Contact/Solder area TOLL: ~1.9mm*0.8mm*7+0.7mm*0.4mm*6 = 12.32mm2 TOLL: Much bigger contact area results in lower current density, avoiding electro migration even at higher current level and higher temperature ->Improved Reliability in High Current Applications Possibility of optical inspection The TO-LeadLess packages enables a visual inspection due to Tin plated grooved leads Trapezoid Groove guaranteed wetting Visible solder joint Pin of TO-LeadLess Groove Tracks onPCB PCB When do we recommend TO-Leadless & why? thermal behavior high current applications which require best thermal behavior space when space reduction in the application is required efficiency applications which require highest efficiency and best EMI behavior TO-Leadless a perfect combination of low package area and thermal resistance thermal behavior Hotter space Thermal Resitance (K/W) 2.0 S3O8 DPAK 1.5 1.0 CanPAK™ S/M SuperSO8 D²PAK 7pin D²PAK 0.5 Cooler Smaller 25 50 TO-220 TO-Leadless 100 150 200 Package Area (mm²) Larger 250 300 350 TO-LeadLess offering lowest RDS(on) efficiency TO-LeadLess D²PAK 7pin For the first time offering outstanding low RDS(on) TO-LeadLess portfolio Package Type VDS [V] RDS(on) max [mΩ] IPT004N03L 30 0.04 IPT007N06N 60 0.7 IPT020N10N3 100 2.0 IPT059N15N3 150 5.9 Summary Why TO-LeadLess? A leadless package with 60% space reduction Highest current capability: up to 300A Very low RDS(on) – up to 30% lower RDS(on) Enables a visual inspection due to Tin plated grooved leads Better EMI due to reduced parasitic inductances (cut by half) High reliability due to improved solder contact area – reduced electro migration Reduced BOM: Smaller board, less drivers, less MOSFETs If you have any further questions… Further information you find on our homepage: www.infineon.com/toll