He xa gon Applic atio n Ki t For XMC4000 Family CP U_ 45 A - V2 CPU Board XMC4500 General Purpose Boa rd Us er„s Ma nu al Revision 1.1, 2012-07-09 Mic rocon t rolle r Edition 2012-07-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. CPU_45A-V2 CPU Board XMC4500 General Purpose Revision History Page or Item Subjects (major changes since previous revision) Revision V1.0, 201-02-28 Initial release Revision V1.1, 2012-07-09 Update of block diagram of the board in Figure 1. Update of Satellite Connector Figure 23, Figure 24 and Figure 25. Update of description Chapter 2.5.1 and 2.5.2 “Cortex Debug Connector” Update of schematics in Figure 26, Figure 27 and Figure 28. Update of layout and geometry in Figure 29. Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2011-02-24 Template: IFX_Template_2011-02-24.dot CPU_45A-V2 CPU Board XMC4500 General Purpose Table of Contents Table of Contents Introduction ............................................................................................................................................................ 7 1 1.1 1.2 Overview ............................................................................................................................................. 7 Key Features ........................................................................................................................................ 7 Block Diagram ...................................................................................................................................... 8 2 2.1 2.2 2.3 2.4 2.5 2.5.1 2.5.2 2.5.3 2.6 2.7 2.8 2.9 2.10 2.11 2.11.1 2.11.2 2.11.3 Hardware Description ........................................................................................................................ 9 Power Supply ....................................................................................................................................... 9 Reset .................................................................................................................................................. 11 Clock Generation................................................................................................................................ 12 Boot Option ........................................................................................................................................ 12 Debug Interface .................................................................................................................................. 13 Cortex Debug Connector (10-pin) ...................................................................................................... 13 Cortex Debug+ETM Connector (20-pin) ............................................................................................ 14 DriveMonitor2 Connector ................................................................................................................... 16 Serial Flash Memory .......................................................................................................................... 17 USB .................................................................................................................................................... 18 RTC .................................................................................................................................................... 19 LED .................................................................................................................................................... 20 Potentiometer ..................................................................................................................................... 20 Satellite Connectors ........................................................................................................................... 21 COM Connector ................................................................................................................................. 21 HMI Connector ................................................................................................................................... 22 ACT Satellite Connector ..................................................................................................................... 23 3 3.1 3.2 3.3 Production Data................................................................................................................................ 23 Schematics ......................................................................................................................................... 23 Layout and Geometry ......................................................................................................................... 27 List of Material (LOM) ......................................................................................................................... 28 Board User's Manual 4 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose List of Figures List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 CPU_45A-V2 Board Block Diagram..................................................................................................... 8 CPU Board XMC4500 General Purpose (CPU_45A-V2)..................................................................... 9 Powering option through USB interface (5 V) ...................................................................................... 9 CPU_45A-V2 Board Power ................................................................................................................ 10 Battery (VBAT Supply) ....................................................................................................................... 10 Reset .................................................................................................................................................. 11 Reset LED and Reset Switch ............................................................................................................. 11 Clock Generation................................................................................................................................ 12 Boot Options Switch ........................................................................................................................... 12 Boot Strap Signal Switching ............................................................................................................... 13 Cortex Debug Connector (10-pin) ...................................................................................................... 14 Cortex Debug Connector (10-pin) Layout .......................................................................................... 14 Cortex Debug+ETM Connector (20-pin) ............................................................................................ 15 Cortex Debug+ETM Connector (20-pin) Layout ................................................................................ 16 6-Pin Connector ................................................................................................................................. 16 DriveMonitor2 Connector ................................................................................................................... 17 Quad SPI Flash Interface ................................................................................................................... 17 USB Connector .................................................................................................................................. 18 USB power generation - Host/OTG mode ......................................................................................... 19 RTC .................................................................................................................................................... 19 GPIO LED .......................................................................................................................................... 20 Satellite Connectors ........................................................................................................................... 21 Satellite Connector Type COM .......................................................................................................... 22 Satellite Connector Type HMI ............................................................................................................ 22 Satellite Connector Type ACT ............................................................................................................ 23 Satellite Connectors, USB-OTG......................................................................................................... 24 XMC4500 ........................................................................................................................................... 25 Power, Debug..................................................................................................................................... 26 CPU_45A-V2 Board Layout ............................................................................................................... 27 Board User's Manual 5 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose List of Figures List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Power status LED‟s ............................................................................................................................ 10 Power Measurement .......................................................................................................................... 11 Boot Options Settings ........................................................................................................................ 12 Cortex Debug Connector (10 Pin) ...................................................................................................... 14 Cortex Debug+ETM Connector (20 Pin) ............................................................................................ 15 6-pin Connector .................................................................................................................................. 16 Quad SPI Signals ............................................................................................................................... 17 USB micro AB connector Pinout ........................................................................................................ 18 GPIO LED .......................................................................................................................................... 20 CPU_45A-V2 Board LOM .................................................................................................................. 28 Board User's Manual 6 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Overview Introduction This document describes the features and hardware details of the CPU Board XMC4500 General Purpose (CPU_45A-V2) designed to work with Infineon‟s XMC4500 Microcontroller. This board is part of Infineon‟s Hexagon Application Kits. 1 Overview The CPU board CPU_45A-V2 houses the XMC4500 Microcontroller and three satellite connectors (HMI, COM, ACT) for application expansion. The board along with satellite cards (e.g. HMI_OLED-V1, COM_ETH-V1, AUT_ISO-V1 boards) demonstrates the capabilities of XMC4500. The main use case for this board is to demonstrate the generic features of XMC4500 device including tool chain. The focus is safe operation under evaluation conditions. The board is neither cost nor size optimized and does not serve as a reference design. 1.1 Key Features The CPU_45A-V2 board is equipped with the following features ® XMC4500 (ARM Cortex™-M4-based) Microcontroller, LQFP-144 Connection to XMC4500 satellite cards via satellite connectors COM, HMI and ACT USB OTG Host/Device support via micro USB connector Debug options − Cortex Debug connector 10-pin (0.05”) − Cortex Debug+ETM connector 20-pin (0.05”) − DriveMonitor2 Stick connector 6pin (0.05”) Reset push button 32MBit quad SPI flash memory Boot from Embedded Flash, UART or CAN Ready for power consumption analysis 5 LED‟s 3 Power indicating LED‟s 1 GPIO (P3.9) LED 1 RESET LED Potentiometer, connected to analog input P14.1 Power supply − Via Micro-USB connector in USB device mode − Via satellite connector pins (COM/ACT satellites cards can supply power to CPU board) − RTC backup battery Board User's Manual 7 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Overview 1.2 Block Diagram Figure 1 shows the functional block diagram of the CPU_45A-V2 board. For more information about the power supply please refer to chapter 2.1. The CPU board has got the following building blocks: - 3 Satellite Connectors (COM, HMI ACT) - User LED (LED) connected to GPIO P3.9 - Quad SPI flash memory (EE) connected to USIC1 Channel1 with Chip-Select1 - 2 Cortex Debug Connectors - DriveMonitor2 Connector, which disconnects the combined UART/CAN lines from the COM Satellite Connector, when the DriveMonitor2 is connected. - Variable resistor (POTI) connected to GPIO P14.1 - USB On-The-Go Connector (Micro-USB) Drive Monitor2 USB OTG CPU Board XMC4500 General Purpose CPU_45A-V2 SWV SWD RS485 CAN1 LED JTAG BSL UART CAN SWV SWD UART CAN CAN Debug+ETM 20pin Debug 10pin USB P3.9 U0C0 XMC4500 LQFP144 ETH ETH CAN CAN2 EE QSPI SPI LED TS U1C1 2xCS U2C1 U0C1 4xCS SDMMC U1C0 EE DRIVER POSIF ENCODER DSD DSMOD DAC OPAMP ADC SENSOR ACT FPGA COM CAN RMII CCU 4/8 POTI GPIO I2C I2S SPI GPIO SD SPI I2C_IOEX 2x TS SPI GPIO GPIO GPIO GPIO GPIO GPIO SPI GPIO GPIO GPIO I2C I2C 2xISOFACE I2C_IOEX HMI I2C_IOEX reset OLED HEADSET cmd SDCARD TOUCH Figure 1 CPU_45A-V2 Board Block Diagram Board User's Manual 8 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description 2 Hardware Description The following sections give a detailed description of the hardware and how it can be used. Micro-AB USB Connector Power LEDs ACT Satellite Connector COM Satellite Connector qSPI Flash XMC4500 CPU Boot Option Switch Reset Circuit POT Debug Connectors GPIO LED HMI Satellite Connector Battery Figure 2 2.1 CPU Board XMC4500 General Purpose (CPU_45A-V2) Power Supply The CPU_45A-V2 board can be powered via the USB plug (5 V); however, there is a current limit that can be drawn from the host PC through USB. If the CPU_45A-V2 board is used to drive other satellite cards (e.g. AUT_ISO-V1 or MOT_GPDLV-V2) and the total current required exceeds 500 mA, then the board needs to be powered by either an external power supply connected to USB or by a satellite card, which supports external power supply like e.g. AUT_ISO-V1, MOT_GPDLV-V2, COM_ETH-V1. For powering the board through USB interface, connect the USB cable provided with the kit to the Micro-USB connector on board. Conncet USB Cable Figure 3 Power LEDs Powering option through USB interface (5 V) Board User's Manual 9 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description To indicate the power status of CPU_45A-V2 board three LED‟s are provided on board (See Figure 3). The LED will be “ON” when the corresponding rail is powered. Power status LED’s Table 1 LED Reference Power Rail Voltage Note V401 VDD5 5V Must always be “ON” V402 VDD5USB 5V “ON” if powered by USB plug V403 VDD3.3 3.3 V Must always be “ON” USB OTG VDD5USB VDD5 +5V CPU Board XMC4500 General Purpose CPU_45A-V2 VDD3.3 +5V +3.3V VDD3.3 U401 U403 Lin. Voltage Regulator IFX1763 VDD5USB JP300 VDD3.3 VDDP HIB_IO_1 EN P3.2 VDD5 On Board Devices U300 VDD5 XMC4500 LQFP144 VBAT BATTERY HMI Sat. Connector Figure 4 COM Sat. Connector ACT Sat. Connector CPU_45A-V2 Board Power Battery Figure 5 Battery (VBAT Supply) Board User's Manual 10 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Hitex PowerScale probe is provided on the CPU_45A-V2 board to measure the power consumption. Table 2 Power Measurement Jumper Function Description JP300 PowerScale A Hitex PowerScale probe can be connected for current sensing the VDD3.3 (CPU power source). Default: pos. 1-2 (closed) Note: On the PCB there is a shorting trace between pin 1-2. This trace has to be cut first, before using PowerScale. Pin 3 is GND. The maximum current drawn by the CPU board without any satellite cards connected is about 150 mA. 2.2 Reset A simple RC circuit on board ensures the Power-on-Reset. Additionally an on-board push button (SW400, RESET) supports a hard reset of the CPU. This signal is also routed to all satellite connectors. The reset circuit includes a red LED (V407) to indicate the status. LED (V407) will be “ON” during reset state and will be “OFF” during normal operation conditions. Figure 6 Reset Manual Reset Switch Reset LED Figure 7 Reset LED and Reset Switch Board User's Manual 11 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description 2.3 Clock Generation An external 12 MHz crystal provides the clock signal to the XMC4500 microcontroller. The drive strength of the oscillator is set to maximum by software, in order to ensure a safe start-up of the oscillator even under worst case conditions. A serial 510 Ohm resistor will attenuate the oscillations during operations. For the RTC clock a separate external 32.768 kHz crystal is used on board. Figure 8 2.4 Clock Generation Boot Option During power-on-reset the XMC4500 latches the dip switch SW300 settings via the TCK and the TMS pin. Based on the values latched different boot options are possible. Table 3 Boot Options Settings BSL (TMS) CAN/UART (TCK) Boot Option OFF (1) UART (0) Normal Mode (Boot from flash) ON (0) UART (0) ASC BSL Enabled (Boot from UART) OFF (1) CAN (1) BMI Customized Boot Enabled ON (0) CAN (1) CAN BSL Enabled (Boot from CAN) Boot Option Switch Figure 9 Boot Options Switch The board supports boot/debug from Infineon‟s DriveMonitor2 Stick or COM satellite card (via UART or CAN). If a DriveMonitor2 Stick is attached to the CPU_45A-V2 board via the DriveMonitor2 Connector the DM2PRES# Board User's Manual 12 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description signal will be set to low. The switches U301 and U306 will be disabled in this case. The communication to and from the COM satellite card via UART/CAN will be disconnected. This means P1.4 and P1.5 of the XMC4500 will be disconnected from the COM satellite card and is connected to the DriveMonitor2 Connector only. If the DriveMonitor2 is not present the switch U301 and U306 is enabled. Communication to and from a COM satellite card via UART/CAN is possible. This means P1.4 and P1.5 of the XMC4500 will be connected to both the COM satellite card and the DriveMonitor2 Connector. This implementation automatically takes care of switching between DriveMonitor2 Stick and COM satellite card for boot/debug and XMC4500 is not able to detect whether COM satellite card or DriveMonitor2 Stick is communicating. DM2_PRES# DriveMonitor2 Connector CPU Board XMC4500 General Purpose CPU_45A-V2 P1.4 BSL_RXD P27 U301 COM Satellite Conn. XMC4500 LQFP144 P1.5 BSL_TXD U300 Figure 10 Boot Strap Signal Switching 2.5 Debug Interface P29 U306 The CPU_45A-V2 board supports JTAG debug via 3 different connectors. Cortex Debug Connector (10-pin) Cortex Debug+ETM Connector (20-pin) DriveMonitor2 Connector The Hexagon Application Boards are designed to use “Serial Wire Debug” as debug interface. JTAG is not supported by default because the GPIO P0.7 (TDI), where the required TDI function is mapped to, is used by various Actuator boards connected to the ACT satellite connector. If you want to use JTAG anyway, enable the JTAG interface of the XMC device by assembling the pull-up resistor R427 (4k7 Ohm) and the resistor R410 (0 - 33 Ohm). 2.5.1 Cortex Debug Connector (10-pin) The CPU_45A-V2 board supports Serial Wire debug operation and Serial Wire viewer operation (via the SWO signal when Serial Wire debug mode is used) through the 10-pin Cortex Debug Connector. Board User's Manual 13 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Cortex Debug Connector (10-pin) - pinout Figure 11 VCC 1 2 SWDIO / TMS GND 3 4 SWDCLK / TCK GND 5 6 SWO / TDO KEY 7 8 NC / TDI GNDDetect 9 10 nRESET Cortex Debug Connector (10-pin) Table 4 Cortex Debug Connector (10 Pin) Pin No. Signal Name Serial Wire Debug JTAG Debug 1 VCC +3.3 V +3.3 V 2 SWDIO / TMS Serial Wire Data I/O Test Mode Select 3 GND Ground Ground 4 SWDCLK / TCK Serial Wire Clock Test Clock 5 GND Ground Ground 6 SWO / TDO Trace Data OUT Test Data OUT 7 KEY KEY KEY 8 NC / TDI Not connected Test Data IN 9 GNDDetect Ground Detect Ground Detect 10 nRESET Reset (Active Low) Reset (Active Low) Cortex Debug Connector (10 Pin) Figure 12 2.5.2 Cortex Debug Connector (10-pin) Layout Cortex Debug+ETM Connector (20-pin) The CPU_45A-V2 board supports Serial Wire debug operation, Serial Wire viewer operation (via SWO connection when Serial Wire debug mode is used) and Instruction Trace operation through the 20-pin Cortex Debug+ETM Connector. JTAG operation additionally would require the TDI (P0.7) signal. By default the TDI signal is disconnected from the Cortex Debug Connectors by a not assembled resistor R410, because the pin P0.7 is used by the Actuator boards connected to the ACT satellite connector. Board User's Manual 14 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Cortex Debug+ETM Connector (20-pin) - pinout Figure 13 Table 5 VCC 1 2 SWDIO / TMS GND 3 4 SWDCLK / TCK GND 5 6 SWO / TDO / EXTa / TRACECTL KEY 7 8 NC/EXTb/TDI GNDDetect 9 10 nRESET GND/TgtPwr+Cap 11 12 TRACECLK GND/TgtPwr+Cap 13 14 TRACEDATA[0] GND 15 16 TRACEDATC[1] GND 17 18 TRACEDATA[2] GND 19 20 TRACEDATA[3] Cortex Debug+ETM Connector (20-pin) Cortex Debug+ETM Connector (20 Pin) Pin No. Signal Name Serial Wire Debug JTAG Debug 1 VCC +3.3 V +3.3 V 2 SWDIO / TMS Serial Wire Data I/O Test Mode Select 3 GND Ground Ground 4 SWDCLK / TCK Serial Wire Clock Test Clock 5 GND Ground Ground 6 SWO / TDO Trace Data OUT Test Data OUT 7 KEY KEY KEY 8 NC / TDI Not connected Test Data IN 9 GNDDetect Ground Detect Ground Detect 10 nRESET Reset (Active Low) Reset (Active Low) 11 GND/TgtPwr+Cap Ground Ground 12 TRACECLK Trace Clock Trace Clock 13 GND/TgtPwr+Cap Ground Ground 14 TRACEDATA[0] Trace Data 0 Trace Data 0 15 GND Ground Ground 16 TRACEDATA[1] Trace Data 1 Trace Data 1 17 GND Ground Ground 18 TRACEDATA[2] Trace Data 2 Trace Data 2 19 GND Ground Ground 20 TRACEDATA[3] Trace Data 3 Trace Data 3 Board User's Manual 15 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Cortex Debug+ETM Connector (20 Pin) Figure 14 2.5.3 Cortex Debug+ETM Connector (20-pin) Layout DriveMonitor2 Connector The 10-pin Cortex Debug Connector explained in chapter 2.5.1 together with a small 6-pin connector on board works as DriveMonitor2 Connector. DriveMonitor2 adapter card interfaces DriveMonitor2 Stick to these connectors. Note: Do not use Cortex Debug+ETM connector (20-pin) and DriveMonitor2 Connector at the same time. 6 Pin Connector - pinout Figure 15 Table 6 VCC 1 2 UART_TX GND 3 4 UART_RX GND 5 6 nRESET 6-Pin Connector 6-pin Connector Pin No. Signal Name Description 1 VCC 3.3 V 2 UART_TX Transmit Data 3 GND Ground 4 UART_RX Receive Data 5 GND Ground 6 nRESET Reset (Active low) Board User's Manual 16 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description DriveMonitor2 Connector Figure 16 2.6 DriveMonitor2 Connector Serial Flash Memory The CPU_45A-V2 board has 32Mbit serial flash memory interfaced to XMC4500 through a SPI interface. The SPI interface can be configured as single, dual or quad SPI. Table 7 Quad SPI Signals Pin No. Pin Description Signal Name Signal Description P0.13 U1C1_SCLKOUT CLK Clock P3.3 U1C1_SELO1 CS# Active Low Chip Select P3.15 U1C1_DOUT0 DI Data Input of Flash (MTSI) P3.14 U1C1_DX0B DO Data Output of Flash (MRST) P0.14 U1C1_HOUT3/DWIN3 Data I/O Data Input/Output P0.15 U1C1_HOUT3/DWIN3 Data I/O Data Input/Output Figure 17 Quad SPI Flash Interface Board User's Manual 17 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description 2.7 USB The XMC4500 supports USB interface in host only mode, device only mode or as an OTG Dual Role Device (DRD). In USB device mode, power is expected through VBUS (pin 1) from an external host (e.g. PC). When the current is more than 500 mA power from an external source through satellite cards shall be used. Note: Some PCs, notebooks or hubs have a weak USB supply which is not sufficient for proper supply. In this case use an external 5 Volt power supply or a powered USB hub. Figure 18 USB Connector Port P0.9 of XMC4500 is connected to the USB ID pin (pin 4). An OTG device will detect whether a USB 3.0 Micro-A or Micro-B plug is inserted by checking the ID pin. When the ID = FALSE, Micro-A connector is plugged and when ID = TRUE a Micro-B connector is plugged in. When ID is true the XMC4500 acts as USB host else as USB device. Table 8 USB micro AB connector Pinout Pin No. Pin Name Pin Description 1 VBUS 5V 2 D- Data Minus 3 D+ Data Plus 4 ID Identification 5 GND Ground Board User's Manual 18 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Figure 19 USB power generation - Host/OTG mode In the host only mode and OTG mode the CPU_45A-V2 board is capable of supplying power to the connected device (e.g. USB mouse). The board has a power-switch which is controlled by the XMC4500. Port P3.2 (active high) is used for this purpose. In the Host/OTG mode a low active FAULT signal indicates to XMC4500 via HIB_IO_0 signal, if more than 500 mA current is drawn by the external device. HIB_IO_0 signal is used as general purpose input pin for this implementation. Diode V400 will allow powering the board through USB in all USB modes via e.g. a PC. 2.8 RTC The XMC4500 CPU has two power domains, core power domain and hibernate domain. The core power domain (VDDP pins) is connected to VDD3.3 rail. An on-board LDO generates VDD3.3 (3.3 V) from VDD5 (5 V). The hibernate domain is powered via the auxiliary supply VBAT. A 3 V lithium coin cell on board or 3.3 V (VDD3.3) provides power to the auxiliary supply pin VBAT. The RTC is located in the hibernate domain. The XMC4500 uses HIB_IO_1 signal (Active low) to shutdown the LDO which generates VDD3.3 (core domain). Even if the core domain is not powered the Hibernate Domain will operate if VBAT is available. RTC keeps running as long as the hibernate domain is powered via the auxiliary supply VBAT. The RTC is capable to wake-up the whole system from Hibernate domain by setting HIB_IO_1 to high. XMC4500 3.3 Volt Linear Voltage Regulator VDDP VDD33 CPU 12 MHz Core Domain HIB_IO_1 + Figure 20 Hibernate Domain HIB_IO_1 VBAT SPI EN Hibernate Control Internal OSC RTC External OSC 32.768 kHz RTC Board User's Manual 19 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description 2.9 LED The port pin P3.9 of XMC4500 on the CPU_45A-V2 board is connected to LED V300. More user LED‟s are available through I2C GPIO expander on most of the satellite cards. Table 9 GPIO LED LED Connected to Port Pin V300 GPIO P3.9 GPIO LED Figure 21 2.10 GPIO LED Potentiometer The CPU_45A-V2 board provides a potentiometer POT1 for ease of use and testing of the on-chip analog to digital converter. The potentiometer is connected to the analog input G0_CH1 (P14.1). The analog output of the potentiometer ranges from 0 V to 3.3 V. Board User's Manual 20 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description 2.11 Satellite Connectors The CPU_45A-V2 board has three satellite connector types COM satellite connector (Communication) HMI satellite connector (Human Machine Interface) ACT satellite connector (Actuator) The satellite connector interfaces the satellite cards to the CPU board. Note: Only respective application satellite cards shall be connected to the respective satellite connectors. (For e.g. COM satellite cards shall be connected to COM satellite connector only) COM Satellite Connector ACT Satellite Connector HMI Satellite Connector Figure 22 2.11.1 Satellite Connectors COM Connector The COM satellite connector on the CPU_45A-V2 board allows interface expansion through COM satellite cards (e.g. COM_ETH-V1) Board User's Manual 21 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Hardware Description Figure 23 Satellite Connector Type COM (3) This pin is connected with the satellite connector via an analog switch 2.11.2 HMI Connector The HMI satellite connector on the CPU_45A-V2 board allows interface expansion through HMI satellite cards. Figure 24 Satellite Connector Type HMI Board User's Manual 22 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data 2.11.3 ACT Satellite Connector The ACT satellite connector on the CPU_45A-V2 board allows interface expansion through ACT satellite cards. Figure 25 Satellite Connector Type ACT (1) P0.7 can also be used for JTAG Debugging (TDI) (2) P0.8 is used as TRST in order to enable JTAG Debug (3) This pin is connected with the satellite connector via an analog switch 3 Production Data 3.1 Schematics This chapter contains the schematics for the CPU board: Satellite Connectors, USB-OTG XMC4500 Power, Debug The board has been designed with EagleThe full PCB design data of this board Board User's Manual 23 Revision 1.1, 2012-07-09 A B 2 1 1 2 3 4 5 X203C GND L201 BLM18PG600 USB-OTG Connector GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 COM 2 V201 ESD8V0L2B-03L OTG_FS_DM OTG_FS_DP P0.9 R202 33R/0603 R203 33R/0603 GND C202 VDD5 VDD5 GND P1.9 P1.8 P3.13 P2.5 P3.0 P5.8 P0.6 RESET# P2.9 P2.8 P15.9 P5.3 P15.8 P3.15 P3.14 P0.15 P0.14 3 3 P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15] GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 VDD5 HSEC8_MATING-CARD 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 X200 100nF/0603 C SJ3 P3.10 BSL_RXD BSL_TXD P5.5 1 2 P3.1 SJ4 P2.14 P14.13 P3.7 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 100nF/0603 SJ5 2 P14.9 P14.6 P14.7 P14.0 P14.5 P15.14 P15.15 P1.15 P1.12 P1.14 P1.11 P1.13 P1.10 CCU81_OUT31 CCU81_OUT30 P2.14 P15.4 P4.2 P4.3 P5.2 P5.4 P0.7 P5.0 P4.7 P3.11 P3.8 1 P1.0 P5.1 P1.7 P3.4 VDD5 AGND 4 4 GND 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 VDD5 ACT GND GND HSEC8_MATING-CARD 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 X201 GND 5 5 P0.10 P5.7 P14.9 P14.6 P14.12 P15.13 P15.12 P3.12 P3.1 1 P3.8 P2.14 P15.5 P5.6 2 SJ6 1 2 SJ7 P2.10 P3.1 I2S_WA MMC_BUSPOW P3.6 P1.6 P4.1 6 This document may not be passed on, duplicated or its contents utilized, unless expressly permitted. Violating this stipulation will result in the liability to pay damages. All rights reserved in case of a patent registration or registered design. VAREF P14.8 P14.4 P14.14 P14.15 P14.2 P15.6 P15.7 P0.5 P0.2 P0.4 P0.1 P0.3 P0.0 P6.3 P6.2 P4.6 P4.5 P4.4 P2.13 P2.12 P6.4 P3.13 P2.5 P3.0 P5.8 P0.6 RESET# P1.3 P1.2 P1.1 P0.8 P2.6 P1.6 DSD_DIN3A 6 VDD5 AGND 2 C205 VDD5 D ZX62-AB-5PA C206 VDD5 P2.3 P2.2 P2.0 P2.7 P5.9 2 100nF/0603 P0.13 P0.12 P3.3 VDD5USB 1 D1 C201 VDD5 VDD3.3 R204 100nF/0603 E 3 D2 10k/0603 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 VDD5 GND 7 GND HSEC8_MATING-CARD 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 X202 7 HMI 09.11.2011 / Ma GND 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 C209 VDD5 24 GND C210 VDD5 Board User's Manual 100nF/0603 Figure 26 100nF/0603 1 I2S_MTSR I2S_MRST I2S_SCLK Sheet: 2/4 8 09.12.2011 11:21:05 CPU_45A-V2 Satellite Con., USB-OTG P2.4 P5.10 VAREF P14.8 P14.4 P14.3 P15.3 P15.2 P5.11 P3.13 P2.5 P3.0 P3.13 P2.5 P3.0 P5.8 P0.6 RESET# P3.5 MMC_LED P0.11 P4.0 P1.7 8 A B C D E CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data Satellite Connectors, USB-OTG Revision 1.1, 2012-07-09 A B VDD3.3 2k2/0603 R408 R310 2k2/0603 R409 Jumper closed with a cutable trace on bottom layer VDD3.3 GND 10k/0603 PS + - VDD3.3 VDDP 1 JP300 2 1 VCC U302 CS# CLK DI DO HOLD# (IO3) (IO0) (IO1) WP# (IO2) GND VDD3.3 2k2/0603 S25FL032P0XMFI01 3 GND GND GND C323 C LED-GE/D/0603 R301 V300 3 10uF/10V/0805 GND GND 1 6 5 2 7 8 P5.8 P2.14 P3.9 GND 100nF/0603 C321 P3.3 P0.13 P3.15 P3.14 P0.14 GND 2 117 118 119 120 121 122 123 124 VDDC OTG_FS_DM OTG_FS_DP GND 125 90 61 19 126 86 62 18 15 16 17 20 21 24 P14.1531 P14.1432 P14.1333 P14.1234 P14.9 51 P14.8 52 P14.7 35 P14.6 36 P14.5 37 P14.4 38 P14.3 39 P14.2 40 P14.1 41 P14.0 42 P6.6 95 P6.5 96 P6.4 97 P6.3 98 P6.2 99 P6.1 100 P6.0 101 P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 P1.15 94 P1.14102 P1.13103 P1.12104 P1.11105 P1.10106 P1.9 113 P1.8 114 P1.7 115 P1.6 116 P1.5 107 P1.4 108 P1.3 109 P1.2 110 P1.1 111 P1.0 112 P0.15135 P0.14136 P0.13137 P0.12138 P0.11139 P0.10 3 4 P0.9 P0.8 127 P0.7 128 140 P0.6 P0.5 141 P0.4 142 P0.3 143 P0.2 144 1 P0.1 2 P0.0 HIB_IO_1 HIB_IO_0 100nF/0603 C300 P0.15 10uF/10V/0805 P14.1 100nF/0603 C301 4 10uF/10V/0805 S 100nF/0603 C302 qSPI FLASH C325 E A VDD3.3 R309 100nF/0603 C303 D C326 10k/0603 R303 100nF/0603 C304 R300 POTI/10K/VERT AGND VDD3.3 10uF/10V/0805 10k/0603 100nF/0603 C305 E VBAT 100nF/0603 C306 Hitex PowerScale C324 P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15] 100nF/0603 C307 VDD5USB CPU 6u8F/0805 3 VDDC3 VDDC2 VDDC1 VDDC VDDP3 VDDP2 VDDP1 VDDP Analog Digital VSSO VSS EPAD PORST# TCK TMS XTAL1 XTAL2 RTC_XTAL_1 RTC_XTAL_2 VAREF VAGND VDDA VSSA P15.15 P15.14 P15.13 P15.12 P15.9 P15.8 P15.7 P15.6 P15.5 P15.4 P15.3 P15.2 P5.11 P5.10 P5.9 P5.8 P5.7 P5.6 P5.5 P5.4 P5.3 P5.2 P5.1 P5.0 P2.15 P2.14 P2.13 P2.12 P2.11 P2.10 P2.9 P2.8 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 P3.15 P3.14 P3.13 P3.12 P3.11 P3.10 P3.9 P3.8 P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 no ass./BLM18PG600 L302 GND XMC4500_LQFP144 Supply Hibernate/RTC USB_DUSB USB_D+ VBUS HIB_IO_1 HIB_IO_0 VBAT P14.15 P14.14 P14.13 P14.12 P14.9 P14.8 P14.7 P14.6 P14.5 P14.4 P14.3 P14.2 P14.1 P14.0 P6.6 P6.5 P6.4 P6.3 P6.2 P6.1 P6.0 P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 P1.15 P1.14 P1.13 P1.12 P1.11 P1.10 P1.9 P1.8 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 P0.15 P0.14 P0.13 P0.12 P0.11 P0.10 P0.9 P0.8 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 U300 4 89 85 EXP 91 93 92 87 88 22 23 46 45 5 Boot Options GND 219-02 C311 AGND GND 6 6 7 2 4 2 P6.5 P6.1 2 P6.0 A VCC GND A A VCC GND A VCC GND 74LVC1G66DCK B EN U305 74LVC1G66DCK B EN U304 74LVC1G66DCK B EN U303 VCC GND 74LVC1G66DCK B EN U306 7 09.11.2011 / Ma 2 4 2 4 4 DBGPRES# A VCC GND 74LVC1G66DCK B Trace Signal / ACT Board Switch P1.5 P1.4 EN U301 CAN_TxD P1.5 USIC_TxD DM2PRES# 4 CAN_RxD CAN Node1 P1.4 USIC_RxD UART USIC0CH0 BSL DM2 / COM Board Switch This document may not be passed on, duplicated or its contents utilized, unless expressly permitted. Violating this stipulation will result in the liability to pay damages. All rights reserved in case of a patent registration or registered design. GND GND GND Q301 32.768kHz 100nF/0603 GND 5 TMS TCK 100nF/0603 4 3 BSL OFF ON SW300 C309 1 2 Q302 510R/0603 12MHZ/S/3.2X2.5 VAREF RESET# TCK TMS P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15] R313 P15.15 P15.14 P15.13 P15.12 P15.9 P15.8 P15.7 P15.6 P15.5 P15.4 P15.3 P15.2 43 44 49 50 53 54 25 26 27 28 29 30 48 47 P5.11 P5.10 P5.9 P5.8 P5.7 P5.6 P5.5 P5.4 P5.3 P5.2 P5.1 P5.0 P2.14 P2.14 P2.13 P2.12 P2.11 P2.10 P2.9 P2.8 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 P3.15 P3.14 P3.13 P3.12 P3.11 P3.10 P3.9 P3.8 P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 55 56 57 58 77 78 79 80 81 82 83 84 GND 59 I2C-DX 60 I2C-DOUT 63 64 65 66 67 68 75 76 69 70 71 72 73 74 133 134 8 9 10 11 12 13 14 129 130 131 132 5 6 7 4 L300 Potentiometer, GPIO LED, I2C Pullups C308 4k7/0603 C312 15pF/0603 1 5 3 1 5 3 1 5 3 1 5 3 1 5 3 GND GND BSL_TXD GND 100nF/0603 Sheet: 3/4 8 09.12.2011 11:21:05 GND C320 CPU_45A-V2 CPU DSD_DIN3A CCU81_OUT30 CCU81_OUT31 GND GND C322 BSL_RXD GND 8 100nF/0603 3 AGND 4k7/0603 C315 15pF/0603 2 AGND VDD3.3 R304 VDDP BLM18PG600 L301 R302 BLM18PG600 1 2 UART ON CAN C316 15pF/0603 VDD3.3 C310 VDD3.3 C318 25 C317 15pF/0603 100nF/0603 100nF/0603 Board User's Manual C319 Figure 27 100nF/0603 1 A B C D E CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data XMC4500 Revision 1.1, 2012-07-09 A B C D CAN_TxD P1.5 USIC_TxD 1 P3.2 USB-OTG Supply CAN_RxD CAN Node1 P1.4 USIC_RxD UART USIC0CH0 DriveMonitor pulls signal to GND and disconnects BSL signals from COM connector DM2PRES# Cortex Debug / DM2 Connector GND 2 5 4 GND GND 100uF/T/10V/C C411 C1 C3 C5 C7 C9 X401 S2*10/1.27SO C2 C4 C6 C8 C10 D2 D4 D6 A V400 VIN EN VOUT FAULT# U403 TPS2051BDBV B340A-13-F C XE3K_DM2+CTX FLE-103-01-G-DV D1 D3 D5 FTSH-105-01-L-DV-K GND 100nF/0603 C314 GNDGND 100nF/0603 R400 VDD3.3 C313 10k/0603 VDD3.3 R401 10k/0603 GND 1 3 VDDP VDD5USB GND 3 4u7F/0805 C412 P1.4 P1.5 1 2 DBGPRES# VDD3.3 VDD5 C A VDD5 V408 V404 V405 BAT54-02V BAT54-02V 10k/0603 33R/0402 33R/0402 33R/0402 33R/0402 33R/0402 R421 R423 R424 R425 R426 HIB_IO_0 TRACECLK TRACED[0] TRACED[1] TRACED[2] TRACED[3] P6.0 P6.6 P6.5 P2.11 P6.1 7.62mm 1 RESET# TDO/SWO TDI P0.8 TMS TCK P2.1 P0.7 4 The DriveMonitor extension PCB hosts the CAN transceiver and the UART switch logic connected to X401 1 Layout placement no ass./4k7/0603 33R/0402 33R/0402 33R/0402 no ass./33R/0402 R427 R402 R403 R404 R410 DM2 extension PCB 2 4 6 8 10 12 14 16 18 20 FLE-103 1 3 5 7 9 11 13 15 17 19 PCB edge CPU-Board X400 FTSH-105 Debugger pulls signal to GND and disconnects trace signals from ACT connector R411 R428 5 3 10k/0603 R414 GND GND 6 This document may not be passed on, duplicated or its contents utilized, unless expressly permitted. Violating this stipulation will result in the liability to pay damages. All rights reserved in case of a patent registration or registered design. Power LED and Testpoints GND GND 100nF/0603 C414 RTC Battery HIB_IO_1 VBAT 1 E VDD3.3 no ass./10k/0603 10k/0603 BAT54-05 VDD3.3 + V406 BAT400 R418 + - 2 0R/0603 CR1220SM Battery voltage Lithium 3V VDD3.3 Supply TP405 6 1 VDD5 R415 R413 no ass. VDD5 Reset 3 6 7 5 8 RESET# GND GND C405 10uF/10V/0805 R427 assembled for AA step only R410 assembled for AA step only 5 VDD3.3 TP404 270k/0603 no ass./10k/0603 1 4 OUT BYP EXP SENSE/ADJ IFX1763_PADNOP 7 P P1 0R/0603 R416 R422 GND R417 S S1 GND Q404 BC858C GND Sheet: 4/4 8 09.12.2011 11:21:05 CPU_45A-V2 Power, Debug GND 8 GND GND 10k/0603 SW400 TMPS2-SMD GND 4 9 2 1 100nF/0603 C415 GND GND 09.11.2011 / Ma GND 7 GND GND GND EN IN U401 1 3 680R/0603 V403 LED-GN/D/0603 TP406 VDD3.3 R419 C406 no ass./0R/0603 Cortex Debug+ETM GND 2 VDD5USB 2 1 VDD3.3 R412 VDD3.3 no ass. R407 VDD5 no ass. R405 10k/0603 1k5/0603 V401 LED-GN/D/0603 TP407 10nF/0603 C407 10uF/10V/0805 2 1 26 no ass. R406 VDD3.3 R420 Board User's Manual 1k5/0603 V402 LED-GN/D/0603 VDD3.3 C413 100nF/0603 Figure 28 2k2/0603 V407 LED-RT/D/0603 1 A B C D E CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data Power, Debug Revision 1.1, 2012-07-09 B340A-13-F CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data 3.2 Layout and Geometry Dimensions in mm TP407 TP404 TP405 TP406 80 C411 44 U305 C202 X200C321 R427 + R415 R413 R414 44 C315 - C305 PS C304 Q302 C205 C312 R313 C324 C301 93.57 C318 SW300 81.03 75.00 80 U303 ON R310 SJ3 1 R304 U304 R422 Q404 V405 X401 C302 C306 R402 R403C303 C307C316 Q301 C323 FLER401 U301U306 V406 C314 C313 C415 R418 C414 R426 SW400 C308 C309 L300 L301 C311 L302 C317 C310 C322 ADJ_1 C319 R400 R410 FTSH 20.99 R404 U300 R309 R302 2 37.50 46 C206 SJ5 JP300 C300 U302 C405 U401 C406 A SJ4 R303 X201 V403 V401V402 C320 C413 C407 R416 R428R417 U403 R411 C326 C201 C325 2 R407 R406 R405 V400 C412 4 6 2 ADJ_2 X203 R204 V201R202 L201 V408 R203 R412 R420 V407 R419 ADJ_3 R425 R424 R423 R421 V404 X400 R300 R301 V300 BAT400 14.70 R409 R408 17.82 2.4 21.03 C210 SJ7 C209 SJ6 X202 25.08 80 46 44 2 86.60 Figure 29 CPU_45A-V2 Board Layout Board User's Manual 27 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data 3.3 List of Material (LOM) Table 10 CPU_45A-V2 Board LOM Pos. No. Quantity Value Device Reference Des. 1 5 0 R/0402 Resistor SJ3, SJ4, SJ5, SJ6, SJ7 2 2 0 R/0603 Resistor R416, R418 3 2 1 k5/0603 Resistor R405, R406 4 4 2 k2/0603 Resistor R301, R408, R409, R420 5 2 4 k7/0603 Resistor R302, R304 6 1 4 u7F/0805 Capacitor C412 7 1 6 u8F/0805 Capacitor C308 8 11 10 k/0603 Resistor R204, R303, R309, R310, R400, R401, R412, R414, R419, R422, R428 9 1 10 nF/0603 Capacitor C406 Capacitor 10 6 10 uF/10 V/0805 11 1 12 MHZ/S/3.2X2.5 Crystal, 12 MHz, 3.2x2.5 mm C323, C324, C325, C326, C405, C407 Q302 12 4 15 pF/0603 Capacitor C312, C315, C316, C317 13 1 32.768 kHz Crystal, 32.768 KHz, 3.2x1.5 mm Resistor Q301 14 8 33 R/0402 15 2 33 R/0603 Resistor 16 5 74LVC1G66DCK IC, Texas Instruments, SN74LVC1G66DCK 17 27 100 nF/0603 Capacitor U301, U303, U304, U305, U306 C201, C202, C205, C206, C209, C210, C300, C301, C302, C303, C304, C305, C306, C307, C309, C310, C311, C313, C314, C318, C319, C320, C321, C322, C413, C414, C415 18 1 100 uF/T/10 V/C Capacitor C411 19 1 219-02 Dual DIP-Switch, 0.1"pitch SW300 20 1 270 k/0603 Resistor R415 21 1 510 R/0603 Resistor R313 22 1 680 R/0603 Resistor R407 23 2 B340A-13-F Diode, B340A-13-F Diodes Inc. V400, V408 24 2 BAT54-02V Diode, BAT54-02V SC79, Infineon Technologies 25 1 BAT54-05 26 1 BC858C 27 3 BLM18PG600 Board User's Manual Diode, BAT54-05 SOT23-3, Infineon technologies Transistor, BC858C PNP SOT23-3 Ferrite Bead, Murata 28 R402, R403, R404, R421, R423, R424, R425, R426 R202, R203 V404, V405 V406 Q404 L201, L300, L301 Revision 1.1, 2012-07-09 CPU_45A-V2 CPU Board XMC4500 General Purpose Production Data Table 10 CPU_45A-V2 Board LOM Pos. No. Quantity Value Device Reference Des. 28 1 CR1220SM Battery, 3 V Li-Ion coin cell BAT400 29 1 ESD8V0L2B-03L ESD8V0L2B-03L Infineon Technologies V201 30 1 IFX1763_PADNOP LDO, IFX1763SJV33 Infineon Technologies U401 31 1 LED-GE/D/0603 LED V300 32 3 LED-GN/D/0603 LED Green V401, V402, V403 33 1 LED-RT/D/0603 LED V407 34 1 POTI/10 K/VERT 35 1 36 1 Potentiometer, ALPS R300 RK09K1130A8G Connector, FTSH-110-01-L-DVS2*10/1.27SO X400 K-P Samtec, without pin 7 S25FL032P0XMFI01 IC, Flash memory, Spansion U302 37 1 TMPS2-SMD 38 1 TPS2051BDBV 39 1 XE3K_DM2+CTX 40 1 41 1 42 4 IC, XMC4500, Infineon XMC4500_LQFP144 Technologies Connector, ZX62-AB-5PA ZX62-AB-5PA Hirose no ass. Pinheader, 0.1" TH 43 1 no ass./0 R/0603 Resistor R417 44 1 no ass./4 k7/0603 Resistor R427 45 2 no ass./10 k/0603 Resistor R411, R413 46 1 no ass./33 R/0402 Resistor R410 47 1 no ass. / BLM18PG600 Ferrite Bead, Murata L302 48 1 no ass. Pinheader, 0.1" TH, Hitex PowerScale JP300 49 3 no ass. Edgecard connector X200, X201, X202 Board User's Manual FSM2JSMATR TEconn. IC, TPS2051BDBV, Texas Instruments Connector, FTSH-105-01-LMDV-K Samtec, without pin 7 FLE-103-01-G-DV Samtec 29 SW400 U403 X401 U300 X203 TP404, TP405, TP406, TP407 Revision 1.1, 2012-07-09 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG