Ordering number : ENA2311 LV8161MU Monolithic Linear IC Single-Phase Fan Motor Driver http://onsemi.com Overview LV8161MU is the driver IC with BTL linear output for single-phase fan motor, and that drives at low noise by suppressing the reactive power. Moreover, it has the function to fix to the rotational speed corresponding to the oscillatory frequency set with CIN/COUT pins, and that speed control is done by PWM. So, the output signal forms BTL combined with PWM. It is optimum for the small fan motor that requires low power dissipation, low noise, and the fixed rotational speed. Function • Single-phase full wave operating by BTL output (BTL amplifier gain: +45.5dB) • The fixed rotational speed function (possible to adjust the speed by the value of resistor and capacitor connected to CIN/COUT pins) • Hall bias output pin (VHB = 1.03V (typ)) • FG (rotation signal) output pin (Open drain output) • Built-in motor start-up assistance function (PWM with 100% duty in output at start-up) • Built-in lock protection and automatic restart circuit • Built-in thermal-shutdown (TSD) circuit UDFN10 (2.5 × 2.0) Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max 7 V OUT1/2 output current IOUT max 0.7 A OUT1/2 output voltage handling VOUT max 7 V 10 mA HB output current IHB max CIN output voltage handling VPWM 7 V FG output current IFG max 5 mA FG output voltage handling VFG max Allowable power dissipation Pd max IC on board* 7 Operating temperature Topr Tj<150°C Storage temperature Tstg 900 V mW -30 to 95 °C -55 to 150 °C * Specified board: 105mm × 120mm × 1.6mm, grass epoxy board / two layers. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ORDERING INFORMATION See detailed ordering and shipping information on page 11 of this data sheet. Semiconductor Components Industries, LLC, 2014 April, 2014 40914NK 20140228-S00001 No.A2311-1/11 LV8161MU Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings min typ Unit max Recommended Supply voltage VCC 5.0 V Operating supply voltage VCC op 2.2 6.0 V Hall amplifier common mode VICM 0.3 1.5 V 400 kHz input voltage range Feedback resistance RCOUT CIN input frequency range fCIN Resistance between COUT pin and CIN pin 5 kΩ 10 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Electrical Characteristics at Ta = 25°C, VCC = 5V Parameter Symbol Conditions Ratings min typ Unit max Circuit current ICC HB bias voltage VHB OUT1/2 output “H” voltage VOH IOUT=-200mA (VOH=VCC-VOUT) 0.16 0.24 V OUT1/2 output “L” voltage VOL IOUT=200mA 0.10 0.15 V Hall amplifier VINOFS IHB=-5mA 0.90 1.8 2.7 mA 1.03 1.20 V -10 10 mV output offset voltage Hall amplifier voltage gain GH Hall comparator hysteresis width ΔVHIN 44.0 45.5 47.0 ±15 *1 dB mV CIN input “H” threshold level VCINH 2.365 2.490 2.615 V CIN input “L” threshold level VCINL 1.190 1.255 1.320 V CIN input hysteresis width ΔVCIN 1.175 1.235 1.295 COUT output “H” voltage VCOH ICOH=-0.5mA (VCOH=VCC-VCOUT) 60 80 100 mV COUT output “L” voltage VCOL ICOL=0.5mA 60 80 100 mV Number of counts at speed N1 990 N2 1010 42 kHz 24 % V detection 1 Number of counts at speed detection 2 PWM frequency fPWM 22 32 PWM minimum “H” duty DHmin FG output “L” voltage VFGL IFG=3mA 16 20 0.3 V FG output leakage current IFGL VFG=7V 10 μA Output on time in lock-detection LT1 0.4 0.6 0.8 s Output off time in lock-detection LT2 4 6 8 s Output on/off time ratio LRTO LRTO=LT2/LT1 9 10 11 TSD *1 180 °C ΔTSD *1 30 °C In lock detection Thermal-shutdown operating temperature Thermal-shutdown hysteresis width Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. No.A2311-2/11 LV8161MU Package Dimensions UDFN10 2.5x2, 0.5P CASE 517CM ISSUE O L A B D L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L1 PIN ONE REFERENCE E DETAIL A ALTERNATE TERMINAL CONSTRUCTIONS 0.10 C 2X A3 0.10 C 2X 0.05 C EXPOSED Cu TOP VIEW DETAIL B A (A3) DIM A A1 A3 b D E e L L1 L2 MOLD CMPD A1 DETAIL B ALTERNATE CONSTRUCTIONS 0.05 C NOTE 4 A1 SIDE VIEW C SEATING PLANE GENERIC MARKING DIAGRAM* DETAIL A 1 5 XXXM 10X L L2 10 XXX = Specific Device Code M = Date Code = Pb−Free Package 6 e BOTTOM VIEW MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.20 0.30 2.50 BSC 2.00 BSC 0.50 BSC 0.70 0.90 0.00 0.15 0.20 REF 10X b 0.10 M C A B 0.05 M C NOTE 3 RECOMMENDED MOUNTING FOOTPRINT 9X 10X 0.32 1.05 PACKAGE OUTLINE 2.30 1 0.43 0.50 PITCH DIMENSIONS: MILLIMETERS No.A2311-3/11 LV8161MU Pd max -- Ta 1.5 1.0 0.90 0.5 0.40 0 0 30 60 90 120 Pin Assignment Package: UDFN10 2.5x2.0 PIN#1 ID IN1 1 10 HB 2 9 CIN IN2 3 8 FG OUT1 4 7 VCC GND 5 6 OUT2 COUT (Top view) No.A2311-4/11 LV8161MU Block Diagram IN1 LOCK DETECTION 1 INTERNAL CLOCK 10 COUT OSC HB 2 HB TSD ENABLE 9 CIN 8 FG SPEED DETECTION LEVEL SHIFT PWM CONTROL IN2 3 OUT1 4 7 VCC GND 5 6 OUT2 No.A2311-5/11 LV8161MU Pin Function Pin No. 1 Pin name IN1 Function Equivalent circuit Hall input pin(1). VCC 1 GND 3 GND 3 IN2 Hall input pin (2). Input the opposite phase signal to IN1 input. GND GN D 2 HB Regulated voltage output pin. VCC It is used for Hall bias. It is necessary to open when not using it. Not to use HB bias and VCC bias together. VCC 2 GND 4 OUT1 Output pin for motor drive (1). 6 OUT2 Output pin for motor drive (2). GND VCC 4 6 GND 5 GND 7 VCC GND pin. Power supply pin. The input voltage to this terminal must be stabilized without the influence of the noise, ripple, and etc. Therefore, it is necessary to connect the capacitor near VCC terminal and GND terminal as much as possible. It must be over 1uF about the value of this capacitor. Not to detach it. Continued on next page. No.A2311-6/11 LV8161MU Continued from preceding page. Pin Pin name Function Equivalent circuit No. 8 FG Output pin of the rotational signal. VCC It is necessary to open when not using it. 8 GND GND 9 CIN Input pin of the clock for setting the rotational speed. VCC 9 GND 10 COUT Output pin of the signal reversing CIN clock. It works self-oscillating by returning this output signal through GND VCC VCC the filter with resistor and capacitor to CIN pin. 150Ω(typ) 10 GND GND No.A2311-7/11 LV8161MU Application Circuit Example *5 H 1 [IN1] [COUT] 10 2 [HB] [CIN] 9 3 [IN2] [FG] 8 *1 4 [OUT1] [VCC] 7 5 [GND] [OUT2] 6 ( *2 ) FG_OUT ( ) *3 M *1. The hall signal must be wired as short as possible for avoiding the noise. If in influence of the noise, insert the capacitor between IN1 and IN2. *2. It is recommendation that the resistance of 1kΩ or more is connected to FG pin to the series when GND-open or mis-connecting. *3. The power-supply voltage might rise by the influence of the coil kickback etc. when using the diode for preventing the destruction at reverse-connected. In that case, insert the zener diode between the power supply and GND, and suppress the rise of the voltage of VCC pin. *4. It is necessary to wire the VCC and the GND line as wide and short as possible. *5. The reference clock that decides the rotational speed is generated with the connection of C1 pin, COUT pin, R1, and C1 as shown in figure. The relation among rotational speed N [rpm] of the motor with m-poles and the cycle of the reference clock T [s] is as follows. N m 1 × = 60 2 1000 × T Otherwise, the relation among T[s], C1 [F], and R1 [Ω] is as follows in consideration of 150 [Ω] built into COUT terminal. T = 1.09862 × C1 × (R1 + 150 ) Therefore, the relation among rotational speed N [rpm] of the motor with m-poles, C1 [F], and R1 [Ω] is led from above formula as follows. N m 910.2328 E − 6 × = 60 2 C1 × (R1 + 150) For example, when setting to rotate the motor with 4-poles at 2,700 [rpm] as C1=1,000 [pF], 2700 4 910.2328E − 6 × = 60 2 1000 E − 12 × (R1 + 150) 910232.8 ⇔ R1 = − 150 = 9.964[kΩ] 90 Actually, the error margin of rotational speed is caused by the operation time of the circuit, the influence of parasitic elements on the circuit board, etc. Therefore, the value of C1 and R1 should be decided by confirming with the operation with the actual motor. When the value of C1 or R1 changes by the thermal condition or the manufacturing tolerance etc, the rotational speed of the motor changes. So, it is necessary to use the capacitor and the resistor with better characteristics when high accuracy at rotational speed is needed. No.A2311-8/11 LV8161MU *Truth table IN1 IN2 H L (PWM) *1 OUT1 H L H FG H L X L OUT2 L Drive (OUT2 to OUT1) Z Z H H L L X Z Mode Regenerate Lock protection *2 Drive (OUT1 to OUT2) L L Regenerate Lock protection *2 X: Don’t care, Z: High impedance *1. (PWM) is assumed the PWM signal generated in IC *2. When FG pulse is not generated in Output-On-time on Lock-Detection mode, it goes into the state of Lock-Protection. No.A2311-9/11 LV8161MU Timing Chart • Start Up VCC FG OUT1 OUT2 (1) (2) (3) (4) (5) (6) Start-Up mode = 100% High duty in output Normal mode = Duty Controlled by FG feedback Start Up # Output duty control switches from Start-Up mode to Normal mode after counting FG edge to 6. • PWM duty control by FG feedback FG 4*TN *990 < T4*FG < 4*TN *1010 4*TN *1010 < T4*FG T4*FG < 4*TN *990 4*TN *990 < T4*FG < 4*TN *1010 PWM duty “No Change” to previous 4 periods of FG PWM duty “Increasing” for previous 4 periods of FG PWM duty “Decreasing” for previous 4 periods of FG PWM duty “No Change” PWM OUTPUT # T4*FG: Time of 4 periods of FG output, TN: Cycle time of COUT oscillation • Lock protection and Auto re-start Motor re-rotation Motor Lock IN1-IN2 OUT1 OUT2 FG TACT [=0.6sec(typ)] Waiting for FG pulse TDET [=6sec(typ)] Lock protection Re-start # In the mode of motor protection, high side output turns to high impedance. No.A2311-10/11 LV8161MU ORDERING INFORMATION Device LV8161MUTAG Package UDFN10 (2.5 × 2.0) (Pb-Free / Halogen Free) Shipping (Qty / Packing) 3000 / Tape & Reel ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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