MC10EP451 D

MC10EP451, MC100EP451
3.3V / 5V ECL 6-Bit
Differential Register with
Master Reset
Description
The MC10/100EP451 is a 6−bit fully differential register with
common clock and single−ended Master Reset (MR). It is ideal for
very high frequency applications where a registered data path is
necessary.
All inputs have a 75 kW pulldown resistor internally. Differential
inputs have an override clamp. Unused differential register inputs can
be left open and will default LOW. When the differential inputs are
forced to < VEE + 1.2 V, the clamp will override and force the output to
a default state. When in the default state, and since the flip−flop is edge
triggered, the output reaches a determined, but not predicted, valid
state.
The positive transition of CLK (pin 4) will latch the registers.
Master Reset (MR) HIGH will asynchronously reset all registers
forcing Q outputs to go LOW.
The 100 Series contains temperature compensation.
Features
•
•
•
•
•
•
•
•
•
450 ps Typical Propagation Delay
Maximum Frequency > 3.0 GHz Typical
Asynchronous Master Reset
20 ps Skew Within Device, 35 ps Skew Device−To−Device
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
With VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
With VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAM*
MCxxx
EP451
AWLYYWWG
LQFP−32
FA SUFFIX
CASE 873A
1
1
32
QFN32
MN SUFFIX
CASE 488AM
MCxx
EP451
AWLYYWWG
G
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 10
1
Publication Order Number:
MC10EP451/D
MC10EP451, MC100EP451
D4
24
D5
23
D5
22
Q5 Q5 VEE Q4 Q4
21
20
19
18
17
D1
D2
32
31
D2 MR VEE D3
D3
D4
30
26
25
29
28
27
D4
25
16
VCC
D1
1
24 D4
D3
26
15
Q3
D0
2
23 D5
D3
27
14
Q3
D0
3
22 D5
VEE
28
13
VCC
CLK
4
MR
29
12
Q2
CLK
5
D2
30
11
Q2
VCC
6
19 VEE
D2
31
10
Q1
Q0
7
18 Q4
D1
32
9
Q1
Q0
8
17 Q4
MC10EP451
MC100EP451
1
D1
2
D0
3
4
5
6
7
D0 CLK CLK VCC Q0
21 Q5
MC10EP451
MC100EP451
8
9
10
11
12
13
14
Q1
Q1
Q2
Q2 VCC Q3
20 Q5
15
16
Q3 VCC
Figure 2. QFN−32 Pinout (Top View)
Q0
Warning: All VCC and VEE pins must be externally connected to Power
Supply to guarantee proper operation.
D0
D0
Figure 1. LQFP−32 Pinout (Top View)
Q
D
Q0
Q0
R
Table 1. PIN DESCRIPTION
PIN
D1
D1
FUNCTION
D [0:5]*, D [0:5]*
ECL Differential Data Inputs
MR*
ECL Master Reset Input
CLK*, CLK*
ECL Differential Clock Inputs
Q [0:5], Q [0:5]
ECL Differential Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP for QFN−32,
only
The Exposed Pad (EP) on the
QFN−32 package bottom is
thermally connected to the die
for improved heat transfer out
of package. The exposed pad
must be attached to a heat−
sinking conduit. The pad is
electrically connected to VEE.
Q
D
Q1
Q1
R
D2
D2
Q
D
Q2
Q2
R
D3
D3
Q
D
Q3
Q3
R
D4
D4
* Pins will default LOW when left open.
Q
D
Q4
Q4
R
D5
D5
Q
D
Q5
Q5
CLK
CLK
R
MR
VEE
Figure 3. Logic Diagram
http://onsemi.com
2
MC10EP451, MC100EP451
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
LQFP−32
QFN−32
Flammability Rating
Oxygen Index: 28 to 34
> 2 kV
> 200 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 2
Level 2
Level 1
UL 94 V−0 @ 0.125 in
Transistor Count
919 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Rating
Unit
VCC
Symbol
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
LQFP−32
LQFP−32
80
55
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
LQFP−32
12 to 17
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
QFN−32
QFN−32
31
27
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
2S2P
QFN−32
12
°C/W
Tsol
Wave Solder
265
°C
Pb−Free
Condition 2
VI v VCC
VI w VEE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
http://onsemi.com
3
MC10EP451, MC100EP451
Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
80
95
125
80
95
125
80
95
125
mA
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1470
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1430
1755
1490
1815
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
150
150
0.5
0.5
mA
0.5
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
80
95
125
80
95
125
80
95
125
mA
Output HIGH Voltage (Note 3)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
Output LOW Voltage (Note 3)
3065
3190
3315
3130
3255
3380
3170
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
2.0
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
150
150
0.5
0.5
mA
0.5
Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 6)
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
80
95
125
80
95
125
80
95
125
mA
VOH
Output HIGH Voltage (Note 3)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
VOL
Output LOW Voltage (Note 3)
−1935
−1810
−1685
−1870
−1745
−1620
−1830
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
VEE+2.0
0.0
VEE+2.0
150
0.5
0.0
VEE+2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. Input and output parameters vary 1:1 with VCC.
http://onsemi.com
4
MC10EP451, MC100EP451
Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 7)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
85
105
135
85
105
135
85
105
135
mA
VOH
Output HIGH Voltage (Note 8)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 8)
1305
1480
1605
1305
1480
1605
1305
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1305
1675
1305
1675
1305
1675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 9)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
0.5
150
0.5
mA
0.5
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
8. All loading with 50 W to VCC − 2.0 V.
9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 10)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
85
105
135
85
105
135
85
105
135
mA
Output HIGH Voltage (Note 11)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
Output LOW Voltage (Note 11)
3005
3180
3305
3005
3180
3305
3005
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3005
3375
3005
3375
3005
3375
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 12)
2.0
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
11. All loading with 50 W to VCC − 2.0 V.
12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
http://onsemi.com
5
MC10EP451, MC100EP451
Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 13)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
85
105
135
85
105
135
85
105
135
mA
Output HIGH Voltage (Note 14)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 14)
−1995
−1820
−1695
−1995
−1820
−1695
−1995
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1995
−1625
−1995
−1625
−1995
−1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 15)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
Symbol
Characteristic
IEE
Power Supply Current
VOH
VEE+2.0
0.0
VEE+2.0
0.0
150
0.5
VEE+2.0
150
0.5
mA
0.5
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
13. Input and output parameters vary 1:1 with VCC.
14. All loading with 50 W to VCC − 2.0 V.
15. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 16)
−40°C
Characteristic
Symbol
Min
Typ
25°C
Max
Min
Typ
520
650
350
450
450
550
85°C
Max
Min
Typ
450
580
390
490
490
590
Max
Unit
VOUTpp
Output Voltage Amplitude @ 3 GHz
(Figure 4) (Note 17)
540
670
tPLH,
tPHL
Propagation Delay to
Output Differential
CLK to Q, Q
MR to Q, Q
330
430
430
530
tRR
Reset Recovery
MR to CLK
240
145
250
150
260
160
ps
tS
tH
Setup Time
Hold Time
D to CLK
CLK to D
80
80
40
40
80
80
40
40
80
80
40
40
ps
tPW
Minimum Pulse Rate
MR
400
tSKEW
Within−Device Skew (Note 18)
Device−To−Device Skew (Note 19)
20
35
40
100
20
35
40
100
20
35
40
100
tJITTER
CLOCK Random Jitter (RMS)
@ v3.0 GHz (Figure 4)
0.2
1
0.2
1
0.2
1
ps
tr
tf
Output Rise/Fall Times
(20% − 80%)
150
150
250
250
160
160
260
260
180
180
280
280
ps
Q, Q
100
100
530
630
550
650
400
110
110
mV
590
690
400
130
130
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
16. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
17. VOL and VOH specifications not guaranteed for Fmax testing.
18. Skew is measured between outputs under identical transitions and conditions on any one device.
19. Device−To−Device skew for identical transitions at identical VCC levels.
http://onsemi.com
6
MC10EP451, MC100EP451
900
5V
800
VOUTpp (mV)
3.3 V
700
600
500
400
300
200
100
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FREQUENCY (GHz)
Figure 4. Fmax Typical
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
Zo = 50 W
D
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
http://onsemi.com
7
MC10EP451, MC100EP451
ORDERING INFORMATION
Device
MC10EP451FAG
MC10EP451FAR2G
MC10EP451MNG
MC10EP451MNR4G
MC100EP451FAG
MC100EP451FAR2G
MC100EP451MNG
MC100EP451MNR4G
Package
Shipping†
LQFP−32
(Pb−Free)
250 Units / Tray
2000 / Tape & Reel
72 Units / Tray
QFN−32
(Pb−Free)
1000 / Tape & Reel
250 Units / Tray
LQFP−32
(Pb−Free)
2000 / Tape & Reel
72 Units / Tray
QFN−32
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1642/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
http://onsemi.com
8
MC10EP451, MC100EP451
PACKAGE DIMENSIONS
A
4X
A1
32
−T−, −U−, −Z−
32 LEAD LQFP
CASE 873A−02
ISSUE C
25
0.20 (0.008) AB T-U Z
1
AE
−U−
−T−
B
P
V
17
8
BASE
METAL
DETAIL Y
V1
ÉÉ
ÉÉ
ÉÉ
−Z−
9
S1
4X
0.20 (0.008) AC T-U Z
F
S
8X
M_
J
R
D
DETAIL AD
G
SECTION AE−AE
−AB−
C E
−AC−
H
W
K
X
DETAIL AD
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DATUM PLANE −AB− IS LOCATED AT
BOTTOM OF LEAD AND IS COINCIDENT
WITH THE LEAD WHERE THE LEAD
EXITS THE PLASTIC BODY AT THE
BOTTOM OF THE PARTING LINE.
4. DATUMS −T−, −U−, AND −Z− TO BE
DETERMINED AT DATUM PLANE −AB−.
5. DIMENSIONS S AND V TO BE
DETERMINED AT SEATING PLANE −AC−.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.250 (0.010) PER SIDE.
DIMENSIONS A AND B DO INCLUDE
MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE −AB−.
7. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. DAMBAR
PROTRUSION SHALL NOT CAUSE THE
D DIMENSION TO EXCEED 0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS
SHALL BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY
VARY FROM DEPICTION.
DIM
A
A1
B
B1
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
S1
V
V1
W
X
http://onsemi.com
9
MILLIMETERS
MIN
MAX
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
1.400
1.600
0.300
0.450
1.350
1.450
0.300
0.400
0.800 BSC
0.050
0.150
0.090
0.200
0.450
0.750
12_ REF
0.090
0.160
0.400 BSC
1_
5_
0.150
0.250
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
INCHES
MIN
MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
0.055
0.063
0.012
0.018
0.053
0.057
0.012
0.016
0.031 BSC
0.002
0.006
0.004
0.008
0.018
0.030
12_ REF
0.004
0.006
0.016 BSC
1_
5_
0.006
0.010
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
Q_
0.250 (0.010)
0.10 (0.004) AC
GAUGE PLANE
SEATING
PLANE
M
N
9
0.20 (0.008)
DETAIL Y
AC T-U Z
AE
B1
MC10EP451, MC100EP451
PACKAGE DIMENSIONS
QFN32 5x5, 0.5P
CASE 488AM
ISSUE A
É
É
PIN ONE
LOCATION
A
B
D
L
L
L1
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
E
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
0.15 C
0.15 C
A
DETAIL B
0.10 C
ÉÉÉ
ÇÇÇ
ÇÇÇ
EXPOSED Cu
TOP VIEW
(A3)
A1
MOLD CMPD
DETAIL B
ALTERNATE
CONSTRUCTION
0.08 C
SEATING
PLANE
C
SIDE VIEW
NOTE 4
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
9
K
D2
5.30
17
8
32X
MILLIMETERS
MIN
MAX
1.00
0.80
0.05
−−−
0.20 REF
0.30
0.18
5.00 BSC
3.25
2.95
5.00 BSC
2.95
3.25
0.50 BSC
0.20
−−−
0.30
0.50
−−−
0.15
3.35
L
32X
0.63
E2
1
32
3.35 5.30
25
e
e/2
32X
b
0.10
M
C A B
0.05
M
C
BOTTOM VIEW
NOTE 3
0.50
PITCH
32X
0.30
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC)
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
10
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC10EP451/D