ESD7383 USB-OTG 3-Line Protection Product Description The ESD7383 is a 4−bump very low capacitance ESD protection device in 0.4 mm CSP form factor. It is fully compliant with IEC 61000−4−2. The ESD7383 is RoHS II compliant. http://onsemi.com Features ELECTRICAL SCHEMATIC • These Devices are Pb−Free and are RoHS Compliant Applications • ESD protection for USB (including USB OTG) ♦ USB compliance High Speed USB port Up to 480 Mb/s according to USB 2.0 high speed specification CH1 (A1) CH2 (B1) CH3 (B2) GND (A2) MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Pulse Power Dissipation, 8 x 20 ms Ppk 50 W Maximum Peak Pulse Current, 8 x 20 ms IPP 2.5 A Operating Junction Temperature Range TJ −40 to +85 °C Storage Temperature Range Tstg −55 to +150 °C IEC 61000−4−2 Contact (ESD) ESD ±8000 V MARKING DIAGRAM WLCSP4 CASE 567CB 7M 7 = Specific Device Code M = Date Code Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. PINOUT B B1 B2 A A1 A2 1 2 BOTTOM VIEW PIN DESCRIPTIONS Pin Description A1 ESD Channel 1 A2 Device Ground B1 ESD Channel 2 B2 ESD Channel 3 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2011 September, 2011 − Rev. 0 1 Publication Order Number: EMD7383/D ESD7383 ELECTRICAL SPECIFICATIONS AND CONDITIONS ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Parameter Symbol Min Conditions Typ Max Unit 3.0 5.5 V VIN Input Operating Supply Voltage VBR Breakdown Voltage IT = 8 mA IR Reverse Leakage Current VRM = 3 V 100 nA CIN Channel Input Capacitance At 1 MHz, VIN = 0 V 1.5 pF DCIN Channel Input Capacitance Matching At 1 MHz, VIN = 0 V VCL Channel Clamp Voltage Positive Transients Negative Transients IPP = 1 A, tP = 8/20 ms Dynamic Resistance Positive Transients Negative Transients IPP = 1 A, tP = 8/20 ms Any I/O pin to Ground RDYN 6 V 0.02 +10 −1.5 0.6 0.5 pF V W W 1. All parameters specified at TA = 25°C unless otherwise noted. ORDERING INFORMATION Part Number ESD7383 Bumps Variation Part Marking Package Shipping† 4 WLCSP4 7 CSP (Pb−Free) 5000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 ESD7383 IEC61000−4−2 Waveform IEC61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 3. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 4. Diagram of ESD Clamping Voltage Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger % OF PEAK PULSE CURRENT 100 PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 Figure 5. 8 x 20 ms Pulse Waveform http://onsemi.com 3 80 ESD7383 Figure 6. Positive TLP I−V Curve Figure 7. Negative TLP I−V Curve Transmission Line Pulse (TLP) Measurement L Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 8. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 9 where an 8 kV IEC61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. A typical TLP I−V curve for the ESD7383 is shown in Figures 6 and 7. S Attenuator ÷ 50 W Coax Cable 10 MW IM 50 W Coax Cable VM DUT VC Oscilloscope Figure 8. Simplified Schematic of a Typical TLP System Figure 9. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms http://onsemi.com 4 ESD7383 Figure 10. 480 Mb/s USB Source Clears USB 2.0 Hi Speed Mask http://onsemi.com 5 ESD7383 PACKAGE DIMENSIONS WLCSP4, 0.8x0.8 CASE 567CB ISSUE O ÈÈ ÈÈ A D PIN A1 REFERENCE 2X 0.05 C 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E e 0.05 C TOP VIEW A2 0.05 C A RECOMMENDED SOLDERING FOOTPRINT* 0.05 C NOTE 3 4X A1 0.05 C A B 0.03 C C SIDE VIEW e b MILLIMETERS MIN MAX 0.63 0.57 0.17 0.24 0.41 REF 0.24 0.29 0.80 BSC 0.80 BSC 0.40 BSC A1 SEATING PLANE 0.40 PITCH e B A PACKAGE OUTLINE 4X 0.40 PITCH 0.25 DIMENSIONS: MILLIMETERS 1 2 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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