ONSEMI NSQA12VAW5T2G

NSQA6V8AW5T2 Series
Transient Voltage Suppressor
ESD Protection Diode with Low Clamping
Voltage
This integrated transient voltage suppressor device (TVS) is
designed for applications requiring transient overvoltage protection. It
is intended for use in sensitive equipment such as computers, printers,
business machines, communication systems, medical equipment, and
other applications. Its integrated design provides very effective and
reliable protection for four separate lines using only one package.
These devices are ideal for situations where board space is at a premium.
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5
Features
•
•
•
•
•
•
•
2
Low Clamping Voltage
Small SC−88A SMT Package
Stand Off Voltage: 5 V
Low Leakage Current < 1 mA
Four Separate Unidirectional Configurations for Protection
ESD Protection: IEC61000−4−2: Level 4
MILSTD 883C − Method 3015−6: Class 3
Pb−Free Packages are Available
3
4
SC−88A/SOT−323
CASE 419A
Benefits
• Provides Protection for ESD Industry Standards: IEC 61000, HBM
• Minimize Power Consumption of the System
• Minimize PCB Board Space
MARKING DIAGRAM
4
Typical Applications
•
•
•
•
•
Instrumentation Equipment
Serial and Parallel Ports
Microprocessor Based Equipment
Notebooks, Desktops, Servers
Cellular and Portable Equipment
6x MG
G
1
x
Thermal Resistance −
Junction−to−Ambient
Above 25°C, Derate
Symbol
PPK
Value
20
Unit
W
PD
380
mW
°C/W
mW/°C
°C
RqJA
Operating Junction Temperature
Range
TJ
327
3.05
−40 to +125
Storage Temperature Range
Lead Solder Temperature − Maximum
10 Seconds Duration
Tstg
TL
−55 to +150
260
°C
°C
$8.0
kV
IEC ^1000−4−2 (ESD)
Contact
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Non−repetitive current pulse per Figure 6.
2. Only 1 diode under power. For all 4 diodes under power, PD will be 25%.
Mounted on FR4 board with min pad.
2
3
= H for NSQA6V8AW5T2
X for NSQA12VAW5T2
= Date Code
= Pb−Free Package
M
G
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Peak Power Dissipation
8
20 msec Double Exponential
Waveform (Note 1)
Steady State Power − 1 Diode (Note
2)
5
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NSQA6V8AW5T2
SC−88A
3000/Tape & Reel
NSQA6V8AW5T2G
NSQA12VAW5T2
NSQA12VAW5T2G
SC−88A 3000/Tape & Reel
(Pb−Free)
SC−88A
3000/Tape & Reel
SC−88A 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 5
1
Publication Order Number:
NSQA6V8AW5T2/D
NSQA6V8AW5T2 Series
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
VC VBR VRWM
Working Peak Reverse Voltage
V
IR VF
IT
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ IT
IT
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
Ppk
Peak Power Dissipation
C
IF
Parameter
IPP
Uni−Directional
Capacitance @ VR = 0 and f = 1.0 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
VBR
6.4
6.8
7.1
V
Leakage Current (VRWM = 5.0 V)
IR
−
−
1.0
mA
Clamping Voltage 1 (IPP = 1.6 A) (Note 4)
VC
−
−
13
V
Maximum Peak Pulse Current (Note 4)
IPP
−
−
1.6
A
Junction Capacitance − (VR = 0 V, f = 1 MHz)
− (VR = 3.0 V, f = 1 MHz)
CJ
−
−
12
6.7
15
9.5
pF
Clamping Voltage − Per IEC61000−4−2
VC
NSQA6V8AW5T2
Breakdown Voltage (IT = 1 mA) (Note 3)
Figures 1 and 2
V
NSQA12VAW5T2
VBR
11.4
12.0
12.7
V
Leakage Current (VRWM = 9.0 V)
Breakdown Voltage (IT = 5 mA) (Note 3)
IR
−
−
0.05
mA
Zener Impedence (IT = 5 mA)
ZZ
−
−
30
W
Clamping Voltage 1 (IPP = 0.9 A) (Note 4)
VC
−
−
23
V
Maximum Peak Pulse Current (Note 4)
IPP
−
−
0.9
A
Junction Capacitance − (VR = 0 V, f = 1 MHz)
CJ
−
−
15
pF
Clamping Voltage − Per IEC61000−4−2 (Note 5)
VC
3. VBR is measured at pulse test current IT.
4. Surge current waveform per Figure 5.
5. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
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2
Figures 1 and 2
V
NSQA6V8AW5T2 Series
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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3
NSQA6V8AW5T2 Series
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test
Voltage
(kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 5. 8 X 20 ms Pulse Waveform
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80
NSQA6V8AW5T2 Series
% OF RATED POWER OR IPP
100
10
1
1
10
100
1000
90
80
70
60
50
40
30
20
10
0
0
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
Figure 6. Pulse Width
Figure 7. Power Derating Curve
0.16
14
0.14
12
0.04
0.02
2
0.12
150
TA = 25°C
10
0.10
8
0.08
6V
6
0.06
0
25
t, TIME (ms)
TYPICAL CAPACITANCE
(pF)
1 MHz FREQUENCY
IR, REVERSE LEAKAGE (mA)
110
4
−60 −40
−20
0
20
40
60
80
0
100
12 V
0
1
2
3
4
T, TEMPERATURE (°C)
BIAS VOLTAGE (V)
Figure 8. Reverse Leakage versus
Temperature
Figure 9. Capacitance
1
IF, FORWARD CURRENT (A)
Ppk, PEAK SURGE POWER (W)
100
0.1
0.01
0.001
TA = 25°C
0.6
0.8
1.0
1.2
1.4
VF, FORWARD VOLTAGE (V)
Figure 10. Forward Voltage
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1.6
1.8
5
6
NSQA6V8AW5T2 Series
PACKAGE DIMENSIONS
SC−88A/SOT−323/SC−70
5−LEAD PACKAGE
CASE 419A−02
ISSUE J
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
3
D 5 PL
0.2 (0.008)
B
M
DIM
A
B
C
D
G
H
J
K
N
S
M
N
J
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
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NSQA6V8AW5T2/D