MMUN2218L D

MMUN2218L
Digital Transistor (BRT)
R1 = 1.0 kW, R2 = 10 kW
NPN Transistors with Monolithic Bias
Resistor Network
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This digital transistor is designed to replace a single device and its
external resistor bias network. The Bias Resistor Transistor (BRT)
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
BRT eliminates these individual components by integrating them into
a single device. The use of a BRT can reduce both system cost and
board space.
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
Features
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
AA6 MG
G
MAXIMUM RATINGS (TA = 25°C)
Rating
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
30
Vdc
Input Reverse Voltage
VIN(rev)
5
Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2016
March, 2016 − Rev. 0
SOT−23
CASE 318
STYLE 6
1
Symbol
Collector Current − Continuous
MARKING DIAGRAM
1
AA6
= Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
MMUN2218L/D
MMUN2218L
Table 1. ORDERING INFORMATION
Device
MMUN2218LT1G
Package
Shipping†
SOT−23
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PD, POWER DISSIPATION (mW)
300
SOT−23; Minimum Pad
250
200
150
100
50
0
−50
−25
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
125
150
MMUN2218L
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
246
400
2.0
3.2
mW
THERMAL CHARACTERISTICS (SOT−23)
PD
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
508
311
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
174
208
°C/W
TJ, Tstg
−55 to +150
°C
Junction and Storage Temperature Range
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
Table 3. ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
−
−
100
−
−
100
−
−
0.60
50
−
−
50
−
−
40
60
−
−
−
0.25
−
0.7
0.5
1.3
0.9
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector−Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector−Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector−Emitter Breakdown Voltage (Note 3)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 5)
(IC = 5.0 mA, VCE = 10 V)
Collector *Emitter Saturation Voltage (Note 3)
(IC = 10 mA, IB = 1.0 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.3 V, IC = 5 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
Vdc
Vdc
Vdc
Vdc
Vdc
Input Resistor
R1
0.7
1.0
1.3
Resistor Ratio
R1/R2
0.08
0.1
0.12
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle v 2%.
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3
kW
MMUN2218L
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
SEE VIEW C
3
HE
E
DIM
A
A1
b
c
D
E
e
L
L1
HE
q
c
1
2
b
0.25
e
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10°
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
mm Ǔ
ǒinches
0.8
0.031
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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MMUN2218L/D