MCR8DSM D

MCR8DSM, MCR8DSN
Preferred Device
Sensitive Gate
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light
and speed control.
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SCRs
8 AMPERES RMS
600 − 800 VOLTS
Features
•
•
•
•
•
•
•
Small Size
Passivated Die for Reliability and Uniformity
Low Level Triggering and Holding Characteristics
Available in Two Package Styles
Surface Mount Lead Form − Case 369C
Miniature Plastic Package − Straight Leads − Case 369
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings:
Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Packages are Available
G
A
MARKING
DIAGRAM
4
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Peak Repetitive Off−State Voltage (Note 1)
(TJ = −40 to 110°C, Sine Wave, 50 Hz to
60 Hz)
MCR8DSM
MCR8DSN
VDRM,
VRRM
On−State RMS Current
(180° Conduction Angles; TC = 90°C)
IT(RMS)
8.0
A
Average On−State Current
(180° Conduction Angles; TC = 90°C)
IT(AV)
5.1
A
Peak Non-Repetitive Surge Current
(1/2 Cycle, Sine Wave 60 Hz, TJ = 110°C)
ITSM
90
A
Circuit Fusing Consideration (t = 8.3 msec)
I2t
34
A2sec
PGM
5.0
W
Forward Peak Gate Power
(Pulse Width ≤ 10 sec, TC = 90°C)
Forward Average Gate Power
(t = 8.3 msec, TC = 90°C)
PG(AV)
Value
Unit
V
0.5
W
IGM
2.0
A
Operating Junction Temperature Range
TJ
−40 to 110
°C
Storage Temperature Range
Tstg
−40 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings
apply for negative gate voltage; positive gate voltage shall not be applied
concurrent with negative potential on the anode. Blocking voltages shall not
be tested with a constant current source such that the voltage ratings of the
device are exceeded.
October, 2010 − Rev. 7
1 2
3
600
800
Forward Peak Gate Current
(Pulse Width ≤ 10 sec, TC = 90°C)
© Semiconductor Components Industries, LLC, 2010
K
1
YWW
CR
8DSxG
DPAK
CASE 369C
STYLE 4
Y
= Year
WW
= Work Week
CR8DSx = Device Code
x= M or N
G
= Pb−Free Package
PIN ASSIGNMENT
1
Cathode
2
Anode
3
Gate
4
Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MCR8DSM/D
MCR8DSM, MCR8DSN
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
Symbol
Max
Unit
RJC
RJA
RJA
2.2
88
80
°C/W
TL
260
°C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
Unit
−
−
−
−
10
500
12.5
18
V
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current
(VAK = Rated VDRM or VRRM; RGK = 1.0 k) (Note 3)
TJ = 25°C
TJ = 110°C
IDRM
IRRM
A
ON CHARACTERISTICS
Peak Reverse Gate Blocking Voltage (IGR = 10 A)
VGRM
10
Peak Reverse Gate Blocking Current (VGR = 10 V)
IRGM
−
−
1.2
A
Peak Forward On−State Voltage (Note 4) (ITM = 16 A)
VTM
−
1.4
1.8
V
5.0
−
12
−
200
300
0.45
−
0.2
0.65
−
−
1.0
1.5
−
0.5
−
1.0
−
6.0
10
0.5
−
1.0
−
6.0
10
−
2.0
5.0
2.0
10
−
Gate Trigger Current (Continuous dc) (Note 5)
(VD = 12 V, RL = 100 )
Gate Trigger Voltage (Continuous dc) (Note 5)
(VD = 12 V, RL = 100 )
Holding Current
(VD = 12 V, Initiating Current = 200 mA, RGK = 1 k)
Latching Current
(VD = 12 V, IG = 2.0 mA, RGK = 1 k)
TJ = 25°C
TJ = −40°C
TJ = 25°C
TJ = −40°C
TJ = 110°C
TJ = 25°C
TJ = −40°C
TJ = 25°C
TJ = −40°C
Total Turn−On Time
(Source Voltage = 12 V, RS = 6.0 k, IT = 16 A(pk), RGK = 1.0 k)
(VD = Rated VDRM, Rise Time = 20 ns, Pulse Width = 10 s)
IGT
VGT
IH
IL
A
V
mA
mA
tgt
s
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Off−State Voltage
(VD = 0.67 X Rated VDRM, Exponential Waveform,
RGK = 1.0 k, TJ = 110°C)
dv/dt
V/s
2. Surface mounted on minimum recommended pad size.
3. Ratings apply for negative gate voltage or RGK = 1.0 k. Devices shall not have a positive gate voltage concurrently with a negative voltage
on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage
applied exceeds the rated blocking voltage.
4. Pulse Test; Pulse Width ≤ 2.0 msec, Duty Cycle ≤ 2%.
5. RGK current not included in measurements.
ORDERING INFORMATION
Device
MCR8DSMT4
MCR8DSMT4G
MCR8DSNT4
MCR8DSNT4G
Package
Shipping†
DPAK
DPAK
(Pb−Free)
DPAK
2500 / Tape & Reel
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MCR8DSM, MCR8DSN
Voltage Current Characteristic of SCR
+ Current
Symbol
Parameter
VDRM
Peak Repetitive Off−State Forward Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Off−State Reverse Voltage
IRRM
Peak Reverse Blocking Current
VTM
Peak On−State Voltage
IH
Holding Current
Anode +
VTM
on state
IH
IRRM at VRRM
Reverse Blocking Region
(off state)
Reverse Avalanche Region
+ Voltage
IDRM at VDRM
Forward Blocking Region
(off state)
Anode −
105
P(AV) , AVERAGE POWER DISSIPATION (WATTS)
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( °C)
110
= Conduction
Angle
100
95
dc
90
= 30°
60°
90°
120°
180°
85
0
1.0
2.0
3.0
4.0
5.0
6.0
12
10
8.0
180°
= Conduction
Angle
6.0
90°
120°
dc
= 30°
60°
4.0
2.0
0
0
1.0
2.0
3.0
4.0
5.0
IT(AV), AVERAGE ON-STATE CURRENT (AMPS)
IT(AV), AVERAGE ON-STATE CURRENT (AMPS)
Figure 1. Average Current Derating
Figure 2. On−State Power Dissipation
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3
6.0
MCR8DSM, MCR8DSN
1.0
TYPICAL @ TJ = 25°C
MAXIMUM @ TJ = 110°C
10
MAXIMUM @ TJ = 25°C
1.0
r(t) , TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
I T, INSTANTANEOUS ON-STATE CURRENT (AMPS)
100
0.1
ZJC(t) = RJC(t)Sr(t)
0.01
0
1.0
3.0
2.0
5.0
4.0
0.1
1.0
10
100
10 K
t, TIME (ms)
Figure 3. On−State Characteristics
Figure 4. Transient Thermal Response
1.0
VGT, GATE TRIGGER VOLTAGE (VOLTS)
RGK = 1.0 K
100
GATE OPEN
10
1.0
-40 -25
0.1
-10
5.0
20
35
50
65
80
95
110
-40 -25
-10
5.0
20
35
50
65
80
95
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Typical Gate Trigger Current versus
Junction Temperature
Figure 6. Typical Gate Trigger Voltage versus
Junction Temperature
10
110
10
RGK = 1.0 K
RGK = 1.0 K
IL, LATCHING CURRENT (mA)
IH , HOLDING CURRENT (mA)
1000
VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
1000
I GT, GATE TRIGGER CURRENT ( A)
0.1
1.0
0.1
-40 -25
-10
5.0
20
35
50
65
80
95
1.0
0.1
-40 -25
110
-10
5.0
20
35
50
65
80
95
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Typical Holding Current versus
Junction Temperature
Figure 8. Typical Latching Current versus
Junction Temperature
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4
110
MCR8DSM, MCR8DSN
10
1000
8.0
STATIC dv/dt (V/ s)
IH, HOLDING CURRENT (mA)
TJ = 25°C
6.0
IGT = 25 A
4.0
70°C
100
90°C
TJ = 110°C
10
IGT = 10 A
2.0
0
1.0
100
1000
10 K
100
1000
RGK, GATE-CATHODE RESISTANCE (OHMS)
RGK, GATE-CATHODE RESISTANCE (OHMS)
Figure 9. Holding Current versus
Gate−Cathode Resistance
Figure 10. Exponential Static dv/dt versus
Gate−Cathode Resistance and Junction
Temperature
1000
1000
TJ = 110°C
VD = 800 V
TJ = 110°C
100
STATIC dv/dt (V/ s)
STATIC dv/dt (V/ s)
400 V
600 V
VPK = 800 V
10
1.0
100
IGT = 25 A
IGT = 10 A
10
1.0
1000
100
100
1000
RGK, GATE-CATHODE RESISTANCE (OHMS)
RGK, GATE-CATHODE RESISTANCE (OHMS)
Figure 11. Exponential Static dv/dt versus
Gate−Cathode Resistance and Peak Voltage
Figure 12. Exponential Static dv/dt versus
Gate−Cathode Resistance and Gate Trigger
Current Sensitivity
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5
MCR8DSM, MCR8DSN
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
b2
e
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
H
DETAIL A
3
c
b
0.005 (0.13)
H
C
M
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
2.58
0.102
5.80
0.228
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
3.00
0.118
1.60
0.063
6.17
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your local
Sales Representative
MCR8DSM/D