BTA25-600CW3G, BTA25-800CW3G Triacs Silicon Bidirectional Thyristors Designed for high performance full-wave ac control applications where high noise immunity and high commutating di/dt are required. http://onsemi.com Features • • • • • • • • • TRIACS 25 AMPERES RMS 600 thru 800 VOLTS Blocking Voltage to 800 Volts On-State Current Rating of 25 Amperes RMS at 95°C Uniform Gate Trigger Currents in Three Quadrants High Immunity to dV/dt − 500 V/ms minimum at 125°C Minimizes Snubber Networks for Protection Industry Standard TO-220AB Package − Internally Isolated High Commutating dI/dt − 14 A/ms minimum at 125°C Internally Isolated (2500 VRMS) These Devices are Pb−Free and are RoHS Compliant* MT2 MT1 G MARKING DIAGRAM 4 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) BTA25−600CW3G BTA25−800CW3G VDRM, VRRM On-State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 95°C) IT(RMS) 25 A ITSM 250 A I2t 260 A2sec VDSM/ VRSM VDRM/VRRM +100 V IGM 4.0 A Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TC = 25°C) Circuit Fusing Consideration (t = 8.3 ms) Non−Repetitive Surge Peak Off−State Voltage (TJ = 25°C, t = 8.3 ms) Peak Gate Current (TJ = 125°C, t ≤ 20 ms) Average Gate Power (TJ = 125°C) Value Unit V 1 600 800 PG(AV) 0.5 W TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C RMS Isolation Voltage (t = 300 ms, R.H. ≤ 30%, TA = 25°C) Viso 2500 V Operating Junction Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2012 September, 2012 − Rev. 2 1 2 BTA25−xCWG AYWW TO−220AB CASE 221A STYLE 12 3 x A Y WW G = 6 or 8 = Assembly Location (Optional)* = Year = Work Week = Pb−Free Package * The Assembly Location code (A) is optional. In cases where the Assembly Location is stamped on the package the assembly code may be blank. PIN ASSIGNMENT 1 Main Terminal 1 2 Main Terminal 2 3 Gate 4 No Connection ORDERING INFORMATION Device Package Shipping BTA25−600CW3G TO−220AB (Pb−Free) 50 Units / Rail BTA25−800CW3G TO−220AB (Pb−Free) 50 Units / Rail Publication Order Number: BTA25−600CW3/D BTA25−600CW3G, BTA25−800CW3G THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Case (AC) Junction−to−Ambient Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 seconds Symbol Value Unit RqJC RqJA 1.8 60 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Symbol Min Typ Max − − − − 0.005 3 − − 1.55 − − − − − − 35 35 35 − − 50 − − − − − − 75 75 75 − − − − − − 1.3 1.3 1.3 0.15 0.15 0.15 − − − − − − (dI/dt)c 14 − − A/ms Critical Rate of Rise of On−State Current (TJ = 125°C, f = 120 Hz, IG = 70 mA, tr ≤ 100 ns) dI/dt − − 50 A/ms Critical Rate of Rise of Off-State Voltage (VD = 0.66 x VDRM, Exponential Waveform, Gate Open, TJ = 125°C) dV/dt 500 − − V/ms Characteristic Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C TJ = 125°C IDRM, IRRM mA ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = ± 35 A Peak) VTM Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IGT Holding Current (VD = 12 V, Gate Open, Initiating Current = ±100 mA) IH Latching Current (VD = 12 V, IG = 42 mA) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IL Gate Trigger Voltage (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) VGT Gate Non−Trigger Voltage (TJ = 125°C) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) VGD V mA mA mA V V DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current, See Figure 10. (Gate Open, TJ = 125°C, No Snubber) 2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. http://onsemi.com 2 BTA25−600CW3G, BTA25−800CW3G Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol Parameter VTM VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current VTM Maximum On State Voltage IH Holding Current on state IRRM at VRRM IH Quadrant 3 MainTerminal 2 − IH off state VTM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 Quadrant II (+) MT2 (−) IGT GATE Quadrant I (+) IGT GATE MT1 MT1 REF REF IGT − + IGT (−) MT2 Quadrant III (−) MT2 Quadrant IV (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF − MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. http://onsemi.com 3 Quadrant 1 MainTerminal 2 + + Voltage IDRM at VDRM BTA25−600CW3G, BTA25−800CW3G 125 30 PAV, AVERAGE POWER (W) TC, CASE TEMPERATURE (°C) 120 115 110 105 100 95 90 85 80 0 5 10 15 20 IT(RMS), RMS ON-STATE CURRENT (A) 25 20 15 10 5 0 25 0 1000 100 1 0.1 0.01 0.1 1 10 100 t, TIME (ms) 1000 1·104 Figure 4. Thermal Response 10 35 IH, HOLDING CURRENT (mA) IT, INSTANTANEOUS ON-STATE CURRENT (A) 25 Figure 2. On-State Power Dissipation r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) Figure 1. RMS Current Derating 5 10 15 20 IT(RMS), ON-STATE CURRENT (A) TJ = 125°C TJ = 25°C 1 0.1 0 0.5 1.0 1.5 2.0 2.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (V) 30 25 MT2 NEGATIVE 20 15 MT2 POSITIVE 10 5 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) 3.0 Figure 3. On-State Typical Characteristics Figure 5. Holding Current Variation http://onsemi.com 4 25 1.3 20 VGT, GATE TRIGGER VOLTAGE (V) IGT, GATE TRIGGER CURRENT (mA) BTA25−600CW3G, BTA25−800CW3G VD = 12 V RI = 30 W Q3 Q1 15 Q2 10 5 0 −40 −25 −10 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) 110 125 1.1 0.9 Q3 0.7 Q2 0.5 0.3 0.1 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Gate Trigger Voltage Variation 80 5000 4K IL, LATCHING CURRENT (mA) VD = 800 Vpk TJ = 125°C 3K 2K 1K 10 100 1000 RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS) VD = 12 V RI = 30 W 70 60 Q2 Q1 50 Q3 40 30 20 20 35 50 65 80 95 110 125 −40 −25 −10 5 TJ, JUNCTION TEMPERATURE (°C) 10000 Figure 8. Critical Rate of Rise of Off-State Voltage (Exponential Waveform) Figure 9. Latching Current Variation LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC CHARGE 1N4007 MEASURE I TRIGGER CHARGE CONTROL NON‐POLAR CL TRIGGER CONTROL dv/dt , CRITICAL RATE OF RISE OF OFF‐STATE VOLTAGE (V/μ s) Figure 6. Gate Trigger Current Variation 0 VD = 12 V RI = 30 W Q1 + 200 V MT2 1N914 51 W MT1 G Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c http://onsemi.com 5 BTA25−600CW3G, BTA25−800CW3G PACKAGE DIMENSIONS TO−220 CASE 221A−07 ISSUE AA −T− B F 4 Q T SEATING PLANE C S A U 1 2 3 H K Z R L V J G D N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.014 0.022 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 12: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.36 0.55 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 MAIN TERMINAL 1 MAIN TERMINAL 2 GATE NOT CONNECTED ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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