EMI2124 Single Pair Common Mode Filter with ESD Protection Description The EMI2124 is an integrated common mode filter providing both ESD protection and EMI filtering for high speed serial digital interfaces such as USB2.0. The EMI2124 provides EMI filtering for one differential data line pair and ESD protection for one data pair plus USB ID pin. It provides a separate Vbus line protection typically used for charging. It is supplied in a small RoHS-compliant WDFN8 package. http://onsemi.com SIMPLIFIED SCHEMATIC Features 2 • Highly Integrated Common Mode Filter (CMF) with ESD Protection • • • • • • • provides protection and EMI Reduction for systems using high speed Serial Data Lines with cost and space savings over Discrete Solutions Large Differential Mode Bandwidth with Cutoff Frequency > 2 GHz High Common Mode Stop Band Attenuation: >25 dB at 700 MHz, >30 dB at 800 MHz Typical Provides Data Lines ESD Protection to IEC61000-4-2 Level 4, ±12 kV Contact Discharge Provides VID & VBUS ESD Protection to IEC61000-4-2 Level 4, ±30 kV Contact Discharge Low Channel Input Capacitance provides Superior Impedance Matching Performance Low Profile Package with Small Footprint in WDFN8 2.0 mm length x 2.2 mm width x 0.75 mm height Pb−Free Package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Internal (ASIC) 8 External (Connector) 1 7 5 (Vbus) 6 3,4 MARKING DIAGRAM 8 WDFN8 CASE 511BN 1 1 C3 MG G C3 = Specific Device Code M = Date Code G = Pb−Free Device (Note: Microdot may be in either location) Applications PIN CONNECTIONS • USB2.0 and other High Speed Differential Data Lines in Mobile Phones and Digital Still Cameras • MIPI D−PHY In_1+ 1 8 Out_1+ In_1− 2 7 Out_1− GND 3 6 VID GND 4 5 VBUS GND (Top View) ORDERING INFORMATION Device EMI2124MTTAG Package Shipping† WDFN8 (Pb−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2012 May, 2012 − Rev. 0 1 Publication Order Number: EMI2124/D EMI2124 PIN DESCRIPTION Pin No. Pin Name Type 1 In_1+ I/O CMF Channel 1+ to Connector (External) 2 In_1− I/O CMF Channel 1− to Connector (External) 8 Out_1+ I/O CMF Channel 1+ to ASIC (Internal) 7 Out_1− I/O CMF Channel 1− to ASIC (Internal) 5 VBUS I/O Supply Protection to Connector − VBUS (External − VBUS) Supply Protection to Connector (External − VID) 6 ID I/O 3,4 GND GND Description Ground MAXIMUM RATINGS (TA = 25°C unless otherwise stated) Parameter Symbol Value Units Operating Temperature Range TOP −40 to +85 °C Storage Temperature Range TSTG −65 to +150 °C TL 260 °C ILINE 100 mA Maximum Lead Temperature for Soldering Purposes (1/8” from Case for 10 Seconds) DC Current per Line Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 EMI2124 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Channel Leakage Current ILEAK Channel Negative Voltage VF TA = 25°C, IF = 10 mA Channel Input Capacitance to ground (Pins 1,2,8,7 to GND) CIN TA = 25°C, At 1 MHz, GND = 0 V, VIN = 1.65 V Channel Resistance (Pins 1−8, 2−7) Rch Differential Mode Cut*Off Frequency f3dB Common Mode Stop Band Attenuation In−system ESD Withstand Voltage a) Contact discharge per IEC 61000−4−2 standard, Level 4 (External Pins − Pin1, Pin2) b) Contact discharge per IEC 61000−4−2 standard, Level 1 (Internal Pins) c) Contact discharge per IEC 61000−4−2 standard, Level 4 (External Pins − VBUS, VID) Min Typ TA = 25°C, VIN = 5 V, GND = 0 V 0.1 0.8 Max Unit 1.0 mA 1.5 V 1.3 pF 8.0 W 50 W source and load termination 2.0 GHz Fatten @ 800 MHz 30 dB VESD (Notes 1 and 2) kV ±12 ±2 ±30 TLP Clamping Voltage − pin1, pin2 (See Figure 10) VCL Forward IPP = 8 A Forward IPP = 12 A Reverse IPP = −8 A Reverse IPP = −12 A 13 16 −6 −8.5 V V V V TLP Clamping Voltage − VBUS (See Figure 11) VCL Forward IPP = 8 A Forward IPP = 12 A Reverse IPP = −8 A Reverse IPP = −12 A 23 25 −4 −5.4 V V V V Reverse Working Voltage (Pins 1,2,8,7 and 6) Breakdown Voltage (Pins 1,2,8,7 and 6) Reverse Working Voltage (VBUS) Breakdown Voltage (VBUS) VRWM VBR VRWM(2) (Note 3) IT = 1 mA; (Note 4) 5.5 (Note 3) V 9.0 V 12 V 16.8 V VBR(2) IT = 1 mA; (Note 4) Maximum Peak Pulse Current (VID to GND) IPP 8x20 ms Waveform 12 A Clamping Voltage (VID to GND) VC IPP = 5 A 10 V 5 A Maximum Peak Pulse Current (VBUS to GND) IPP(2) 8x20 ms Waveform Clamping Voltage (VBUS to GND) VC(2) IPP = 5 A Dynamic Resistance Positive Transients Negative Transients RDYN TA = 25C, IPP=1 A, tP= 8/20 ms, Any I/O to GND 15 5.0 25 V 0.67 0.59 W W 1. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330, GND grounded. 2. These measurements performed with no external capacitor. 3. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 4. VBR is measured at pulse test current IT. http://onsemi.com 3 EMI2124 I/O 1 I/O 8 I/O 2 I/O 7 EMI2124 2 4 Network Analyzer 1 3 Normal (Differential) Mode Figure 1. Normal (Differential) Mode Test Configuration I/O 1 I/O 8 I/O 2 I/O 7 Differential Signal Driver and Transmission Line EMI2124 Figure 2. Application Circuit http://onsemi.com 4 Differential Signal Buffer and Transmission Line EMI2124 TYPICAL CHARACTERISTICS Figure 3. Differential Mode Attenuation vs. Frequency (Zdiff = 100 W) Figure 4. Common Mode Attenuation vs. Frequency (Zcomm = 50 W) Figure 5. Differential Return Loss vs. Frequency (Zdiff=100 W) Figure 6. Differential Impedance vs. Frequency (Zdiff=100 W) Figure 7. EMI2124 Measured Eye Diagram @ 480 Mbps http://onsemi.com 5 EMI2124 Transmission Line Pulse (TLP) Measurements Transmission Line Pulse (TLP) provides current versus voltage (I-V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 8. TLP I-V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10 s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 9 where an 8 kV IEC61000-4-2 current waveform is compared with TLP current pulses at 8 and 16 A. A TLP curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. Typical TLP I-V curves for the EMI2124 are shown in Figure 10. L SW 50 W Coax Cable Attenuator 50 W Coax Cable ÷ IM VM 10 MW VC DUT Oscilloscope Figure 8. Simplified Schematic of a Typical TLP System Figure 9. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms http://onsemi.com 6 EMI2124 -14 12 -12 10 -10 ) 8 (A t n re r 6 u C -8 Current (A) Current (A) 14 -6 4 -4 2 -2 0 0 0 2 4 6 8 10 12 14 16 0 18 -2 -4 -6 Voltage (V) Voltage (V) Figure 10. Positive and Negative TLP Waveforms (Pin1, Pin2) Figure 11. Positive and Negative TLP Waveforms (VBUS) http://onsemi.com 7 -8 -10 EMI2124 ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to On Semiconductor Application Notes AND8307/D and AND8308/D. IEC61000−4−2 Waveform IEC61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Oscilloscope TVS 50 W Cable 50 W Figure 12. Diagram of ESD Test Setup 100 % OF PEAK PULSE CURRENT ESD Gun PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 Figure 13. 8 x 20 ms Pulse Waveform http://onsemi.com 8 80 EMI2124 Figure 14. ESD Clamping Voltage +8 kV per IEC6100−4−2 (external to internal pin) Figure 15. ESD Clamping Voltage −8 kV per IEC6100−4−2 (external to internal pin) http://onsemi.com 9 EMI2124 PACKAGE DIMENSIONS WDFN8, 2.2x2, 0.5P CASE 511BN−01 ISSUE O PIN ONE REFERENCE 2X L A B D L1 ÉÉÉ ÉÉÉ E DETAIL A OPTIONAL CONSTRUCTIONS 0.10 C 0.10 C 2X ÇÇ ÉÉ EXPOSED Cu TOP VIEW A DETAIL B 0.05 C A3 MOLD CMPD A1 DETAIL B 9X 0.05 C ÉÉ ÇÇ ÇÇ DIM A A1 A3 b b1 D D2 E E2 e L L1 L2 L3 OPTIONAL CONSTRUCTIONS A3 A1 SIDE VIEW NOTE 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. C SEATING PLANE b2 0.10 C A B DETAIL C D2 1 4X L2 L 8 b 0.10 C A B DETAIL C 7X 0.54 0.30 PACKAGE OUTLINE 0.80 5 e NOTE 3 RECOMMENDED SOLDERING FOOTPRINT* L3 E2 0.10 C A B 7X 0.05 C 2X 4 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.15 0.25 0.25 0.35 2.20 BSC 0.34 0.54 2.00 BSC 0.60 0.80 0.50 BSC 0.75 0.95 0.05 0.15 0.30 0.50 0.15 0.25 DETAIL A 2.30 e/2 4X 4X 1.00 0.60 BOTTOM VIEW 1 0.40 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 10 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative EMI2124/D