MC74HC151A D

MC74HC151A
8-Input Data
Selector/Multiplexer
High−Performance Silicon−Gate CMOS
The MC74HC151 is identical in pinout to the LS151. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device selects one of the eight binary Data Inputs, as
determined by the Address Inputs. The Strobe pin must be at a low
level for the selected data to appear at the outputs. If Strobe is high, the
Y output is forced to a low level and the Y output is forced to a high
level.
The HC151 is similar in function to the HC251 which has 3−state
outputs.
•
16
16
1
DATA
INPUTS
4
D1
3
D2
2
D3
1
TSSOP−16
DT SUFFIX
CASE 948F
1
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
D3
1
16
VCC
D2
2
15
D4
D1
3
14
D5
D0
4
13
D6
Y
5
12
D7
Y
6
11
A0
STROBE
7
10
A1
GND
8
9
A2
DATA
OUTPUTS
D4 15
D5 14
HC
151A
ALYWG
G
1
5 Y
1
HC151AG
AWLYWW
16
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
D0
MARKING
DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
16
Features
•
•
•
•
•
•
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6 Y
D6 13
D7 12
FUNCTION TABLE
ADDRESS
INPUTS
A0 11
10
A1
A2 9
STROBE
Inputs
7
PIN 16 = VCC
PIN 8 = GND
Figure 1. Logic Diagram
Outputs
A2
A1
A0
Strobe
Y
Y
X
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
H
L
L
L
L
L
L
L
L
L
D0
D1
D2
D3
D4
D5
D6
D7
H
D0
D1
D2
D3
D4
D5
D6
D7
D0, D1, …, D7 = the level of the respective D input.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 3
1
Publication Order Number:
MC74HC151A/D
MC74HC151A
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
−0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
−0.5 to VCC + 0.5
V
DC Output Voltage (Referenced to GND)
−0.5 to VCC + 0.5
V
VCC
DC Supply Voltage (Referenced to GND)
Vin
Vout
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air
500
TBD
mW
Tstg
Storage Temperature
−65 to +150
°C
SOIC Package
TSSOP Package
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance circuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Vin, Vout
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
TA
Operating Temperature, All Package Types
tr, tf
Input Rise and Fall Time
(Figure 2)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min
Max
Unit
2.0
6.0
V
0
VCC
V
−55
+125
°C
0
0
0
1000
500
400
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not
implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may
affect device reliability.
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC
V
− 55 to
25°C
v 85°C
v 125°C
Unit
VIH
Minimum High−Level Input
Voltage
Vout = 0.1 V or VCC − 0.1 V
|Iout| v 20 mA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
VIL
Maximum Low−Level Input
Voltage
Vout = 0.1 V or VCC − 0.1 V
|Iout| v 20 mA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH
Minimum High−Level Output
Voltage
Vin = VIH or VIL
|Iout| v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
|Iout| v 4.0 mA
|Iout| v 5.2 mA
Vin = VIH
VOL
Maximum Low−Level Output
Voltage
Vin = VIH or VIL
|Iout| v 20 mA
Vin = VIH or VIL
|Iout| v 4.0 mA
|Iout| v 5.2 mA
V
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
±1.0
mA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 mA
6.0
8
80
160
mA
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2
MC74HC151A
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
Parameter
Symbol
VCC
V
− 55 to
25°C
v 85°C
v 125°C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y
(Figures 2 and 7)
2.0
4.5
6.0
170
34
29
215
43
37
255
51
43
ns
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y
(Figures 4 and 7)
2.0
4.5
6.0
185
37
31
230
46
39
280
56
48
ns
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y
(Figures 3 and 7)
2.0
4.5
6.0
185
37
31
230
46
39
280
56
48
ns
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 3 and 7)
2.0
4.5
6.0
205
41
35
255
51
43
310
62
53
ns
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y
(Figures 5 and 7)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tPLH,
tPHL
Maximum Propagation Delay, Strobe to Output Y
(Figures 6 and 7)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 2, 4 and 7)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
−
10
10
10
pF
Cin
Maximum Input Capacitance
Typical @ 25°C, VCC = 5.0 V
CPD
36
Power Dissipation Capacitance (Per Package)
pF
PIN DESCRIPTIONS
INPUTS
Strobe (Pin 7)
D0, D1, … , D7 (Pins 4, 3, 2, 1, 15, 14, 13, 12)
Strobe. This input pin must be at a low level for the
selected data to appear at the outputs. If the Strobe pin is
high, the Y output is forced to a low level and the Y output
is forced to a high level.
Data inputs. Data on any one of these eight binary inputs
may be selected to appear on the output.
CONTROL INPUTS
A0, A1, A2 (Pins 11, 10, 9)
OUTPUTS
Address inputs. The data on these pins are the binary
address of the selected input (see the Function Table).
Y, Y (Pins 5, 6)
Data outputs. The selected data is presented at these pins
in both true (Y output) and complemented (Y output) forms.
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3
MC74HC151A
SWITCHING WAVEFORMS
tr
tf
VALID
INPUT D
VCC
50%
INPUT A
GND
GND
tPLH
tPHL
tPLH
tPHL
90%
50%
10%
OUTPUT Y
OUTPUT
Y OR Y
50%
tTHL
tTLH
Figure 2.
Figure 3.
tr
tf
tf
VCC
90%
50%
10%
INPUT D
VALID
VCC
90%
50%
10%
GND
tPHL
VCC
GND
tPLH
tPLH
90%
50%
10%
OUTPUT Y
tPHL
90%
50%
10%
Y
tTHL
tr
90%
STROBE 50%
10%
tTLH
tTLH
tTHL
Figure 5.
Figure 4.
TEST POINT
tr
tf
VCC
90%
50%
STROBE 10%
GND
tPHL
Y
OUTPUT
DEVICE
UNDER
TEST
tPLH
90%
50%
10%
tTHL
CL*
tTLH
*Includes all probe and jig capacitance
Figure 6.
Figure 7. Test Circuit
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4
MC74HC151A
4
D0
3
D1
D2 2
D3 1
DATA
INPUTS
5 Y
D4 15
6 Y
D5 14
DATA
OUTPUTS
D6 13
D7 12
A0 11
ADDRESS
INPUTS
A1 10
9
A2
7
STROBE
Figure 8. Expanded Logic Diagram
ORDERING INFORMATION
Device
Package
MC74HC151ADG
MC74HC151ADR2G
48 Units / Rail
SOIC−16
(Pb−Free)
NLV74HC151ADR2G*
2500 Tape & Reel
2500 Tape & Reel
MC74HC151ADTG
MC74HC151ADTR2G
Shipping†
96 Units / Tube
TSSOP−16
(Pb−Free)
NLV74HC151ADTR2G*
2500 Tape & Reel
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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5
MC74HC151A
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F
ISSUE B
16X K REF
0.10 (0.004)
0.15 (0.006) T U
T U
M
S
V
S
S
K
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
N
0.25 (0.010)
8
1
M
0.15 (0.006) T U
S
A
−V−
N
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
H
D
DETAIL E
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
MILLIMETERS
INCHES
DIM MIN
MAX
MIN
MAX
A
4.90
5.10 0.193 0.200
B
4.30
4.50 0.169 0.177
C
−−−
1.20
−−− 0.047
D
0.05
0.15 0.002 0.006
F
0.50
0.75 0.020 0.030
G
0.65 BSC
0.026 BSC
H
0.18
0.28 0.007
0.011
−W−
J
0.09
0.20 0.004 0.008
J1
0.09
0.16 0.004 0.006
K
0.19
0.30 0.007 0.012
K1
0.19
0.25 0.007 0.010
L
6.40 BSC
0.252 BSC
M
0_
8_
0_
8_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MC74HC151A
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
−A−
16
9
1
8
−B−
P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
8 PL
0.25 (0.010)
M
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
16 PL
0.25 (0.010)
M
T B
S
A
S
SOLDERING FOOTPRINT*
8X
6.40
16X
1
1.12
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74HC151A/D