MCH12140 D

MCH12140, MCK12140
Phase-Frequency Detector
Description
The MCH/K12140 is a phase frequency−detector intended for
phase−locked loop applications which require a minimum amount of
phase and frequency difference at lock. When used in conjunction
with high performance VCO such as the MC100EL1648, a high
bandwidth PLL can be realized. The device is functionally compatible
with the MC12040 phase−frequency detector with the maximum
frequency extending to 800 MHz.
When the Reference (R) and VCO (V) inputs are unequal in
frequency and/or phase, the differential UP (U) and DOWN (D)
outputs will provide pulse streams which when subtracted and
integrated provide an error voltage for control of a VCO. See
AND8040 for further information. The device is packaged in a small
outline, surface mount 8−lead SOIC package. There are two versions
of the device to provide I/O compatibility to the two existing ECL
standards. The MCH12140 is compatible with MECL 10H™ logic
levels while the MCK12140 is compatible to 100 K ECL logic levels.
This device can also be used in +5.0 V systems. See AND8020 for
termination information
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MARKING
DIAGRAM
8
SOIC−8
D SUFFIX
CASE 751
8
1
1
x
A
L
Y
W
G
x140
ALYW
G
= H or K
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Features
•
•
•
•
•
800 MHz Typical Bandwidth
Small Outline 8-Lead SOIC Package
75 kW Internal Input Pulldown Resistors
>1000 V ESD Protection
Pb−Free Packages are Available
For proper operation, the input edge rate of the R and V inputs
should be less than 5.0 ns.
PIN CONNECTIONS
U
U
D
D
1
8
2
7
3
6
4
5
VCC
R
V
VEE
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
U (fR > fV)
R
R Q
U (fR > fV)
S
S
Q
R
V
D (fV > fR)
D (fV > fR)
Figure 1. Logic Diagram
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 9
1
Publication Order Number:
MCH12140/D
MCH12140, MCK12140
Table 1. TRUTH TABLE*
Input
Output
Input
Output
R
V
U
D
U
D
R
V
U
D
U
D
0
0
1
0
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
0
1
1
1
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
0
1
1
0
1
1
1
0
0
1
*This is not strictly a functional table; i.e., it does not cover all possible modes of operation. However, it gives a sufficient number of tests to ensure
that the device will function properly.
Table 2. H−SERIES DC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND (Note 1), unless otherwise noted.)
−40°C
Symbol
Characteristic
0°C
25°C
70°C
Min
Max
Min
Max
Min
Max
Min
Max
Unit
VOH
Output HIGH Voltage
−1080
−890
−1020
−840
−980
−810
−910
−720
mV
VOL
Output LOW Voltage
−1950
−1650
−1950
−1630
−1950
−1630
−1950
−1595
mV
VIH
Input HIGH Voltage
−1230
−890
−1170
−840
−1130
−810
−1060
−720
mV
VIL
Input LOW Voltage
−1950
−1500
−1950
−1480
−1950
−1480
−1950
−1445
mV
IIL
Input LOW Current
0.5
−
0.5
−
0.5
−
0.3
−
mA
Table 3. K−SERIES DC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND (Note 2), unless otherwise noted.)
−40°C
0°C to 70°C
Min
Typ
Max
Min
Typ
Max
Condition
Unit
VOH
Output HIGH Voltage
−1085
−1005
−880
−1025
−955
−880
VIN = VIH(max)
mV
VOL
Output LOW Voltage
−1830
−1695
−1555
−1810
−1705
−1620
or VIL(min)
mV
VOHA
Output HIGH Voltage
−1095
−
−
−1035
−
−
VIN = VIH(min)
mV
VOLA
Output LOW Voltage
−
−
−1555
−
−
−1610
or VIL(max)
mV
VIH
Input HIGH Voltage
−1165
−
−880
−1165
−
−880
−
mV
VIL
Input LOW Voltage
−1810
−
−1475
−1810
−
−1475
−
mV
IIL
Input LOW Current
0.5
−
−
0.5
−
−
VIN = VIL(max)
mA
Symbol
Characteristic
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2
MCH12140, MCK12140
Table 4. MAXIMUM RATINGS
Symbol
Value
Unit
VEE
Power Supply (VCC = 0 V)
−8.0 to 0
VDC
VI
Input Voltage (VCC = 0 V)
0 to −6.0
VDC
Iout
Output Current
50
100
mA
TA
Operating Temperature Range
−40 to +70
°C
Operating Range (Note 3)
−5.7 to −4.2
V
VEE
Rating
Continuous
Surge
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: ESD data available upon request.
1. 10H circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in
a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are terminated through
a 50 W resistor to −2.0 V except where otherwise specified on the individual data sheets.
2. This table replaces the three tables traditionally seen in ECL 100 K data books. The same DC parameter values at VEE = −4.5 V now apply
across the full VEE range of −4.2 V to −5.5 V. Outputs are terminated through a 50 W resistor to −2.0 V except where otherwise specified
on the individual data sheets.
3. Parametric values specified at: H−Series: −4.20 V to −5.50 V
K−Series: −4.94 V to −5.50 V
Table 5. DC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND, unless otherwise noted.)
−40°C
0°C
25°C
70°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current H
K
−
−
45
45
−
−
38
38
45
45
52
52
38
38
45
45
52
52
38
42
45
50
52
58
mA
VEE
Power Supply Voltage H
K
−4.75
−4.20
−5.2
−4.5
−5.5
−5.5
−4.75
−4.20
−5.2
−4.5
−5.5
−5.5
−4.75
−4.20
−5.2
−4.5
−5.5
−5.5
−4.75
−4.20
−5.2
−4.5
−5.5
−5.5
V
−
−
150
−
−
150
−
−
150
−
−
150
mA
IIH
Input HIGH Current
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 6. AC CHARACTERISTICS (VEE = VEE(min) − VEE(max); VCC = GND, unless otherwise noted.)
−40°C
Symbol
Characteristic
0°C
25°C
70°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
−
800
−
650
800
−
650
800
−
650
800
−
−
FMAX
Maximum Toggle Frequency
tPLH
tPHL
Propagation Delay−to−Output
R, V to D, U
250
375
500
250
375
500
250
375
500
250
375
500
tr
tf
Output Rise/Fall Times
Q (20 to 80%)
−
225
−
100
225
350
100
225
350
100
225
350
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MCH12140, MCK12140
APPLICATIONS INFORMATION
R lags V in phase
The 12140 is a high speed digital circuit used as a phase
When the R and V inputs are equal in frequency and the
comparator in an analog phase-locked loop. The device
phase
of R lags that of V the U output will stay HIGH while
determines the “lead” or “lag” phase relationship and time
the
D
output
will pulse from HIGH to LOW. The magnitude
difference between the leading edges of a VCO (V) signal
of
the
pulse
will be proportional to the phase difference
and a Reference (R) input. Since these edges occur only once
between
the
V
and R inputs reaching a minimum 50% duty
per cycle, the detector has a range of ±2p radians.
cycle
under
a
180°
out of phase condition. The signal on D
The operation of the 12140 can best be described using the
indicates
to
the
VCO
to decrease in frequency to bring the
plots of Figure 2. Figure 2 plots the average value of U, D
loop into lock.
and the difference between U and D versus the phase
difference between the V and R inputs.
V frequency > R frequency
There are four potential relationships between V and R: R
When the frequency of V is greater than that of R the
lags or leads V and the frequency of R is less than or greater
12140 behaves in a similar fashion as above. Again the
than the frequency of V. Under these four conditions the
signal on D indicates that the VCO frequency must be
12140 will function as follows:
decreased to bring the loop into lock.
Fv > Fr
R lags V
−2p
U
R leads V
−p
p
Fv < Fr
2p
R leads V in phase
When the R and V inputs are equal in frequency and the
phase of R leads that of V the D output will stay HIGH while
the U output pulses from HIGH to LOW. The magnitude of
the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180° out of phase condition. The signal on U
indicates to the VCO to increase in frequency to bring the
loop into lock.
VOH
VOH − VOL
2
D
VOH
−2p
−p
p
2p
U−D
−2p
−p
VOH − VOL
2
V frequency < R frequency
When the frequency of V is less than that of R the 12140
behaves in a similar fashion as above. Again the signal on U
indicates that the VCO frequency must be decreased to bring
the loop into lock.
From Figure 2 when V and R are at the same frequency and
in phase the value of U − D is zero thus providing a zero error
voltage to the VCO. This situation indicates the loop is in lock
and the 12140 action will maintain the loop in its locked state.
VOH − VOL
2
p
2p
VOL − VOH
2
Figure 2. Average Output Voltage vs. Phase Difference
ORDERING INFORMATION
Package
Shipping †
SOIC−8
98 Units / Rail
MCH12140DG
SOIC−8
(Pb−Free)
98 Units / Rail
MCH12140DR2
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
SOIC−8
98 Units / Rail
MCK12140DG
SOIC−8
(Pb−Free)
98 Units / Rail
MCK12140DR2
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
Device
MCH12140D
MCH12140DR2G
MCK12140D
MCK12140DR2G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MCH12140, MCK12140
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
H
0.10 (0.004)
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
IC
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MECL 10H is a trademark of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
MCH12140/D